<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:DOC-9JI8BNOX</identifier><date>2013</date><creator>Danković, Danijel</creator><creator>Davidović, Vojkan</creator><creator>Djorić-Veljković, Snežana</creator><creator>Golubović, Snežana</creator><creator>Manić, Ivica</creator><creator>Prijić, Aneta</creator><creator>Prijić, Zoran</creator><creator>Stojadinović, Ninoslav</creator><relation>documents/doc/9/URN_NBN_SI_doc-9JI8BNOX_001.pdf</relation><relation>documents/doc/9/URN_NBN_SI_doc-9JI8BNOX_001.txt</relation><format format_type="issue">1</format><format format_type="volume">43</format><format format_type="type">article</format><format format_type="extent">str. 58-66</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">10539348</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-9JI8BNOX</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="slv">MOSFET</subject><subject language_type_id="slv">NBTI</subject><subject language_type_id="slv">temperaturna nestabilnost</subject><subject language_type_id="slv">tranzistorji</subject><subject language_type_id="slv">VDMOSFET</subject><subject language_type_id="slv">življenjska doba</subject><title>Effects of static and pulsed negative bias temperature stressing on lifetime in p-channel power VDMOSFETs</title><title>Vpliv statičnega in pulznega negativnega temperaturnega stresa na življenjske čase v kanalu p močnostnih VDMOSFET-ov</title></Record>