<Record><identifier xmlns="http://purl.org/dc/elements/1.1/">URN:NBN:SI:DOC-HEFKCCBX</identifier><date>2013</date><creator>Beg, Mirza Tariq</creator><creator>Khan, Imran Ahmed</creator><relation>documents/doc/H/URN_NBN_SI_doc-HEFKCCBX_001.pdf</relation><relation>documents/doc/H/URN_NBN_SI_doc-HEFKCCBX_001.txt</relation><format format_type="issue">1</format><format format_type="volume">43</format><format format_type="type">article</format><format format_type="extent">str. 41-49</format><identifier identifier_type="ISSN">0352-9045</identifier><identifier identifier_type="COBISSID">10538580</identifier><identifier identifier_type="URN">URN:NBN:SI:doc-HEFKCCBX</identifier><language>eng</language><publisher>Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale</publisher><source>Informacije MIDEM</source><rights>InC</rights><subject language_type_id="eng">clock distribution network</subject><subject language_type_id="eng">flip-flop</subject><subject language_type_id="slv">kratkostična vezja</subject><subject language_type_id="slv">optimizacija</subject><subject language_type_id="eng">optimization</subject><subject language_type_id="eng">pass transistors</subject><subject language_type_id="slv">prehodni tranzistorji</subject><subject language_type_id="slv">razporeditvena mreža ure</subject><subject language_type_id="eng">short circuit current</subject><title>Design and analysis of low power master slave flip-flops</title><title>Načrtovanje in analiza master-slave flip-flop vezij nizkih moči</title></Record>