Original scientific paper
Informacije
^efMIDEM
A lournal of f
Journal of Microelectronics, Electronic Components and Materials Vol. 43, No. 2(2013), 119 - 123
Crystal Controlled CMOS Oscillator for 13.56 MHz RFID Reader
S. M. A. Motakabber, M. I. Ibrahimy
Department of Electrical and Computer Engineering, Faculty of Engineering, International Islamic University Malaysia, Malaysia
Abstract: A design procedure of CMOS integrated crystal oscillator for 13.56 MHz RFID is described in detail by using mathematical and Mentor Graphics VLSI design tools ADK-3. The system is designed by using CMOS 0.18 ^m foundry rules and Level-3 transistor model. The frequency stability of the oscillator is created by using piezoelectric crystal. The designed CMOS crystal oscillator can be integrated with the other parts of the RFID reader systems during VLSI design. The computer-generated phase noise is showed -139.5 dBc/Hz at offset of 10 kHz and the power dissipation is 1.25 mW at power supply 2.2V.
Key words: Crystal oscillator, CMOS oscillator, 13.56 MHz RF oscillator, piezoelectric ISO14443
S kristalom krmiljen CMOS oscillator za 13.56 MHz RFID bralnik
Povzetek: V članku je opisan postopek načrtovanja CMOS oscilatorja z integriranim kristalom za 13.56 MHz RFID s pomočjo matematičnega in Mentor Graphics VLSI načrtovalskega orodja ADK-3. Sistem uporablja 0.18 ^m CMOS tehnologijo in model tranzistorjev Level-3. Piezoelektričen kristal skrbi za stabilizacijo oscilatorja. CMOS kristalni oscilator se lahko vgradi v ostale dele RFID sistema med načrtovanjem VLSI. Računalniško generiran šum j eprikazan pri -139.5 dBc/Hz pri odmiku 10 kHz in moči 1.25 mW ob napajanju 2.2 V.
Ključne besede: kristalni oscilator, CMOS oscilator, 13.56 MHz RF oscilator, piezoelektričnost ISO14443
' Corresponding Author's e-mail: amotakabber@iium.edu.my
1 Introduction
Radio Frequency Identification (RFID) is used to identify a tagged object by using radio frequency wave. Due to huge potential and robustness nature, the RFID systems have various types of applications such as products chain management systems, access control electronic tickets, fare collection, product labeling, proximity card etc. In fact the heart of the system is a well stable RF source or oscillator. Almost all modern radio communication system is used at least one highly stable radio-frequency source or oscillator for ensuring the reliable communication. A crystal oscillator has the property of generating extremely stable frequency.
An electronic oscillator circuit produces repetitive electric signal from a dc source. The circuit and operation principles of two main types of electronic oscillator (harmonic oscillator and relaxation oscillator) are completely different. The basic structure of a harmonic
oscillator is an electronic amplifier of which output is attached with an electronic filter network. The output of the filter network is feedback again into the input of the amplifier. In the beginning when the power supply of the circuit is switched on, the amplifier's output contains only noise. The noise travels through the filtering network is being filtered out. The output (or a portion of the output) is then re-amplified, filtered and feedback repeatedly until it gradually resembles the sinusoidal output. A piezoelectric crystal may take place of the filter network to stabilize the frequency of oscillation, resulting as a crystal oscillator. There are many techniques to implement the harmonic oscillators [1], because there are different ways to design an amplifier and filter network. On the other hand relaxation oscillator produces non-sinusoidal output wave such as a square or saw-tooth waves. This oscillator contains a nonlinear active component like as transistor is used for periodically charging and discharging the energy in a capacitor or inductor. The change of energy in the de-
vice causes abrupt variations on the output waveform and generates non-sinusoidal wave. Like as harmonic oscillator crystal oscillators are often preferred for generating a stable oscillation.
The integrated circuit is more reliable and stable to implement as an amplifier than discrete components amplifier circuit. Therefore, the CMOS circuits are best suitable for design of the active part of the oscillators with a quartz crystal unit. The current mode operations of analog circuits are more suitable for implementing in the CMOS integrated technology. They have a greater gain-bandwidth product than circuits operating in the voltage mode with the same transistors characteristics [2]. Thus current mode operations of analog circuits are suitable for high frequency analysis. The current conveyor is the basic building block for current mode operation. It can be used for realization of negative impedance converters (NICs) with current or voltage controlled negative input resistance. Such NIC circuits have a great gain-bandwidth product and static characteristics whose parameter can be easily modified to the optimal form for oscillator under design.
2 Electrical Model of the Crystal
A piezoelectric (quartz) crystal can be modelled as an equivalent electrical network with low impedance (series) and high impedance (parallel) resonance point spaced closely together as shown in Figure 1.
Figure 1: Crystal symbol and its electrical equivalent model
Using Laplace transform, form the equivalent model of the crystal the impedance of this network can be written as:
Z(5) = (1 /(1) + 1 + (1 /(s.C^a))
Or,
Z (s) =
s + s.^1 +
s.Co i
2	2
s' + s. -- +
(1)
From Equation (1) assume, 1

Ci + Co
and m =
p Vi C C
= 1 +
o
C1
Co
Or, «p
1 +
2C„
; when (C^» C,)
(3.a)
(3.b)
Where, s = jw, is the complex frequency, and wp are the series resonant and parallel resonant angular frequency in radians per second respectively. In this research work the design parameters of the crystal C0 = 6 pF, L, = 6.9 mH, C, = 0.02 pF and R, = 35 W are considered for generating 13.56 MHz frequency.
3 Equivalent Circuit of the CMOS Crystal Oscillator
The detailed schematic of the Colpitts crystal oscillator [3] and its equivalent circuit are shown in Figures 2(a) and 2(b) respectively. The nMOS transistor T, act as a negative resistance device and transistor T2 as a bias current source I^ respectively. The transistor T2 also performed as a current mirror for the reference current Iref in the same chip through nMOS transistor T5. It provides the stable current with respect to change of the power supply and temperature. The 5pF decoupling capacitor C4 is added to prevent the high frequency noise leakage from the oscillator. The grid bias resistor Rg combined with the two pMOS transistors T3 and T4 is provided the bias for the nMOS transistors T, and T2. The biasing is designated in such a way so that the transistors can always operate in the saturation region during the oscillation. The pMOS transistors T3 and T4 are set to be W/L as 0.6/4.0 for giving a bias voltage at
V
the node , as . The external capacitors C2 and C3
along with the piezoelectric crystal are worked as a reactive feedback network for three-point Colpitts oscillator circuit.
The capacitor C2 and C3 are selected as 10pF and 60pF respectively in this project. The MOSFET's parameters are used in this design as shown in Table In Figure
2(b) the equivalent circuit parameter, K =
1 +
C,
C
, the
ds2''
effective drain resistance of T, and T2 as, ras = (r^^, || r and finally Rp = Rc + (rds3 || rds4)are used. The drain resistance of T5 is considered as zero value since during the oscillation the capacitor C4 becomes short circuit.
(a)
b
C.
R.
(b)
ZL	Vgsi Si <l2
Hl-

GmVgsi
(I)
: C
.1,

Figure 2: (a) Schematic of a Colpitts crystal oscillator and (b) its equivalent circuit
4. Critical Transconductance gm
The critical transconductance gm of the transistor T1 is the minimum value which is essential for sustaining the oscillation of the circuit. Figure 2(b) is the simplified small signal equivalent circuit of the crystal oscillator where the passive motional impedance Zm is considered as the series R1L1C1 tank (resonant) circuit. The remaining part of the circuit which includes the passive as well as active components is considered as the load impedance ZL. On the basis of negative-resistance model of the oscillator, the oscillation may occur [4][5] only if,
Ri + Re {Zl (0
(4)
Here, Re {Zl (7®o)} is the real component of the impedance ZL at angular frequency w0 of oscillator.
If it is considered that, R1 = Re {Zl (7®o)} and m0 = 2n x13.56x106 rad/s, the critical transconductance of the transistor T1 is calculated as gm = 1.4 mA/V. Using a safety factor of about 4, the transistor T1 must have a critical gm = 5.6 mA/V. From MOSFET theory, the relation of gm with transistor's physical dimensions and process parameters are as follows
^ 2 ^„C
'0 *
W L
I.
(5)
The parameters, and C0x are defined by the process considered, W and L are the physical dimension of width and length of the transistor respectively. The parameter Id is the bias current of the transistor T1, in this design it was considered as 150 pA. The bias current Id can be calculated from the reference current Iref, in this design Iref has been considered as 300 pA. The aspect
ratio and the other parameters of the respective
transistors are shown in Table 1.
Table 1: Physical dimensions and parameters of the MOSFETs are used in the design. (Technology used 0.18 pm and process used for transistor model Level-3)
FET FET W L No. type (um) (um)
Aspect gm rds ratio W (mA/V) (MO)
T1
T2
T3
T4
T5
nMOS
nMOS
pMOS
pMOS
nMOS
13.0
1.0
0.6
0.6
2.0
0.2
0.2
4.0
4.0
0.2
65.0
5.00
0.15
0.15
10.0
5.600
0.450
0.008
0.008
0.850
0.01
0.1
50.0
50.0
0.04
5 Estimation of the Oscillation Frequency by the Feedback Model
According to the feedback theory, a circuit would be oscillating only, if the small signal close-loop gain of the circuit is greater than unity and the phase shift of the feedback loop is equal to zero (positive feedback). The closed-loop gain can be represented as Equation (6).
T (s) = ^(s) F (s)
(6)
Here, A(s) is the gain without feedback and F(s) is the feedback factor. From Figure 2(b), the value of the generated frequency can be calculated by Equation (7)

(L1.C1)

L

C + C
(7)
When the capacitors and inductors design values are
used in Equation (7), the generated frequency of oscil-
, . . rad , . lation is, ^ = 85.184x10'-, or, ^ = 13.557 x106Hz

1
6 Layout Design
The layout design is done in analog design mode by Mentor Graphics design tool kit ADK-3. The designed oscillator layout with an isolation buffer amplifier is shown in Figure 3.
Figure 3: The designed oscillator and an isolation buffer amplifier layout
To prevent the oscillator circuit from the substrate noise all the p-channel transistors are placed inside the n-well and the n-well is connected with the power supply rail Vdd In addition the n-channel transistors T, and T2 are surrounded by two guard rings which are connected to the substrate. The unused areas of the chip are filled with extra connection to the substrate and well-regions. To avoid the loading effect of the oscillator an isolation buffer amplifier is also designed on the same silicon chip. The oscillator including an analog buffer amplifier is occupied a die area of 27^m x 20^m. The amplitude of the oscillation is controlled carefully to prohibit the potential of the drain of T, and the source of T2 from exceeding power supplies Vdd and Vss respectively to prevent the latch-up effect.
7 Simulated Results
The simulated results are shown in Figure 4. The oscillator layout circuit is simulated which has been designed by using CMOS 0.18 ^m foundry rules together with a buffer amplifier as shown in Figure 3. Different VLSI design software are used for simulation purpose and it found the same performance of the circuit.
The maximum amplitude swing of the sinusoidal wave is 712 mVpp at power supply 2.2V, and power consumption is 1 25 mW The phase noise measured by simula-
tion is -139.5 dBc/Hz at 10 kHz offset frequency. The designed oscillator can start up reliably within a wide ranges of supply voltage (0.9~3.6V) and able to operate in a wide ranges of temperature (-10~65°C) to maintain a stable frequency.
(a)
Figure 4: (a) Build-up of oscillation and time domain signal of the oscillator, (b) frequency domain representation of the output signal
8. Discussion and Conclusion
A step by step procedure of integrated crystal oscillator design has been described. This design can be a guideline for a reliable short time start-up and low phase noise allowing frequency stability ± 7.0 kHz for 13.56 MHz RFID system. In ISO14443 standard this is essential for 13.56 MHz RFID system. Any additional capacitor
across the piezoelectric crystal causes the parallel resonance to shift downward. This technique can be used to adjust the oscillator frequency exactly at 13.56 MHz. The capacitors C2 and C3 values are affected the gain of the oscillator circuit and observed that lower the values higher the gain, again the gain is also affected by the
c
ratio c3, higher the value as the result of higher gain.
A buffer circuit is used in this design with the oscillator to derive a load during simulation. This buffer is used to isolate the load from the oscillator circuit which ensures the stable oscillation.
References
1.	W. Thommen, "An Improved Low Power Crystal Oscillator", Proceedings of the 25th European Solid-State Circuits Conference, ESSCIRC '99, 2123 Sept. 1999, pp. 146 -149.
2.	I. I. Ivanisevic and D. M. Vasiljevic, "The Quartz Crystal Oscillator Realization Using Current Conveyors'; IEEE Transaction on Circuits and Systems-I, Aug. l993, vol. 40, pp. 530-533.
3.	P. Andreani, W. Xiaoyan, L. Vandi, and A. Fard, "A Study of Phase Noise in Colpitts and LC-tank CMOS Oscillators", IEEE Journal of Solid-State Circuits, vol. 40 (5), May 2005, pp. 1107-1118.
4.	M. Toki and T. Huchisawa, "A Method of Analyzing Negative Resistive and Equivalent Capacitance of CMOS Crystal Oscillators', Electronics and Communications in Japan (Part II: Electronics), vol. 77(6), June 1994, pp. 72-80.
5.	B. Meskoob and S. Prasad, "Loop-Gain Measurement and Feedback Oscillator Design," IEEE Microwave and Guided Wave Letters, vol. 2(9), Sept. 1992, pp. 375-377.
Arrived: 21. 01. 2013 Accepted: 21. 05. 2013