ISSN 0352-9045 Informacije ( MIDEM Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), September 2015 Revija za mikroelektroniko, elektronske sestavne dele in materiale letnik 45, številka 3 (2015), September 2015 UDK 621.3:(53+54+621+66)(05)(497.1)=00 ISSN 0352-9045 Informacije MIDEM 3-2015 Journalof Microelectronics, Electronic Components and Materials VOLUME 45, NO. 3(155), LJUBLJANA, SEPTEMBER 2015 | LETNIK 45, NO. 3(155), LJUBLJANA, SEPTEMBER 2015 Published quarterly (March, June, September, December) by Society for Microelectronics, Electronic Components and Materials - MIDEM. Copyright © 2014. All rights reserved. | Revija izhaja trimesečno (marec, junij, september, december). Izdaja Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale - Društvo MIDEM. Copyright © 2014. Vse pravice pridržane. Editor in Chief | Glavni in odgovorni urednik Marko Topič, University of Ljubljana (UL), Faculty of Electrical Engineering, Slovenia Editor of Electronic Edition | Urednik elektronske izdaje Kristijan Brecl, UL, Faculty of Electrical Engineering, Slovenia Associate Editors | Odgovorni področni uredniki Vanja Ambrožič, UL, Faculty of Electrical Engineering, Slovenia Slavko Amon, UL, Faculty of Electrical Engineering, Slovenia Danjela Kuščer Hrovatin, Jožef Stefan Institute, Slovenia Matjaž Vidmar, UL, Faculty of Electrical Engineering, Slovenia Andrej Žemva, UL, Faculty of Electrical Engineering, Slovenia Editorial Board | Uredniški odbor Mohamed Akil, ESIEE PARIS, France Giuseppe Buja, University of Padova, Italy Gian-Franco Dalla Betta, University of Trento, Italy Martyn Fice, University College London, United Kingdom Ciprian Iliescu, Institute of Bioengineering and Nanotechnology, A*STAR, Singapore Malgorzata Jakubowska, Warsaw University of Technology, Poland Marc Lethiecq, University of Tours, France Teresa Orlowska-Kowalska, Wroclaw University of Technology, Poland Luca Palmieri, University of Padova, Italy International Advisory Board | Časopisni svet Janez Trontelj, UL, Faculty of Electrical Engineering, Slovenia - Chairman Cor Claeys, IMEC, Leuven, Belgium Denis Donlagic, University of Maribor, Faculty of Elec. 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Prispevke iz revije zajema ISI® v naslednje svoje produkte: Sci Search®, Research Alert® in Materials Science Citation Index™. Po mnenju Ministrstva za informiranje št.23/300-92 se šteje glasilo Informacije MIDEM med proizvode informativnega značaja. Design | Oblikovanje: Snežana Madic Lešnik; Printed by | tisk: Biro M, Ljubljana; Circulation | Naklada: 1000 issues | izvodov; Slovenia Taxe Percue | Poštnina plačana pri pošti 1102 Ljubljana Informacije imidem Journal of Microelectronics, Electronic Components and Materials vol. 45, No. 3 (2015) Content | Vsebina Original scientific paper W. Tangsrirat: 175 Voltage-mode Analog PID Controller Using a Single Z-copy Current Follower Transconductance Amplifier (ZC-CFTA) Izvirni znanstveni članki W. Tangsrirat: Analogni PID krmilnik v napetostnem režimu realiziran z enim dvo-izhodnim tokovnim sledilnikom, povezanim s transkonduktančnim ojačevalnikom (ZC-CFTA) M. Arunraja, V. Malathi, E. Sakthivel: 180 M. Arunraja, V. Malathi, E. Sakthivel: Distributed Energy Efficient Clustering Energijsko učinkovit algoritem distribuiranega Algorithm for Wireless Sensor Networks grozdenja brezžičnih senzorskih omrežij M. A. Sobhan Bhuiyan, J. Xien Chew, M. Bin Ibne Reaz, N. Kamal: Design of an Active Inductor Based LNA in Silterra 130 nm CMOS Process Technology 188 M. A. Sobhan Bhuiyan, J. Xien Chew, M. Bin Ibne Reaz, N. Kamal: Zasnova nizko šumnega ojačevalnika na osnovi aktivne dušilke s Silterra 130 nm CMOS tehnološkim procesom M. Trifkovic, D. Raic, D. Strle: 195 Digital Signal Processing for a Multi-Channel Chemical Sensor Interface M. Trifkovic, D. Raič, D. Strle: Digitalno signalno procesiranje več-kanalnega merilnega sistema za merjenje kapacitivnosti kemično modificiranih COMB senzorjev I. M. Moreno-Garcia, A. Moreno-Munoz, A. Gil-de-Castro, R. Real-Calvo, E. J. Palacios-Garcia, M. J. González-Redondo: Grid-Tied Smart Inverter Safety Functionality: Fast Power Quality Event Detection 204 I. M. Moreno-Garcia, A. Moreno-Munoz, A. Gil-de-Castro, R. Real-Calvo, E. J. Palacios-Garcia, M. J. González-Redondo: Varnostna značilnost pametnega omrežnega razsmernika: Hitra detekcija dogodka kvalitete moči B. Bertoncelj, K. Vojisavljevic, M. Vrabelj, B. Malič: 216 B. Bertoncelj, K. Vojisavljevic, M. Vrabelj, B. Malič: Thermal Properties of Polymer-matrix Composites Toplotne lastnosti kompozitov na osnovi polimerov, Reinforced With E-glass Fibers ojačenih s steklenimi vlakni Front page: Naslovnica: SEM micrographs of the BMC samples SEM slike BMC vzorcev (B. Bertoncelj et al). (B. Bertoncelj et al). 173 174 Original scientific paper Informacije Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 175 - 179 Voltage-mode analog PID controller using a single z-copy current follower transconductance amplifier (ZC-CFTA) Worapong Tangsrirat Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang (KMITL), Ladkrabang, Bangkok, Thailand Abstract: This paper endeavours to design a proportional-integral-derivative (PID) controller based on the use of single z-copy current follower transconductance amplifier (ZC-CFTA). The developed PID controller consists of one ZC-CFTA, two truly grounded passive components and virtually grounded passive components. It does not require any passive component matching, and the realized controller parameters are adjustable electronically. The effects of parasitic elements and tracking errors of the ZC-CFTA are also investigated. Simulation results in PSPICE demonstrate the workability of the proposed PID controller. Keywords: z-copy current follower transconductance amplifier (ZC-CFTA); proportional-integral-derivative (PID); analog controller; voltage-mode circuit Analogni PID krmilnik v napetostnem režimu realiziran z enim dvo-izhodnim tokovnim sledilnikom, povezanim s transkonduktančnim ojačevalnikom (ZC-CFTA) Izvleček: V tem članku si prizadevamo zasnovati proporcionalno-integralno-diferencialni (PID) krmilnik na osnovi enega samega dvo-izhodnega tokovnega sledilnika, povezanega s transkonduktančnim ojačevalnikom (ZC-CFTA). Razviti PID krmilnik je sestavljen iz enega ZC-CFTA, dveh zares ozemljenih pasivnih komponent in dveh navidezno ozemljenih pasivnih komponent. Parametri realiziranega krmilnika so elektronsko nastavljivi in ujemanje pasivnih komponent ni potrebno. Raziskani so tudi efekti parazitnih elementov in napake sledenja ZC-CFTA. Rezultati simulacij v PSPICE-u pokažejo izvedljivost predlaganega PID krmilnika. Ključne besede: dvo-izhodni tokovni sledilnik, povezan s transkonduktančnim ojačevalnikom (ZC-CFTA); proporcionalni-integralni-diferencialni (PID) krmilnik; analogni krmilnik; vezje v napetostnem režimu * Corresponding Author's e-mail: rworapong@gmail.com 1 Introduction The ubiquitous proportional-integral-derivative (PID) on different high-performance active elements, such controllers are the most widely-used controllers in as operational transconductance amplifiers (OTAs) [3], process industries, and gained widespread industrial current differencing buffered amplifiers (CDBAs) [4], acceptance for many decades [1]. This is owing to the current-controlled current conveyors (CCCIIs) [5], sec- attribute that they offer many good features, such as ond-generation current conveyors (CCIIs) [6]-[8], and simplicity of design, low cost, robustness and wide ap- current feedback operational amplifiers (CFOAs) [9]. In plicability, as well as easy tunability of their parameters [3]-[5], the signal flow graph synthesis procedures for [2]. The enormous literature on PID process controllers realizing analog PID controllers were presented. In ac- includes a wide variety of design approaches based tive circuit realizations, they contain too many active 175 © MIDEM Society W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179 and passive components. The CCII can also be applied to construct PID process controllers, as demonstrated in [6]-[8]. However, at least two CCIIs and five passive components are required for these realizations. The work in [9] proposed a PID controller using a single CFOA. Although the circuit employs only one active component, it does not exhibit the feature of electronic tuning, and the passive components used in its construction are floating. In 2008, the conception of the z-copy current follower transconductance amplifier (ZC-CFTA) has been introduced [10]. This device is a modified version of the conventional current differencing transconductance amplifier (CDTA) [11] by replacing the current differencing unit with a current follower and complementing the circuit with a simple current mirror for copying the z-terminal current. Therefore, the ZC-CFTA element is a cascade connection of the dual-output current follower and the operational transconductance amplifier. As a result, the capability of applications based on ZC-CFTAs is extended [12]-[14]. Our purpose in this study is to present an alternative circuit configuration for realizing an analog voltage-mode PID controller based on the use of the ZC-CFTA as an active element. The configuration uses only one ZC-CFTA, cooperating with four grounded passive elements, i.e. two truly grounded passive components and two virtually grounded passive components. The circuit also does not need passive element matching. Three realized parameters of the presented PID controller can be tuned to the desired valued by the transconductance (gm) of the ZC-CFTA. In addition, the ZC-CFTA non-ideality effects including finite parasitic elements and transfer errors on the controller behavior are examined in detail. Also, PSPICE simulations are performed to demonstrate the performance of the presented controller circuit, and to verify the theoretical expectations. 2 ZC-CFTA Principle and Realization The ZC-CFTA is a versatile active circuit building block, which is made by the cascade connection of two essential circuit blocks, i.e. a dual-output current follower at the front end, and an operational transconductance amplifier at the rear end. Fig.1 shows the electrical symbol and equivalent circuit of the ZC-CFTA. As shown in Fig.1, this device consists of a low-input-impedance current terminal (f) and three high-output-impedance current terminals (z, zc and x). The characteristic of an ideal ZC-CFTA can be represented by the following expression [12]-[14] : (a) ZC-CFTA f f x ix ^ z zc i'i I vz vzc -<3 Vx (b) f VfO- f -o Vx -oVz, -O Vz Figure 1: The ZC-CFTA. (a) circuit symbol, (b) equivalent circuit. i = i = i. and i = g v zc z f x m z (1) where gm denotes the small-signal transconductance gain of the ZC-CFTA. In general, the value of gm depends on the external supplied current. The possible BiCMOS implementation of the ZC-CFTA used in this work is illustrated in Fig.2. Transistors Q1-Q7 act as a dual-output current follower that follows an input signal current (f) to output currents flowing through terminals z and zc (iz and izc). Group of transistors Q8-Q14 functions as an operational transconductance amplifier, which converts the impressed voltage at terminal z into the signal current at terminal x (ix) by the transconductance gm. From small-signal circuit analysis of this structure, the transconductance value gm depends on an external biasing current l0, and can be expressed as [14] : gm _ Io 2Vt (2) +v Qsdir f s Q JhH^Q : 0 © q)i- d> © Figure 2: BiCMOS realization of the ZC-CFTA. zc x zc z Q I Q ; -v 176 W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179 In addition, VT is the usual thermal voltage, approximately 26mV at 27°C. 3 Proposed PID Controller Realization The circuit implementation of the PID controller based on the use of the ZC-CFTA as an active component is shown in Fig.3. As can be seen, the proposed controller comprises one ZC-CFTA, two virtually grounded passive components (R, and C,), and two truly grounded passive components (R2 and C2). These grounded passive elements can compensate for the parasitic impedances at their corresponding nodes. The circuit analysis of the proposed PID controller circuit in Fig.3 yields the following voltage transfer function : C, C and g . It is further to be noted that the g -value can be used as a tool to tune the controller parameters for compensating the deviation from the ZC-CFTA non-ideality or the errors in passive component values. 4 Non-ideal Performance Analyses 4.1 Tracking Error Effects In non-ideal case, the current transfer from terminal f to terminals z and zc, as well as, the current at terminal x may differ from ideal values due to the current tracking error, and transconductance inaccuracy. Considering these errors, the terminal relationships of the non-ideal ZC-CFTA can be rewritten by : KJsl Vn (s) fRL + gmR1C1 A R C 2 + gmR2 SRC2 + sR2Cx (3) In general, the voltage transfer function of an analog PID controller can be expressed as [15] : V (s) 1 ^ou^l = K + _L + sTd Vin (s) p sTi d (4) where Kp is the proportional gain, T is the integral time constant and Td is the derivative time constant. Therefore, by comparing eq.(3) with eq.(4), the three parameters of the realized PID controller in Fig.3 are found out to be : Kp = R2 + SmCl A R T = R1C2 ' gmR2 And Td - R2C1 (5a) (5b) (5c) From eq.(5), the above three coefficients can be adjusted by appropriately setting the values of R1, R2, Ri Cl ZC-CFTA f x z zc 1C ^ C2 lR2 -o Vout i = i = ai, and zc z f i = ña v x "-/m z (6) where a is the current tracking error, and b is the transconductance inaccuracy parameter. By repeating the analysis of the proposed PID controller circuit in Fig.3 and taking into account the parameters a and b of the ZC-CFTA, the controller parameters Kp, T. and Td can be obtained as : Kp =aR2 P 2 T =- V R1C2 R ' aßgmR2 And Td =aR2C1 (7a) (7b) (7c) As can be seen from eq.(7), the values of all PID controller parameters are slightly altered by the influences of the ZC-CFTA current tracking error and transconductance inaccuracy. To compensate for these small deviations, the gm-parameter can be tuned by means of the ZC-CFTA bias current (IO). On the other hand, if the controlled-gain current follower transconductance amplifier introduced in [16] is employed instead of the ZC-CFTA in Fig.3, the parameters a and b can be tuned by the controllable transfer gains to obtain the desired Kp, T and Td values, or to compensate for the small errors that occur in their values. The inspection of eq.(7) indicates that the relative sensitivities of the three controller parameters with respect to the active and passive component values are found within unity in magnitude. In consequence, this controller circuit possesses low sensitivity performance. Figure 3: Proposed PID controller realization. V 177 W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179 4.2 Parasitic Element Effects The practical model of the ZC-CFTA including essential parasitic elements is shown in Fig.4. As it is shown, the f-terminal exhibits the low-value serial parasitic resistance Rf and the z, zc and x-terminals exhibit large parasitic resistances R_, Rzc, and Rx in parallel with low-value parasitic capacitances C, Czc and C, respectively. When the circuit in Fig.3 is re-considered by taking the mentioned parasitic elements into account, the following assumptions can be made. (a) Since the z-terminal is terminated by the external capacitor C2, an extra parasitic pole w1 is introduced by Rz and C2 (assuming C2 >> C) at low frequencies, namely w1 @ 1/RzC2. For close to ideal operation at low frequencies, the operating frequency should be selected 10 times higher than w1. Thus, the low-frequency range of the proposed controller can be approximated as : a> 10« =aL (8) (b) The external grounded resistor R2 is connected in parallel with the parasitic impedances (Rzc//Czc) and (RJ/C) of terminals zc and x. The extra pole w2, which is approximately equal to w2 = 1/(R2//Rzc//Rx) (Czc//Cx), appears only the high-frequency region of characteristic. Usually R2 << Rzc//Rx, the pole w2 is located at about w @ 1/R,(C //C). Thus, to obtain ideal 2 2v zc x ' response, the maximum operating frequency of the controller should be chosen as : (9) (c) In conclusion, combining eqs.(8) and (9), the useful frequency range of the proposed PID controller circuit in Fig.3 can be defined simply as : (10) Ideal ZC-CFTA Rf -AAÁH f' x' z zc' Rx Rz i||—V^V—i' Hh' cz tz tzc -1 ' n Rzc . '1—Wv—1|| --HIM» C zc -o x z zc Figure 4: Non-ideal ZC-CFTA model including essential parasitic elements. 5 Simulation and Comparison of the Results The performance of the proposed PID controller circuit in Fig.3 has been evaluated by means of PSPICE simulation. In simulations, the ZC-CFTA structure given in Fig.2 was characterized by 0.35-|mm real BiCMOS process parameters. Transistor aspect ratios (W/L in |mm/|im) were 7/0.35 and 14/0.35 for all the NMOS and PMOS transistors respectively. The circuit was biased with the following conditions: ±V = 1 V and IB = 50 ||A. For our design example, the following active and passive component values were chosen: gm = 1 mA/V (IO = 52 ^A), R1 = R2 = 1 kW and C1 = C2 = 1 nF. In this setting, the corresponding controller parameters were obtained as: Kp = 2, T. = 10-6 s and Td = 10-6 s. The total power consumption of the proposed controller is measured as approximately 23.7 mW. Fig.5 shows the ideal and the simulated frequency responses of the proposed PID controller circuit in Fig.3. As can be seen from the results, the ideal values and the simulation results are in agreement between 150 Hz and 1 MHz. It should be noted that the differences between the two responses in low- and high-frequency regions can be attributed to two extra parasitic poles w1 and w2, respectively. Figure 5: Ideal and simulated frequency responses of the proposed PID controller configuration of Figure 3. To illustrate the time-domain characteristic of the proposed PID controller circuit, a 50-mV step signal voltage with 100-ns rise time is applied to the input of the circuit. Both ideal and simulated output voltage responses vout are shown in Fig.6. From this result, an overall proportional action of the controller is obvious in the 0-100 ns period. At 100 ns, the sudden decrease in the controller output is due to the derivative action, since the input signal of the controller changes at a faster rate. After 100 ns, the action of the integral control mode is introduced. The controller output increases almost linearly since there is no change in the input for this period of time. As previously mentioned, the discrepancy between the ideal and the simulated results can be attributed to the parasitic impedances 75 ^ 50 25 1U Ik 100k 1M 100M x C x 178 W. Tangsrirat; Informacije Midem, Vol. 45, No. 3 (2015), 175 - 179 r ...... - - Ideal response Simulated respor / y se / / \ _ — — Time (^s) Figure 6: Step responses of the proposed PID controller configuration of Fig.3. of the ZC-CFTA, most notably the finite port resistances R, R and R. z zc x 6 Conclusions In this paper, a simplified structure of the PID controller with single ZC-CFTA is introduced. The introduced PID controller has been realized using a minimum number of passive components, without requiring a passive component-matching constraint. The controller gains are adjustable by tuning the gm-value of the ZC-CFTA. The effects caused by the parasitic elements and the transfer errors of the ZC-CFTA are also discussed. Simulation results confirm the theoretical analysis. 7. Acknowledgements This work was supported by the Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang (KMITL). The authors are also thankful to the reviewers for their valuable comments and helpful suggestions, which substantially improved the quality of the manuscript. 8 References 1. K. Astrom, T. Hagglund, PID Controllers : Theory, Design and Tuning, 2nd edition, North Carolina, Instrument Society of America, 1995. 2. S. Bennette, "Development of the PID controller", IEEE Control Systems Mag., vol.13, no.6, pp.58-65, 1993. 3. C. Erdal, A. Toker, A. Acar, "OTA-C based proportional-integral-derivative (PID) controller and calculating optimum parameter tolerances", Turk. J. Elec. Engin., vol.9, no.2, pp.189-198, 2001. A. U. Keskin, "Design of a PID controller circuit employing CDBAs" Int. J. Elect. Eng. Educ., vol.43, no.1, pp.48-56, 2006. C. Erdal, H. Kuntman, S. Kafali,"A current controlled conveyor based proportional-integral-derivative (PID) controller'; J. Electrical Electron. Eng., vol.4, no.2, pp.1243-1248, 2004. S. Minaei, E. Yuce, S. Tokat, O. Cicekoglu, "Simple realization of current-mode and voltage-mode PID, PI and PD controllers', Proc. IEEE Int. Symp. Industrial Electron., Croatia (2005) 20. E. Yuce, S. Tokat, A. Kizilkaya, O.Cicekoglu, "CCII-based PID controllers employing grounded passive components', Int. J. Electron. Commun. (AEU), vol.60, no.5, pp.399-403, 2006. E. Yuce, S. Tokat, S. Minaei, O. Cicekoglu, "Low-component-count insensitive current-mode and voltage-mode PID, PI and PD controllers', Frequenz, vol.60, no.3-4, pp.29-33, 2006. M. Sagbas, M. Koksal, U. E. Ayten, "Design of dominantly proportional PID controller using a single commercially available active component', Proc. Int. Conf. Telecom. Signal Process., Italy, pp.427-430, 2013. D. Biolek, R. Senani, V. Biolkova, Z. Kolka, "Active elements for analog signal processing: classification, review, and new proposals', Radioengineering, vol.17, no.4, pp.15-32, 2008. D. Biolek, "CDTA- Building block for current-mode analog signal processing', Proc ECCTD'03, vol. III. Krakow, Poland, pp.397-400, 2003. N. Herencsar, J. Koton, K. Vrba, I. Lattenberg, "Current follower transconductance amplifier (CFTA) - A useful building block for analog signal processing', J Active Passive Electronic Devices, vol.6, no.3-4, pp.217-229, 2011. J. Satansup, W. Tangsrirat, "Realization of current-mode KHN-equivalent biquad filter using ZC-CFTAs and grounded capacitors', Indian J Pure & Appl Phys, vol. 49, pp. 841-846, 2011. W. Tangsrirat, P. Mongkolwai, T. Pukkalanun, "Current-mode high-Q bandpass filter and mixed-mode quadrature oscillator using ZC-CFTAs and grounded capacitors", Indian J Pure & Appl Phys, vol. 50, no. 8, pp. 600-607, 2012. R. C. Dorf, R. H. Bishop, Modern Control Systems, 11th-edition, New Jersey, Pearson prentice Hall, 2008. W. Tangsrirat, "Gm-Realization of controlled-gain current follower transconductance amplifier', The Scientific World Journal, vol. 2013, Article ID 201565, 8 pages, 2013. doi:10.1155/2013/201565. Arrived: 24. 09. 2014 Accepted: 02. 08. 2015 1 0. 11. 1 2. 13. 1 4. 15. 16. 0.8 10 179 Original scientific paper_ Informacije ïmidem Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 180 - 187 Distributed Energy Efficient Clustering Algorithm for Wireless Sensor Networks Muruganantham Arunraja, Veluchamy Malathi, Erulappan Sakthivel Department of Electrical and Electronics, Anna University, Regional Centre, Madurai Abstract: Wireless sensor networks (WSN) are powered by finite energy source like batteries, which imposes stringent energy boundaries. Clustering of nodes avoids redundant message transmissions over the network. Thus conserves energy, communication bandwidth and achieves scalability. Here we propose a Distributed Energy Efficient Clustering Algorithm (DECA), a deterministic clustering approach where Cluster Heads (CHs) are selected based on their residual energy and priority using passive clustering technique. Nodes then associate with the CH with least communication cost and high residual energy. This method achieves longer life span than the previous energy efficient clustering algorithms in both homogeneous and heterogeneous networks. DECA has extended the WSN life span to 30% in the homogeneous environment and 50% in the multi-level heterogeneous environment. Keywords: Wireless sensor networks; energy conservation; distributed clustering Energijsko učinkovit algoritem distribuiranega grozdenja brezžičnih senzorskih omrežij Izvleček: Brezžična senzorska omrežja (WSN) so napajana z omejenim virom napajanja, kot so baterije z strogimi omejitvami. Groznenje vozlišč odpravi prenose redundančnih sporočil, kar omogoča varčevanje energije in pasovne širine ter omogoča širitev. V članku predlagamo energijsko učinkovit algoritem distribuiranega grozdenja (DECA), deterministični način grozdenja, pri katerem je glava grozda (CHs) temelji na preostanku energije in prioriteti, z uporabo pasivne tehnike grozdenja. Vozlišča so združena z CH z minimalno ceno komunikacije in visokim ostankom energije. Z razliko od prejšnjih rešitev omenjena metoda omogoča daljšo energijsko neodvisnost v homogeneih in heterogenih omrežjih. DECa omogoča 30 % daljšo delovanje WSN v homogenih okoljih in 50 % veščjo v večnivojskih heterogenih okoljih. Ključne besede: brezžično senzorsko omrežje; varčevanje z energijo; distribuirano grozdenje * Corresponding Author's e-mail: researcharunraja@gmail.com 1 Introduction As the wireless sensor nodes are self-contained systems with limited energy resource, the life span is finite. By conserving the on board energy, the system life span can be increased, hence ensuring continued service. Clustering is an efficient hierarchical routing approach to conserve energy, where only a set of nodes performs the routing operation and therefore reducing the amount of redundant transmissions and collisions. Due to its reduced deployment cost, smaller form factor and increased computing power, WSN are an inevitable element of today's industrial, military and medical establishments. Due to their ease of installation and lesser maintenance they proliferated to various disciplines. WSN consists of autonomous sensor nodes that are spatially distributed over the specific region to report about one or more parameters of interest. In a conventional WSN, densely deployed nodes sense data from the environment, pre-process it and communicate it to the sink node. As the sensor nodes are self-contained systems with limited energy resource, the life span is finite. Most of the WSNs are deployed in hostile environments, where recharging is a difficult task. By conserving the on board energy, the system life span can be increased, thus ensuring continued service. The tenacity of WSN is to collect accurate data for longer time span. Data accuracy is improved by increasing sampling frequency. Increased sampling 160 © MIDEM Society M. Arunraja et al; Informacije Midem, Vol. 45, No. 3 (2015), 180 - 187 frequency, results in increased energy cost, thus reduces the life span. This imposes a conflict between data accuracy, and energy efficiency. The solution for the problem is derived by estimating the temporal correlation between the node data in time domain. The temporal correlation intimates the amount of redundant data communicated. By reducing the redundant data both accuracy and energy efficiency can be achieved. Temporal correlation can further be exploited to predict the future data from historical data. By effectively modeling the temporal correlation of a measured signal, a substantial amount of data transmission can be reduced. In the physical space nearer sensors measure almost equal values due to their close proximity. In a denser network, nodes generate a hefty amount of spatially redundant data. Clustering of nodes can filter out the spatially redundant data locally. Clustering suffers inefficiencies when two or more CHs happened to be in close proximity or when the data load is not equally balanced between CHs. In certain clustering approaches, the clustering process itself consumes significant energy, due to its communication overheads. The proposed clustering approach addresses the above mentioned problems, thus makes clustering more efficient. Here the clustering is initiated by a node that proclaims itself as CH. The neighbors of the node join the cluster as cluster members. Each node would like to become CH, but the proclamation delay of a node is inversely proportional to its weight. This passive clustering process reduces the clustering overhead, by avoiding data sharing between contending nodes. The cluster size is increased with respect to the distance from the base station, so as to balance the load between near and remote CHs. The one hop neighbors of the CH are disqualified from the contention to become CH, to avoid the formation of nearby CHs. Then from the rest of the nodes highest weight node initiates clustering. This continues until all the nodes are clustered. Clustering suffers inefficiencies when two or more CHs happened to be in close proximity or when the data load is not equally balanced between CHs. In certain approaches, the clustering process itself consumes significant energy, results in less efficiency. An ideal clustering process should have least overheads and should assure energy efficient data collection along with uniform distribution of CHs. 2 Related works Numerous works done on energy efficient clustering of WSN, yet most of the work concentrates on energy efficiency and data accuracy. Long term coverage of region of interest is not addressed in any of the works. The distributed sensor network is said to be efficient only if it covers a larger portion of the region of interest for a longer time span. The proposed work considers energy efficient coverage as its major point. Energy conservation in WSN is analyzed by different approaches [1]. Some methods take up energy efficient routing as one of the tools for energy balancing between wireless nodes [2]. Some methods employ MAC based schemes, which ON/OFF the node circuitry in appropriate time slots so that energy expense can be drastically reduced [3]. Spatial correlation among the sensor nodes is used to reduce the data transmission by employing clustered aggregation schemes. Different kinds of clustering methods are listed by Younis et al [4]. Clustering is done in WSN in different application to achieve different goals. Clustering may be centralized [5], where the base station collects the node parameters and announces the cluster heads and their cluster members. This one is effective for the small scale network. For large scale networks, distributed clustering methods [6] suit well, where the clustering, decision is made by individual sensor nodes by acquiring only local information from one hop neighbors. Clustering may also consider a single hop [7] or multi hop networks [8]. Usage of heterogeneous nodes [9] reduces the overhead during CH election. LEACH [7] is one of the earliest and most sought clustering methods for energy efficiency WSN. The problem with leach is a random selection of CH which results in proximate CHs and unbalanced load distribution. There are other works [10], which depicts the node degree as one of the selection criteria for CH selection. In [11], clustering is done by identifying similarity between sensor data. The nodes send their data to the base station, where the nodes are assigned to the appropriate cluster based on data similarity. Different clustering approaches use different parameters for CH selection, based on the selection criteria, the algorithms can be divided. Deterministic algorithm [12] takes into account of node degree and node id etc., where these parameters are fixed during the deployment itself. Adaptive algorithms [13] consider the residual energy of node, mobility etc. These parameters vary over the operational span of the network. Hybrid algorithms [14] consider both the 181 A. Buririen et al; Informacije Midem, Vol. 45, No. 2 (2015), 160 - 170 deterministic and adaptive parameters for cluster head selection. Several works done on exploiting temporal correlation of data, where linear regression methods are used to calculate the temporal relation between time series generated by sensors [15]. The schemes suffer from reduced accuracy and lack of adaptability towards dynamic variations in input signal. In [16], ARIMA based methods are used to predict the sensor data from previous values. Saintini et al [17] proposed a dual prediction scheme using LMS based adaptive filters. The advantage of this method is its ability to converge the prediction, without any prior model [18]. The scheme can still be improved by adapting the internal parameters. Most of the existing literature either concentrates on spatial correlation based data aggregation or on temporal correlation based data reduction. DECA exploits spatio-temporal correlation between sensory data for energy efficient data collection and also it maintains maximum level data integrity. The work involves simple and computationally light weight algorithms, which makes the implementation simpler and less energy consuming in terms of computational cost. To achieve energy efficiency, numerous clustering approaches have been proposed. LEACH [7] selects CH on a random probability, which results in proximate CHs and unbalanced load distribution. SEP [19] assigns a weighted probability to each node based on its initial energy, where advance nodes get more chances to become a CH. In DEEC [20],CH formation is based on the residual energy of the entire network and residual energy of the node that wants to become a CH. Since SEP and DEEC are probabilistic clustering approaches, there might be cases when two CHs are selected in close vicinity of each other, increasing the overall energy expense of the network. Secondly, the number of CH nodes generated is not fixed, hence in some rounds it may be more or less than the preferred value. Deterministic protocols eliminate uncertainty over the number of CHs and CH election. The weighted clustering algorithm [21] selects a node as a CH based on its weight. The weight of an individual node signifies the remaining battery energy, degree, mobility, and distances with the neighbors. Distributed clustering algorithm (DCA) uses application based weights of a node to select it as the CH [22]. Both the algorithms necessitate extensive control messages to construct a cluster, which makes them suitable only for a small wireless sensor network. DECA is an energy aware passive clustering algorithm, where the clustering is performed without communicating nodal parameters. The DECA algorithm considers only self-estimating parameters for CH selection, thus a single announcement is enough to select a CH. The selection parameters are highly dynamic and support in better distribution of the load among sensor nodes. This forms energy efficient clusters with minimal clustering overheads. 3 Deca The proposed DECA constructs the energy efficient clusters in two phases. The DECA consists of the following functional modules: - An energy aware passive clustering approach that reduces clustering overheads and assures uniform energy distribution. - A node association approach based on residual energy and communication cost of a CH. The proposed work makes the following assumptions before designing the energy efficient protocol. - Topology is static - All nodes are aware of their location - All the cluster members can reach CH in one hop - CH can reach the base station in one hop or multiple hops The actual purpose of creating clusters is to reduce the energy consumption of the sensor nodes and the bandwidth requirement for the network. The clusters in the network are attributed by a single CH, connected to multiple sensor nodes nearby. The sensor nodes transmit their data to the cluster head, which aggregates the data and forwards it to the base station. This process moderates the energy expense of the nodes and decreases the probability of data collisions. The energy model of the conventional cluster is given as y (Dj + E + Eda ) + lagFt . ieN jeN (1) Where yij = 1, if node 'j' is a cluster member of the CH node 'i. y = 0, otherwise. l, the length of data packet from cluster member to CH. E, energy spent for receiving a data bit. EDA, data aggregation energy lag, length of aggregated data packet x=1, if node 'i' is a CH. x=0, otherwise. 162 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 The data transmission energy from the cluster member to CH is given as D..... = \E + efid¡ ; if dy< do \E + emndt ;fd j > d0 (2) Where d the distance from sensor node 'i' to sensor ij node j. d0 , the threshold distance. eft , amplifier energy emp , amplifier energy The data transmission energy from CH to Base Station is given as F = E + efsfi ';if fj < d0 E + £mpfi4 ;f f > d0 (3) Where f, the distance from CH node 'i' to Base station. 3.1 Energy Efficient CH election In the proposed work, higher energy nodes are elected as CH to attain energy efficiency. To distribute the load uniformly among the nodes, node priority is considered. Both the components constitute for the weight of the node. To reduce the energy consumption during clustering process, the passive clustering method has been proposed, where the proclamation delay is defined as the function of node's weight. 3.1.1 Weight Calculation of Node In this work, each node is assigned with specific weight based on its suitability to become CH. The election of the CH is done on the basis of the largest weight among the neighbors. This means that a node becomes a CH or a cluster member, depending on its own and one hop neighbor's weights. In WSN, there are several heuristics for selecting CHs. Node energy, node degree, distance from the Base Station(BS), node ID and cumulative time for which the node acted as CH (node priority) are the prominent heuristics. Since CHs are overloaded with multiple tasks, the rate of energy depletion is also high. Hence the CH elected should have high residual energy. Thus, for an energy efficient clustering approach, residual energy is the major indicator for the dominant set of nodes in both homogeneous and heterogeneous (energy) networks. Acquiring residual energy is again an internal task, doesn't need any communication. 3.1.2 Passive Clustering In passive clustering, Cluster head is selected based on "first declaration wins" rule, therefore the node that first proclaims becomes the CH. In the earlier works, the proclamation delay is random. Random delay may results in selection of low energy nodes as CH, hence decreases the energy efficiency of the system. In the proposed work, to elect most appropriate nodes, the proclamation delay is made inversely proportional to the node's weight. Once the proclamation delay expires, the node proclaims itself as CH. If a node hears a proclamation before the expiration of its proclamation delay, it refrains itself from the contention to become CH. The waiting time T of node n is given as Tw (n) = K Eres (n) (4) Where k is a constant; 3.2 Node Association When the node proclaims as CH, it advertises its residual energy and location information along with the proclamation. If a non CH node receives multiple proclamations, the advertisement serves as a key factor for selecting the most appropriate CH. The proclamation message format is indicated in table.1.Based on this information, a non-CH node estimates CH's compatibility towards it. Table.1: CH proclamation format CH ID CH Residual Energy CH Location Due to diverse communication overheads and functionality, there is an asymmetry of energy between various nodes. Hence a good design for data collection should not put heavy burdens on low energy sensor nodes. Instead, the heavy burdens should be assigned to the high energy sensor nodes. The CH residual energy component helps in identifying the CH with highest energy near the sensor nodes. If the CH is situated between the sensor node and BS, the communication cost will be reduced considerably. The CH location component helps in calculating the communication cost of the node to forward the data to BS through that CH. Thus the CHs location information has a crucial role in node association. Based on this information a non-CH node selects a CH, so that the total data transmission distance is minimized. The communication cost through a CH is estimated from the node to CH distance d and CH to BS distance „. The toCH CHtoBS 183 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 goal of the node associated process is to minimize the tOtal distance-[Min (dtoCH+dCHtoBS)] The node selects CH with highest residual energy and lowest communication cost. The CHs aptness is the ratio between the residual energy of the CH and communication cost through this CH to BS. If a node 'i' receives 'n' CH proclamations, the node estimates the weight of each CH as WCH (n.) = E(n) / F(ni) (5) Where F(ni), communication cost of node 'i' through CH (n) to BS. i Fn — LEelect+L Gfs d (6) L: size of data packet Eelect: Energy consumed by RF Module e^: RF Amplifier energy d: Total distance from the node to BS The node then associates with the highest weight CH in its vicinity. The CH with minimum residual energy is elected by very few nodes. This avoids repeated loading of few CH nodes. 4 Results and discussion Here we evaluate the performance of DECA protocol using MATLAB. The proposed work has been simulated on a network consists of 100 randomly distributed nodes in a 100m X 100m field. We assume the base station is in the center of the sensing region. The radio parameters used in our simulations are shown in Table 2. The proposed DECA approach is compared with other energy efficient clustering protocols like LEACH, SEP and DEEC. The life time of nodes and total packets transmitted are estimated on both homogeneous and heterogeneous nodal energy levels. The life time is classified into stable period (until first node dies) and lasting period. The effectiveness of the clustering is measured by the ratio between stable period and unstable period. Table.2: Simulation Parameters Eda 5 nJ/bit/message do 70 m Message size 4000 bits Popt 0.1 In a homogeneous environment all the nodes are assigned with equal energy. DECA elects CHs based on residual energy and cumulative time the node acted as CH. Thus, in the homogeneous environment, DECA efficiently balances the load between multiple nodes and achieves longer stable period [Fig.1]. The stability period is elongated to 1110 rounds, compared to 910 rounds of LEACH protocol that has the second longest stable period. 800 1(11» 12«0 UOO 16® 1400 2 (HO No d Rouxis Figure 1: Node lifetime in homogeneous network We then observe the performance of LEACH, SEP, DEEC and DECA under two different two-level heterogeneous networks. Fig.2.shows the performance when fraction of advanced nodes 'm' kept at 0.2 and additional energy factor 'a' set as 3. In another scenario 'm' is set at 0.3 and 'a' as 2. The unstable region of SEP and LEACH are also larger than our DECA protocol; it is because the advanced nodes die more slowly than the normal nodes in SEP and LEACH. III! Illl (.mil 4P ».If DtTA LI.U'H Mr MIX CtJC* Parameter Value E 50nJ/bit £fs 10 pJ/bit/m2 ^mp 0.0013 pJ/bit/m4 Eo 0.5 J Figure 2: Stability period comparison in two-level heterogeneous network For multi-level heterogeneous networks, the initial energy of nodes is randomly distributed in [E0,4E0]. 184 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 The DECA protocol exhibits longer life span in the heterogeneous energy environment than all the protocols compared. The stability period is elongated from 1500 rounds (DEEC) to 2200 rounds as shown in fig.3. This is because LEACH treats all the nodes without discrimination. SEP has longer stability period than LEACH just because of discriminating nodes according to their initial energy. DEEC take initial energy and residual energy into account at the same time. The longer life span of DECA is attributed to the energy efficient selection of CHs and minimized data transmission distance. no 1110 90 70 in it S 60 Z a, w 3 « M H id î -—LEACH mmmmm-mm SEP ; -----DEEC i .......t....., .......;......Oj ! -0 ECA j j i i ! ; 1 ii | iii j ! : t % j ! \ i \] __1___J....... i 1 1 S. .i .... : ! i i n\ j i. "v. i 1 v*.....-j... - r-»-i t 50D 1U 1500 2000 SCO 3000 35011 J001 4500 51)011 NoolRowxis Figure 3: Node lifetime in multi-level heterogeneous network We also examine the sensitivity of DECA to the degree of heterogeneity in the network by increasing the 'm' value from 0.1 to 0.9 and'a'from 0.5 to 5.Being an energy-aware deterministic protocol, DECA outperforms other energy efficient clustering protocols. The difference between the stability period of DECA and other protocols increases with an increased fraction of advanced nodes'me'as indicated in Fig.4. 9.2 II 04 OS 0 6 0 7 0B 0 9 Fraction o) AtMJnced Nodes Figure 4: Round of First Node Dies for Different m when a= 2 The performance of DECA is observed to be close to that of an ideal upper bound obtained by distributing the additional energy of advanced nodes uniformly over all nodes in the sensor field. DECA is more resilient than LEACH in judiciously consuming the extra energy of advanced nodes. Thus DECA yields a longer stability period for higher values of extra energy as in Fig. 5. Figure 5: Round of First Node Dies for Different awhen m=0.3 Fig.6. Shows the comparison of every protocol for number of packets that are sent to BS. Result shows Figure 6: Packets sent to the BS Vs. Rounds That DECA has highest successful data rate, as compare to other routing protocols. DECA achieves highest data rate along with longer stability period. 5 Conclusion Our contribution involves a deterministic CH election protocol (DECA) that holds the distributed property of probabilistic models. Secondly, a novel node association technique is introduced through which 185 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 nodes join with the most appropriate CHs that are 9. having least communication cost and high energy. The node association part, assures load is taken up by only high energy nodes. The network's energy 10. expenses are reduced by shorter data paths. Thus DECA achieves uniform distribution of CH and longer stability period. DECA has extended the WSN life span to 30% in the homogeneous environment and 50% in the multi-level heterogeneous environment. The work 11. shows good results in various kinds of heterogeneous environments. Future work involves construction of multi-level clusters using temporal correlations between sensor data. 6 References 1. G Anastasi, M Conti,M Di Francesco, A Passarella, "Energy conservation in wireless sensor networks: A survey'; Ad Hoc Networks 7 (3), 537-568, 1041, 2009. 2. J. Heo, J. Hong, and Y. Cho, "EARQ: energy aware routing for real-time and reliable communication in wireless industrial sensor networks," IEEE Transactions on Industrial Informatics, vol. 5, no. 1, pp. 3-11, 2009. 3. D. Ganesan, A. Cerpa, W. Ye, Y. Yu, J. Zhao, and D. Estrin, "Networking issues in wireless sensor networks," Journal of Parallel and Distributed Computing, vol. 64, no. 7, pp. 799-814, 2004. 4. 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Arrived: 03. 01. 2015 Accepted: 12. 05. 2015 187 original scientific paper_ Informacije imidem Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 188 - 194 Design of an active inductor based LNA in Silterra 130 nm CMOS process technology Mohammad Arif Sobhan Bhuiyan, Jia Xien Chew, Mamun Bin Ibne Reaz, Noorfazila Kamal Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, Bangi, Selangor, Malaysia Abstract: In this paper, an active inductor based CMOS low noise amplifier (LNA) has been illustrated for 2.4 GHz ISM band RF receivers. The proposed LNA has three stages: the common gate amplifier, the active inductor and the output buffer. The LNA is designed in Silterra 130-nm CMOS process. It operates at 1.2V supply voltage and exhibit a high gain (S21) of 33dB and reverse isolation (S12) of -33.1dB. The power dissipation of the LNA is only 1.51mW with 8.51 dB noise figure and 35.5dB IIP3. In the proposed LNA, active inductor circuit replaces the usual passive spiral inductor to keep the size of the chip area at 0.0004mm2. Such an LNA will be a better choice for high performance, fully integrated, low cost and low power RF receivers. Keywords: CMOS; LNA; Active Inductor; RF Zasnova nizko šumnega ojačevalnika na osnovi aktivne dušilke s Silterra 130 nm CMOS tehnološkim procesom Izvleček: V članku je prikazan CMOS nizko šumni ojačevalnik (LNA) na osnovi aktivne dušilke za RF sprejemnike v ISM frekvenčnem območju 2,4 GHz. Predlagani LNA je sestavljen iz treh stopenj: ojačevalnik s skupnimi vrati, aktivna dušilka in izhodni ojačevalnik. LNA je načrtovan za Silterra 130-nm CMOS proces. Deluje pri napajalni napetosti 1,2 V, ima veliko ojačenje (S21) 33 dB in majhno povratno ojačenje (S12) 33,1 dB. Poraba moči znaša le 1,51 mW, šumno število ima 8.51 dB in IIP3 35,5 dB. Pri predlaganem LNA aktivna dušilka nadomešča običajno pasivno spiralno dušilko, s čimer dosežemo velikost vezja le 0,0004 mm2. Tak LNA bo boljša izbira za visokozmogljive v celoti integrirane nizkocenovne RF sprejemnike nizkih moči. Ključne besede: CMOS; LNA; aktivna dušilka; RF * Corresponding Author's e-mail: asobhan@eng.ukm.my 1 Introduction The continuous advancement in CMOS technology allows the researchers to fabricate fully on-chip transceivers without compromising the performance issues. Therefore, the current trend is to design low power compact devices by eliminating bulky board level off-chip components. This resulted low power, small size and low cost wireless terminals for different applications such as RFID, Bluetooth, Zigbee, Wi-Fi, WLAN devices etc. [1, 2, 3]. The size and performance of such devices largely depend on the size and performance of their transceivers. Therefore performance enhancement of such wireless transceivers is very important. An LNA is typically the first active amplification block of an RF receiver, as shown in Fig. 1. Its performance greatly affects the overall receiver performance. Main performance parameters of a typical LNA are: input matching S11 (dB), reverse isolation S12 (dB), gain S21 (dB), output matching S22 (dB), NF (dB), IIP3 (dBm), power dissipation (mW), Chip size (mm2) etc. The type of mixture with which LNA is to be used is very important to determine the necessary trade off among the performance criteria. For example, the requirement for gain of the LNA, when used with active mixture, can be relaxed as such a mixer provides active gain while consuming some dc power. But its power consumption needs to be lowered to compensate for the power 160 © MIDEM Society M. A. S. Bhuiyan et al; Informacije Midem, Vol. 45, No. 3 (2015), 188 - 194 Figure 1: Analog front of a 2.45 GHz RF transceiver. consumption from the active mixer. With a relaxed gain, the LNA should have good noise figure (NF) to avoid degrading the overall receiver NF. LNA is a one of the crucial blocks of an RF receiver which deals with very low power signal. LNAs are usually designed in two common topologies: Common-Source LNA (CSLNA) and Common- Gate LNA (CGLNA) [3, 4]. These two topologies use passive inductors which results in larger chip area and thus increased cost. Generally, the parasitic effects and losses related to the substrate degrade the total performance of the LNAs. Therefore, various techniques have been used by the researchers to improve the LNA performance. Current-reuse technique in CGLNA is usually utilized to better the transconductance but the area becomes larger due to the usage of bulky passive inductors [5]. Noise cancelling techniques are also used to decrease the NF, but it suffers from high frequency effects [6, 7] and low voltage gain [8, 9]. Figure 2: Typical single ended gyrator-C active inductor and its equivalent circuit [1]. To overcome the margins, active inductor based band pass filters have been introduced. Active inductors manage to constantly tune to protect temperature or process variations. Beyond that, active inductor only takes about 1% until 10% of passive active inductor area which can produce smaller chip area and cost [10]. Besides they also have higher inductance value, wide frequency tuning range and higher quality factor which are essential for different circuit designs [11]. However, inductor-less LNA although reduces chip size but can cause high power dissipation [12, 13]. Fig. 2 shows a typical single ended gyrator-C active inductor and its equivalent circuit. In this paper, an LNA design with low power dissipation and high gain for 2.4 GHz ISM band RF receivers has been proposed in Silterra 130-nm CMOS process. The inductor-less approach made the LNA design compact and power efficient. 2 The active inductor based LNA In LNA design, CGLNA is preferred for its excellent input impedance matching characteristics [14]. The conventional common gate amplifiers commonly utilize resistive feedback which experiences parasitic capacitance effect and relatively higher power dissipation at higher frequencies. The proposed LNA is structured in three interconnected modules, as illustrated in Fig. 3, Common gate amplifier, Active inductor and Common drain amplifier. The signal will first pass through a common gate amplifier and then to the active inductor and lastly into a common drain amplifier which will act as a buffer. Common gate amplifier Active inductor Common drain amplifier! buffer) Figure 3: Modules of the active inductor based LNA. 2.1 Common Gate Amplifier The proposed circuit of a common gate amplifier is shown in Fig. 4. Here, M11 acts as an active resistor instead of source resistor. The transconductance of the transistor M8 is the input impedance of the amplifier. The common gate amplifier topology is a good choice because of its high reverse isolation and good impedance matching characteristics and thus any extra impedance matching network is not required. Biasing voltage (V2) is applied to make sure that the transistor M8 is always in saturation mode. 2.2 Active Inductor A double feedback active inductor used in the proposed LNA is shown in Fig. 5 [15]. The negative feedback action involves the long tail pair transconductor consisting of transistors M3, M4 and sources J2, J3 whereas the source J4 converts the input voltage to a current for the internal capacitor of transistor M2, cgs2 to be charged. While the transistor M2 converts back the capacitor voltage to the input current. For positive feedback action, the long-tail 189 M. A. S. Bhuiyan et al; Informacije Midem, Vol. 45, No. 3 (2015), 188 - 194 toAl MS V2 O- VI n O- IWI1 Vt> O C Figure 4: Common gate amplifier. pair transconductor converts the input voltage into an oppositely directed current which enters the input node. It realizes a negative resistance of -2/gm3 (where gm3 = gm4) that is parallely tied with the inductor. For the proposed topology, the currents in the unwanted coupling routes have been balanced. For a voltage applied at the input of the inductor, the currents Figure 5: Double feedback active inductor and its equivalent circuit [15]. through cgs2 and cgs3 are combined at the common-source terminals of M3 and M4 which acts as virtual ground potential. This current follows the drain of the transistor M4 as the current flowing through cgs4 is insignificant because of the almost zero signal voltage across it. Consequently, the currents through the unwanted coupling paths are counterbalanced and therefore, the drain current of M1 makes the input current and the inductor loss is taken out. The Q-enhancement technique is applied in almost all modern on-chip inductor circuits in order to compensate their high losses. Generally, the Q factor of the regulated cascode active inductor circuit is relatively low because of its equivalent parallel resistive loss which is not compensated by the negative feedback operation. Therefore, in our proposed circuit, the currents in the undesirable coupling paths have been compensated. For an input voltage to the inductor, the currents flowing through cgsl and cgs2 are summed at the common-source terminals of M2 and M3 which exhibit virtual ground potential. This current will then flow out of the drain terminal of M3 because the current in cgs3 is negligible since the signal voltage across it is almost zero. Moreover, from the first-order small-signal analysis, it is evident that, if gm3 = gm2 and cg3 = cgs2, the active inductor will become lossless (infinite Q). But in practice, it is not possible for some factors like finite drain-source resistances, other parasitic capacitances of the transistors etc. 2.3 Common Drain Amplifier The common drain amplifier is also known as source follower or a buffer. It is widely utilized in final stage of LNA design due its small output impedance to achieve a better output impedance matching for the LNA. A simple buffer is added to the final stage of the proposed LNA design. Its schematic is shown in Fig. 6 and transistor M9 is used as active resistor. Transistor M10 is used as a common drain amplifier. 2.4 Proposed Active Inductor Based LNA Finally, all three sub-circuits are tied together and the whole schematic circuit of the proposed LNA is shown in Fig. 7. In this circuit, the enhanced active inductor has been formed by transistors M3 to M6. The common gate amplifier is formed by transistor M8. On the other hand, M0, M1 and M7 act as constant current source. Finally, M9 and M10 comprise the output buffer. It is obvious that amplifiers add noise and distortion to the desired signal. Therefore, noise analysis is very important for every amplifier circuit. The noise figure gives a measure of the amount of noise added to a 190 M. A. S. Bhuiyan et al; Informacije Midem, Vol. 45, No. 3 (2015), 188 - 194 Figure 6: Common drain amplifier. VDD Figure 7: Schematic of the active inductor based LNA. signal transmitted through the network. For any circuit, therefore, the noise figure minimization is also very important. But it is also inevitable that maximum gain and minimum noise cannot be obtained at the same time. For the noise analysis of the active inductor, let us consider that it is terminated with a resistance, R, the value of which is greater than (1/gm1) and also neglecting the flicker noise of the transistors used, the spot noise figure can be approximately expressed as: NF -10 log 1 + — 3r 1 1 1 gm5 --1 I I 2 gm2 gm3 gm4 gm3 (1) It can be seen from (1) that the noise figure of the inductor can be minimised by maximising the small-signal transconductances of M2, M3 and M4 while the transconductances of M5 and M6 should be kept at minimum values. Increasing the transconductances of M2, M3 and M4 corresponds to the increasing of parasitic capacitances hence a trade-off between noise performance and frequency response. On the other hand, reducing the transconductances of M5 and M6 seems to be not a critical problem in compromising the performance since they serve as just current followers. Generally, the noise effects in a common-gate topology include both the thermal and the flicker noise. Thus, the noise factor of the common-gate amplifier can be approximately showed as NF = + 2 3 K Cf r gm112 + gm82 + 2 gm22 (WL)m8 (WL)m2 + 22 gmll + gm8 + 2 gmll + gm8 + 2gm2 (2) (WL)m8 gm82 where K is a process-dependent constant, C is the gate capacitance of the MOSs, and f is the operating frequency of the amplifier. The final stage is the common-drain configuration which is nothing but a source follower. The noise factor of this stage is derived as: NF - 2 3 1 - + - 1 (3) gm10 gm10.R v / Where R is the resistance of the active resistor (M9). If we consider all the transconductances (gm) same, it will be obvious that a higher value of gm can improve the noise figure but it will also increase the total power consumption. Moreover, the increased parasitic capacitances of the transistors will degrade the performance specially in high frequencies. Therefore, a trade off has been made. 3 Results and discussion The proposed LNA circuit has been verified by using the simulation tool ELDO RF in Mentor Graphics environment.The process parameters for the transistors used in this work correspond to Silterra 130-nm CMOS technology. The power supply for the circuit is 1.2V. 191 M. A. S. Bhuiyan et al; Informacije Midem, Vol. 45, No. 3 (2015), 188 - 194 The operating temperature of the circuit is 300K while the noise temperature is set to 290K for measuring the LNA noise figure. The voltage biases for the LNA are V1=0.59V, V2=0.40V and Vgg =0.79V. The transistor sizes are given in Table I. is -33.1dB whereas the reflection coefficient (Sn) is 0.2dB. The power dissipation of the LNA is measured to be 1.51 mW. The IIP3 is measured to be 35.5dB. The bandwidth of the proposed LNA is 28 MHz. The transient output voltage is shown in Fig. 10. Table 1: Components used in the LNA circuit YWOUP Transistor Width (pm) Length (pm) M0, M1 1.27 0.13 M2 0.84 0.13 M3, M4 9.11 0.13 M5,M6 0.36 0.13 M7 12.15 0.13 M8 3.66 0.13 M9 25 0.13 M10 4.58 0.13 M11 8 0.13 Figure 8: Gain (S21), reflection coefficient (S11) and minimum NF. 2.2C 2.4G 2.6C 2.8C Frequency (Hz) Figure 9: Simulation result for reverse isolation (S12). The simulation results are shown in Fig. 8 and Fig. 9. At the center frequency of 2.45GHz, the LNA is able achieve 33dB of forward gain (S21) and a minimum noise figure (NF) of 8.51dB. The reverse isolation (S12) i 1 i ■ i 1 i'T fn'i 1 i ■ i 1 i 1 i 1 i '.ON 97.SN 96.2 K 9S.8N 99.4 N 1' Time (s) Figure 10: The transient output voltage waveform. A transistor (M11) commonly seen to be used with the CG topology to stabilize the transconductance of the amplifying transistor is removed. The existence of that transistor shows no significant effect on the LNA performance during the simulation. The bias voltage for transistor M9 is best when it is grounded. By grounding the bias voltage of transistor M9, no changes on the center frequency is observed. However, an improvement in the LNA gain is observed. All of the transistors are operating at saturation region except for transistor M9. By changing the transistor width of M2, M3, M4, M8 and M10, the LNA center frequency, gain and minimum NF can be tuned. However, the higher the center frequency, the lower the gain is. It is also observed that the minimum NF increases as the gain increases. But, the gain increases steeper than the minimum NF. The transistor widths are tuned to achieve maximum gain while maintaining an acceptable minimum NF. The layout of the LNA is designed using Mentor Graphics IC Design environment. The transistor sizes are optimized to obtain a balance between chip area and performance. The transistors are positioned in such a way that it is as compact as possible to achieve a small chip area which is measured at 0.0004 mm2. The layout of the LNA is shown in Fig. 11. The proposed active inductor based LNA is compared with other previously published active inductor based LNA design in Table II. This work has the highest gain and lowest power consumption while also being the smallest LNA. It also shows better linearity as evident 192 M. A. S. Bhuiyan et al; Informacije Midem, Vol. 45, No. 3 (2015), 188 - 194 4 Conclusion Figure 11: The core layout of the LNA (11.9 x 36.7) mm2 from iip3 value. The low power consumption is due to the fact that less number of MOSFETs used in the design and the lower supply voltage when compared with other works. However, this work suffers from relatively higher noise figure due to the simple common gate topology used for the amplification and also for using smaller sized transistors. Table 2: Performance comparison In this paper, a low power compact design of LNA is proposed using Silterra 130-nm CMOS technology. It exhibits high forward gain (S21) of 33dB, high reverse isolation (S12) of -33.1 dB and high IIP3 of 35.5 dB at 2.45GHz. The LNA operates at supply voltage of 1.2V and consumes only 1.51 mW of power. However, the LNA shows a competative NF of 8.51dB. In this design passive spiral inductors are avoided to keep the size very small at 0.0004 mm2. Such an LNA will be suitable for high performance, fully integrated, low cost and low power RF receivers. 5 Acknowledgment This work is supported by the research grant Economic Transformation Programme (ETP-2013-037) from Universiti Kebangsaan Malaysia and the Ministry of Science, Technology and Innovation (MOSTI) respectively. 6 References 1. 2. 3. 4. M. A. S. Bhuiyan, M. B. I. Reaz, J. Jalil and L. F. Rahman. Design of a nanoswitch in 130 nm CMOS technology for 2.4 GHz wireless terminals. Bulletin of the Polish Academy of Sciences Technical Sciences, 62(2), pp.399-406, 2014. M. I. B. Idris, M. B. I. Reaz and M. A. S. Bhuiyan. A low voltage VGA for RFID receivers. IEEE International Conference on RFID Technologies and Applications, pp. 1-4, 2013. M. A. S. Bhuiyan, M. B. I. Reaz, J. Jalil, L. F. Rahman and T. G. Chang. Design trends in fully integrated 2.4 GHz CMOS SPDT switches. Current Nanoscience, 10(3), pp. 334-343, 2014. R. M. Weng, C. Y. Liu and P. C. Lin. A low-power full-band low-noise amplifier for ultra-wideband receivers. IEEE Transaction on Microwave Theory and Techniques, 58(8), pp. 2077-2083, 2010. This work [16] [17] [18] [19] [20] [21] Gain, S21 (dB) 30.7 11.2 22 14 11.8 19 15 Frequency (GHz) 2.45 2.0-11.2 0.8-2.5 0.37- 2.18 2.3-15.2 1-5 3.2-6.3 Noise Figure (dB) 8.51 2.0-4.0 3.02 3.55-4.5 1.9-3.8 2.1 0.95 Power Consumption (mW) 1.51 13.5 19.6 14.58 13.3 4.2 4.7 IIP3(dB) 35.5 - - -10 - - - Supply Voltage 1.2 1.2 1.8 1.8 1.2 1.2 1.8 CMOS Process (nm) 130 130 180 180 130 180 180 Chip Area (mm2) 0.0004 0.09 0.03 0.04 0.093 - - 193 M. A. S. Bhuiyan et al; Informacije Midem, Vol. 45, No. 3 (2015), 188 - 194 5. M. Khurram and S. M. R. Hasan. A 3-5 GHz current-reuse gm-boosted CG LNA for ultra wideband in 130 nm CMOS. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(3), pp. 400409, 2012. 6. F. Bruccoleri, E. A. M. Klumperink and B. Nauta. Wide-band CMOS low-noise amplifier exploiting thermal noise cancelling. IEEE Journal of SolidState Circuits, 39(2), pp. 275-282, 2004. 7. Y. H. Yu, Y. S. Yang and Y. J. Chen. A compact wideband cmos low noise amplifier with gain flatness enhancement. IEEE Journal of Solid-State Circuits, 45(3), pp. 502-509, 2010. 8. Z. Wang, K. S. Yeo and K. Ma. An inductorless and capacitorless LNA with noise and distortion cancelation. Computer Research and Development (ICCRD), 3, pp. 270-274, 2011. 9. K.H. Chen and S. I. Liu. Inductorless Wideband CMOS low-noise amplifiers using noise-cancelling technique. IEEE Transactions on Circuits and Systems I: Regular Papers, 59(2), pp. 305-314, 2012. 10. H. Aljarajreh, M. R. Rifin, M. Mamun, S. Amin, and W. M. D. W. Zaki. low noise amplifiers in RFID systems, Journal of Engineering and Applied Sciences, 8, pp. 21-28, 2013. 11. C. Andriesei, L. Goras, F. Temcamani, and B. Delacressoniere, Wide tuning range active RF bandpass filter with MOS varactors, Romanian Journal of Information Science and Technology, 12, pp. 485-495, 2009. 12. F. Belmas, F. Hameau and J. M. Fournier. A low power inductorless LNA with double Gm enhancement in 130 nm CMOS. IEEE Journal of Solid-State Circuits, 47(5), pp. 1094-1103, 2012. 13. S. V. Krishnamurthy, K. El-Sankary, E. El-Masry, Noise-cancelling CMOS active inductor and its application in RF band-pass filter design, International Journal of Microwave Science and Technology, 2010, pp. 1-8, 2010. 14. H. J. liu, Z. Li and M. Zhang. A 2.4 GHz 1V low power LNA in subthreshold region, 3rd International Conference on Multimedia Technology ICMT2013), pp. 191-199, 2013. 15. U. Yodprasit and J. Ngarmnil. Q-enhanced technique for RF CMOS active inductor. Proceedings IEEE International Symposium Circuits Systems, 5, pp. 589-592, 2000. 16. M. .M. Reja, I. Filanovsky and K. Moez. A CMOS 2.011.2 GHz UWB lna using active inductor circuit. IEEE International Symposium Circuit and Systems, pp. 2266-2269, 2008. 17. H.B. Kia, A.K. Aain, I. Grout and I. Kamisian. A reconfigurable low-noise amplifier using a tunable active inductor for multistandard receivers. Circuits, Systems, and Signal Processing, 32(3), pp. 979-992, 2012. 18. M. Gao, Y. Wang, Y. Wang and D. Guo. Design of wideband CMOS LNA with active inductor and using noise-canceling technique. 3rd International Conference on Anti-counterfeiting, Security, and Identification in Communication, 2009 (ASID 2009), pp. 262-265, 2009. 19. V. K. Bhardwaj, A. Agarwal and H. Kumar. CMOS LNA based on tunable active inductor for UWB applications. 2012 2nd Interanational Conference on Power, Control and Embedded Systems, pp. 1-3, 2012. 20. J. Manjula and S. Malarvizhi. Low power low noise tunable active inductor for narrow band lna design. International Journal of Computer Applications, 47(17), pp. 39-43, 2012 21. M. I. Malek and S. Saini. Improved two stage ultrawideband cmos low noise amplifier with out band rejection using low noise active inductor. 2015 International Conference on Signal Processing and Communication Engineering Systems (SPACES-2015), pp. 157-161, 2015. Arrived: 14. 01. 2015 Accepted: 18. 08. 2015 194 Original scientific paper /midem loiirnal of M Informacije | Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 195 - 203 Digital Signal Processing for a Multi-Channel Chemical Sensor Interface Mario Trifkovic, Dusan Raic, Drago Strle University of Ljubljana, Faculty for Electrical Engineering, Ljubljana, Slovenia Abstract: This paper presents digital signal processing for a miniature, multi-channel, multi-sensor detection system, based on chemically functionalized COMB micro-capacitors and low noise integrated analog electronics. The presented system is capable of detecting traces of different molecules in the air. Currently, it is possible to detect less than 3ppt of target molecules in the atmosphere at room temperature in a 1 Hz bandwidth. For such multi-channel measurements with extreme requirements regarding sensitivity, it is necessary to have the appropriate analog signal processing electronics, as well as digital signal processing hardware, algorithms, and software. The complete architecture of the DSP part of a multi-channel sensor measurement system is explained, together with some simulation and the measured results. Keywords: Digital Signal Processing DSP, decimation filter, FPGA, measurement of capacitance changes, measurement system Digitalno signalno procesiranje več-kanalnega • ~~W • • • ~~M • • • merilnega sistema za merjenje kapacitivnosti kemično modificiranih COMB senzorjev Izvleček: Članek opisuje digitalno signalno procesiranje miniaturnega, večkanalnega detekcijskega sistema, ki temelji na kemično modificiranih COMB senzorjih, integriranem nizko-šumnem analognem integriranem vezju ter vezju za digitalno procesiranju signalov. Predstavljen detekcijski sistem zaznava različne molekule v zraku v izjemno majhnih koncentracijah; detekcijski nivo pri sobni temperaturi znaša 3 molekule TNT med 1012 molekulami nosilnega plina pri pasovni širini 1Hz. Pomemben gradnik več-kanalnega senzorskega merilnega sistema s skrajnimi zahtevami glede občutljivosti, je tudi primerno digitalno procesiranje signalov, ustrezna arhitektura, algoritmi in pomožni programi, ki jih predstavljamo v članku skupaj s rezultati nekaterih pomembnih simulacij ter nekaterimi merilnimi rezultati. Ključne besede: Digitalno Signalno Procesiranje DSP, CIC decimacijski filter, FPGA, merjenje spremembe kapacitivnosti, merilni sistem * Corresponding Author's e-mail: rnario.trifkovic@fe.uni-lj.si 1 Introduction Vapor detection systems already exist on the market. Chemo-mechanical sensors, initiated in the mid-1990s are based on a cantilever where adsorption of the target molecules on a modified surface bends the cantilever [1]. However, position measurement is difficult because of changing temperature, pressure, sensor vibration, etc. A differential capacitance comb-shaped (COMB) sensor and associated low noise electronics provide much lower sensitivity to the environmental influences. In this work, we present the DSP (Digital Signal Processing) part of a multi-channel detection system based on the measurements of the capacitance difference between modified (chemically treated, i.e. functionalized) and reference (untreated) capacitors [2]. The primary role of DSP is to extract useful information from the ZA modulator bit-stream. As an important part of the complete detection system, it must be designed properly to get optimal results in as short time as possible, without introducing additional noise. This paper is organized as follows. A general description of the entire measurement system is given in Section 2 with a short explanation of the analog signal processing module implemented on the ASIC (Application-Specific Integrated Circuit). Section 3 describes a 30-channel digital signal processor, while 195 © MIDEM Society M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 Section 4 describes its implementation on the FPGA. The user interface and some measurement results are presented in Section 5 while the conclusions are given in Section 6. 2 Measurement system A simplified block diagram of the signal processing electronics and data processing software running on the PC is shown in Figure 1. The whole measurement system is basically a lock-in amplifier [2] built from: low noise, analog front-end (AFE) electronics; digital front-end (DFE) control logic and the DSP. The AFE and DFE are integrated into the ASIC (application specific integrated circuit) designed in 0.25um BCD (BIPOLAR-CMOS-DMOS) process, while the DSP is currently realized on the FPGA. The AFE consists of necessary analog electronic components [2],[3] which are programmable, so that different gains, frequencies, and excitation signals for the sensors can be adjusted. The AFE configuration is set by DFE through a Serial Peripheral Interface (SPI). The existing ASIC is capable of processing the signals from two differential sensors. Each sensor must be calibrated, since the initial difference of two capacitors in one differential sensor can reach up to 10%. Therefore, a programmable capacitor array is implemented on the AFE part, which is connected in parallel to each sensor's capacitor. The programmability range of the calibration capacitors is from 1fF to 64fF in steps of 1fF. Differential ASIC1 Sensor Pair AFE J DFE Si Differential ASIC2 Sensor Pair « AFE ^ DFE Si Differential fr- ASIC3 Sensor Pair AFE J DFE » • ; Differential ASIC15 Sensor Pair « AFE ^ DFE Si FPGA ^ cl I t t USB Bluetooth Power Management board PC GUI processing t USB Bluetooth Figure 1: Measurement system block structure The measurement results of each sensor are proportional to the capacitance difference caused by adsorption of the target molecule to the modified sensor. During calibration, in a natural atmosphere without traces of the target molecules, we calibrate the difference between each differential capacitor and bring the result close to zero. In this way the dynamic range of the measurement channel is increased so that higher channel gains and excitation voltages are possible. The multi-channel measurement system consists of 15 ASICs, each with two differential sensors; thus a 30 - channel measurement system is implemented. Each digital signal from the AFE carries the information of the capacitance difference. Signals from all sensors are connected to the FPGA, where DSP algorithms extract the information. The results of the DSP processing are sent to the PC via Bluetooth or USB interface, where further signal processing prepares the results for the presentation and storage. The decisive parts regarding the sensitivity of the entire measurement system are differential comb capacitors and low noise electronics, which must be capable of detecting a low number of adsorbed target molecules on the surface of the functionalized capacitor [2]. The block diagram of one ASIC channel including two sensors is shown on Figure 2 [2],[3]. Two differential sensors can be connected to one measurement channel. LP filter EÀ A/D Digital Front End SPI Figure 2: Block diagram of the ASIC including two sensors [2],[3]. Sensors are driven by square-wave signals Vs with slightly different frequencies. The difference in charges from the sensor is transformed into the voltage using a low noise charge amplifier with the help of the excitation signals. The output voltage of the charge amplifier can be calculated according to (1). ( AC cho VS ) s Cf l/(Cf • Rf ) + s (1) The frequencies are selected well above the 1/f noise corner frequency of the charge amplifier. The amplitude and frequency of the excitation signals are fully programmable. The output signal of the charge amplifier Vcho is band-pass filtered and amplified. The signal contains the main spectral components from two sensors and corresponding higher harmonics due to square-wave excitation signals. Therefore, the analog mixer generates the differences and sums of all main and harmonic spectral components. The differences are f, = f, - f for the first sensor, and o1 s1 m ' fo2 = f2 - fm for the second. Low frequency signals are amplified, while high frequencies and the remains of the higher harmonics from the mixing products are 196 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 attenuated by a programmable analog low-pass filter. The resulting signal is finally quantized with a second order X-A A/D converter, implemented in the AFE part of the ASIC [2],[3]. The described AFE structure enables the possibility of using one analog channel for more sensors, avoiding the influence of the DC offset voltage and the 1/f noise. Figure 3: System in Package (SiP) measurement board: (left) COMB differential sensor and ASIC. (right) measurement board. The SEM micrograph of a differential COMB capacitive sensor and photomicrograph of the ASIC is shown on the left side of Figure 3. The PCB with one ASIC and two differential sensors as a System In Package (SiP) is presented on the right side of Figure 3; for a size comparison an 1 Euro-cent coin is added. The ASIC and sensor sizes are 2.5x2mm and 1.2x1.5mm, respectively. Another important part of the system is the digital part implemented on the FPGA. It consists of the SPI (Serial Peripheral Interface), a communication unit for the connection with the PC, a command decoder, excitation signal generators, a data encoder, a multi-channel DSP, and an additional digital signal processing hardware for extracting the information from the decimation filters. In next section, the DSP part will be described in detail. The block diagram of the complete implementation on the FPGA is shown in Figure 4. ° s © k M * S m b To ASIC array ■< 5 '3 § DSP data reporter Command Decoder SPI > Data < mux CM rn o o JS u > o m 13 c U Figure 4: Block diagram of the FPGA implementation The visual representations of DSP results are managed by the Graphical User Interface (GUI) developed to run on the PC (see Figure 1). It allows us to control various parameters of the analog part, as well as the parameters of the DSP module. It is possible to control various gains, excitation frequencies, voltages, and calibration capacitors in the AFE part, while in the DSP part we can control frequencies and phases of the down-mixing signals and decimation ratio of the last decimation filter. The programmability of the last decimation filter enables the possibility to adjust the bandwidth and the output data rate. 3 Digital signal processing Each ASIC converts the capacitance changes from two differential sensors into a digital bit-stream, which is captured by the DSP for further digital signal processing. The DSP was designed and tested with a top-down design approach using Matlab and Simulink [4],[5]. After modeling, the DSP algorithms were coded to the Register Transfer Level (RTL) using VHDL, and then synthesized and implemented on the FPGA. The hierarchical Simulink environment makes it possible to efficiently model, simulate, and design all circuits on a high hierarchical level. Another important advantage of the high-level approach is to model and simulate the analogue and digital parts together in a very short time. In this way the appropriate decisions can be executed early in the design process, which improves the efficiency of the design. Signals used for driving, mixing, down-sampling timing, and further filtering must be strictly coherent (the measurement period is a multiple of every signal period and their ratios are prime numbers). All digital filters are realized with Cascaded Integrator - Comb (CIC) decimation filter architecture [6], as shown in Figure 5. The purpose of the CIC decimation filter is to remove the out-of-band shaped quantization noise and to reduce the data rate to the Nyquist rate. The order of the decimation filter should be larger than the order of the modulator to sufficiently suppress the out-of-band quantization In_ fovs fovs/R Figure 5: 3rd order CIC decimation filter structure [6] 197 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 noise. In our case we use a 3rd order sinc decimation filter with the standard structure [6] presented in Figure 5. The filter word length is optimized in such a way that no additional quantization noise due to finite word lengths is added into the filtering process [6]. In the full-precision mode, all registers following the first register must support the maximum accumulation produced by the first integrator section. According to the known CIC filter properties, the overflows of the integrating and differentiating sections are not significant if the wrap-around two's complement arithmetic is used with a modular wraparound property [4]. The integrating stages run with the oversampling frequency, while the comb sections run with a sampling frequency divided by the factor R (oversampling ratio). The decimation ratio in the first decimation filter stage is small in order to generate coherent signals. The transfer function in the z-domain and the corresponding maximum dynamic range growth at DC for the decimation filter are given in (2), where N is the order of the filter and R is the decimation factor [6], [7], [8]. HdM = 1 - z -RM 1 - z -1 H dec (ey0) = RMn (2) In our case, the comb filter differential delay M is always equal to 1 and will not be addressed in further equations. It is known that the transfer function has zeros fZ defined in (3), where k is the integer multiplier (k e Z). fZ = k ' fdec = k f J ov R (3) All components in the pass-band are mapped around the multiples of the output sampling frequency fZ. If we define fcut to be the passband cutoff frequency of a usable pass-band f, then the imaging regions are defined as (4). (fz - feu, ) f ^(fz + fcut) (4) The passband cutoff frequency has to be smaller than fov/2R in order to avoid aliasing of the imaging frequency bands around the zeroes f. To attenuate those regions in the cascaded filter structure, the decimation rates are selected in such a way that the zeroes of all filters are covered with zeroes caused by the output sampling frequency of the previous filter. By increasing the number of stages, we improve the filter's ability to reject the image components. Unfortunately, the attenuation at the passband edge is increased as well, which can be compensated with appropriate FIR filter in series after CIC filter. In our case the relevant signals after digital down-mixing become DC components, therefore the compensation filter is unnecessary. This process is shown in Figure 7 below. The main parts of the DSP are: the configuration register, down-mixers, frequency dividers, and CIC filters. As previously mentioned, each ASIC process the signals from two sensors and thus each bit-stream contains information from two sensors. The DSP separates those two components into separate channels; each channel is followed by digital filter to reduce the bandwidth and provide appropriate outputs for further processing. The block diagram of a complete DSP is presented in Figure 6. Figure 6: Block diagram of the DSP The output of each ZA - modulator is a stream of 1-bit data, with the frequency of 6.25 MHz. The first decimation filter performs only a rough filtering to remove high frequency-shaped quantization noise of the bit-stream, using decimation rate R, = fov/fdec, = fv/2fN = 16. Accordingly, the output rate is reduced from f to fd, = f /R, = 390625 Hz. The spectrum ovs dec1 ovs 1 ^ contains two main components at frequencies fo1 and fo2 and the remains of the attenuated high frequency of the mixing process and thermal noise. The amplitudes of the main spectral components are proportional to the corresponding sensor capacitance difference and excitation signal amplitudes. The noise, which reduces the signal-to-noise ratio (SnR) of the measurement, can be reduced by decreasing the bandwidth of the digital 198 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 results. The main spectral components of each channel are translated to DC by mixing the output signal from the first filter with two digital square-waves with frequencies fo1 and fo2. The results are two separated DC digital signals, as shown in Figure 6, where GD1, GD2 and G represent the gain of the filters. i A Gd Dig. Filter Ri = 16 A Gd1 Gd2 Dig. Filter R2 = 256 A GD1 GD2 GD3 fo1 2■ fdec2 4■ fdec2 8■ fd fo1 fdec3 2' fdec3 4 • fdec3 f Figure 7: Digital signal processing for one channel In order to remove the remains of the high frequency spectral components and to reduce the data rate, two additional decimation filters are used with the default decimation rates R2 = 256 and R3 = 128 with zeroes at kfdec/R2 and kfdec2/R3, respectively. This procedure is presented in Figure 7. The bandwidth and the output data rate after both low-pass digital filters is reduced to f0V/(R,R2R3) @ 12 Hz. With the ability to change the last decimation rate in a range from 128 to 1024, we can reduce the output data rate down to ~ 1.5Hz. The results are then transferred to the PC for further filtering, decimation, storage, and presentation. 4 Implementation of the dsp and other digital parts The majority of the digital circuits including the DSP are implemented on the FPGA as shown in Figure 4. For correct operation of all decimation filters, we have to ensure appropriate word length to prevent data distortion due to the overflow. The highest pass-band gain occurs at the DC, which is a function of the number of stages as defined in (2). Since the two's complement arithmetic is used, the maximum required number of bits Bmax for the accumulation is calculated by using (5) [6], where N-[iog2R~\ represents the maximum register growth. Bmax= N-\log2 R1 + Bn (5) Bn is the number of input bits, N is number of stages and R is the decimation ratio. Brackets M represents ceil function (the smallest integer not less than x). In multistage decimation CIC filters, this can result in large register widths due to register growth for every added decimation filter by N[iog2R~\, leading to high consumption of hardware resources. The word-length of registers is possible to control by truncation and unbiased rounding to even numbers in each output stage. This reduces the gain of the filter by a factor of 2Btr, where Btr is the number of cut off LSB bits. Truncation also increases the overall quantization noise, which has to be below the noise of analog electronics. With the help of the Matlab Simulink system simulations we have found that the output word-length of 22-bits in the second, and 24-bits in the third decimation filter are long enough to maintain the 100 dB dynamic range. The complete system is designed in such a way that the quantization noise generated in the modulator and in the decimation filters is always smaller than amplified thermal noise generated in the charge amplifier. The overall truncation noise variance o at each filter output is defined in (6), where BMAX is the maximum register growth according equation (5), and BOUT is an output word-length [6]. a ( bout ) 12 (6) The total quantization noise variance of all digital filters is then calculated using (7), where ok is the output variance of the error for each filter. a1 out k=i (7) A detailed description of the quantization noise can be found in [6]. In our case, the first 3rd order decimator (R1 = 16) requires 14 bits, the second decimator (R2 = 256) requires 38 bits with output truncation to 22 bits, and the third decimator with programmable down-sampling ratio R3 from 128 to 1024 requires 43 to 52 bits (depending on the R factor) with output truncation to 24 bits. The FPGA resources allow us to build simple CIC filter structures with equal (maximal) number of internal bits for all integrator and comb stages. In the 199 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 integrated version of the system it will be considered to use the Hogenauer pruning technique to reduce usage of the silicon area, as well as power consumption. The word-length profiles of CIC decimation filters in each channel are shown in Figure 8. Dig. Filter 1 Dig. Filter 2 Dig. Filter 3 Ri I I I C C C 1 Figure 8: Word-length profile of CIC decimators The word-length of the last decimator changes according to equation (5), due to the controllable decimation rate. The highest word-length Bmax(R=1024) has been used to assure appropriate accumulation for all selectable decimation rates defined by Rm, where m is in the range of 7 to 10. The wrap-around two's complement arithmetic also provides correct results before truncation for lower decimation rates. Truncation without adjustment at the output, starting from MSB, would result in the output value reduced by the factor 2Bmax(1024) -Bmax(R), where Bmax(R) represents the word-length of the selected decimation rate R. This happens because of the larger word-length at smaller decimation rates that would be otherwise smaller according to (5). To get the correct result it is necessary to truncate the output, left shifted for Bmax1024 - BmaxR bits. The position of truncation output bits at different decimation rates is shown in Figure 9. R = 128 (Bmax=43 bit) R = 256 (Bmax=46 bit) R = 512 (Bmax=49 bit) R = 1024 (Bmax=52 bit) Figure 9: Truncation at last decimator according to decimation rate R Another issue in order to assure correct system operation is the need for the synchronization of sensor excitation signals with the down-mixing signals fo1 and fo2. Synchronization is needed because the excitation signals are generated in the ASIC, while the down-mixing signals fo1 and fo2 are generated in the physically separated block (FPGA). Those two pairs of signals must have the same phase to obtain a valid measurement -LJLrLTLTLT^^ n Phase reset address address select phase reset Figure 10: Phase reset circuit implemented in the ASIC and in the FPGA with timing diagram result. The synchronization takes place with the simultaneous phase reset in the ASIC and FPGA at the beginning of each measurement cycle. The reset circuit shown in Figure 10 is initiated by the simultaneous decoding of the unique SPI address in both systems. The first two flip-flops prevent the meta-stability, while the other two realize the front edge detector. When required, the reset pulse with one clock cycle width is generated in both systems. Another significant part of the system is the DSP data reporter, responsible for proper data transfer from the DSP to the communication unit. Generally, the DSP data reporter is a finite state machine, which converts the last filter output into a stream of hexadecimal characters. The universal asynchronous receiver/transmitter transfer rate was adapted to send the results from 30 channels at the smallest selectable decimation rate (i.e. the highest output rate). A simplified block diagram of the DSP data reporter with the communication and PC data processing units is shown in Figure 11. Figure 11: DSP data reporter block diagram with Communication unit C C C C C C 200 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 Table 4.1 shows the device utilization summary of the implementation on the FPGA for the entire digital system. Table 4.1: FPGA hardware utilization summery Logic Utilization Used Number of Slices 20698 Number of Slice Flip Flops 23377 Number of 4 input LUTs 25261 Number of bonded lOBs 59 Number of GCLKs 3 5 Measurement results and data processing The measurements were performed in a controlled laboratory environment using a gas generator and the measurement system, described in Section 2 and 3, and shown in Figure 12. Figure 13 shows the Graphical User Interface (GUI), written with the C# (C Sharp) programming language in the Visual Studio environment. The GUI allows us to control the current system parameters through ASIC and DSP settings. The digital response at the DSP output is AN, which is dimensionless Figure 12: Measurement system with Sensor array and Data acquisition system and proportional to the relative change of the capacitance AC/C. AN can be estimated using (8), where AVsx is the excitation signal amplitude, GA is the gain of complete analogue measurement path and GD1, GD2 and GD3 are the gains of the DSP part [2]. AN = A V„ AC C, • GA • GD1 • GD 2 ' GD 3 (8) It is also necessary to consider the gain loss due to truncation at the output of last two decimation filters. The gains of truncated filters in equation (8) have to be reduced according to (9). G = RN G D1 1 ' D 2 RN 2 bMAX 2 - bOUT 2 , GD3 RN 2 bMAX 3- BOUT 3 (9) Figure 13: User interface with a measurement result on the modified sensor 201 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 The DSP provides ~1.5 to ~12 results per second depending of the last decimation rate. Those results can be filtered on the PC, using the moving average filter according to (10). AVG (n ) = AVG (n -1) + x (n) x (n - M) M M (10) The moving average period M can be set with a constant value from 8 to 512. The algorithm in the GUI also calculates a standard deviation of the results and generates Matlab scripts for further analysis. All results can be stored in the files for off-line processing and examination. To monitor environmental conditions of the gas mixtures, one measurement channel is dedicated for the temperature and the humidity sensor. The DSP result presented in Figure 14 shows the consequence of switching the input gas between dry N2 and the N2 contaminated with the target molecules (TNT with V2 vapor pressure) for one channel with 12Hz bandwidth. The modified sensor surface is functional-ized with APS molecules [2], while the untreated reference sensor is used as a control sensor to track only environmental changes without the response to the target molecules. We estimate the normalized sensitivity STNT in 1 Hz band using (11) [2], where AN is the difference between two results from DSP and BW=12Hz (after DSP filtering). 9 — TNT — 3.5 10- 3.5 10- ' ANTNTy[BW ) (11) The measured, input referred noise level of the DSP is much smaller than the equivalent input referred thermal noise level of the charge amplifier. From this, we can conclude that DSP does not bring additional noise to the system. The long measurement times are the consequence of slow gas flow, caused by piezoelectric pumps capacity (15 ml/min) and relatively big nonfunctional volume of connecting tubes. Figure 14: Measured response of the system, switching between pure N2 and a mixture of N2 and 50% vapor pressure of TNT at room temperature. The environmental drift in the reference sensor is repeated in the modified sensor. 6 Conclusions The implementation of Digital Signal Processing for a miniature, multi-channel, vapor trace detection system is presented. At the moment the detection system it is capable of detecting vapor traces of different explosives. The 30-channel measurement system including all measurement boards (ASICs + sensors), consumes a relatively low amount of energy (approximately 200mA at 7.2V). A further plan is to integrate a complete detection system, which could lead to a cheap, efficient, and very selective vapor trace detection system for different molecules in the air. Integration will reduce the volume and power consumption of the complete system. The power and silicon area will also be reduced with appropriate pruning technique for internal word-length reduction in filter registers. We also plan to upgrade the GUI with an automatic sensor calibration and test engine to be able to verify the operation of each ASIC in the array during the startup time. 7 Acknowledgments The authors acknowledge the financial support of the Slovenian research agency, ARRS under contract number J7-5497. 8 References 1. 2. 3. Boisen A, Dohn S, Keller S S, Schmid S and Tenje M 2011 Cantilever-like Micromechanical Sensors Rep. Prog. Phys. 74 1-31 Strle D., Štefane B., Zupanič E., Trifkovič M., Maček M., Jakša G., Kvasič I. and Muševič I. (2014). "Sensitivity Comparison of Vapor Trace Detection of Explosives Based on Chemo-Mechanical Sensing with Optical Detection and Capacitive Sensing with Electronic Detection". MDPI Sensors 2014, 14(7), 11467-11491 Strle, D., Stefane, B., Nahtigal, U., Zupanic, E., Pozgan, F., Kvasic, I., Macek, M., Trontelj, J., Musevic, I. (2012). "Surface-Functionalized COMB Capacitive Sensors and CMOS Electronics for Vapor Trace Detection of Explosives". Sensors Journal, IEEE, 12(5), 1048-1057. 202 M. Trifkovic et al; Informacije Midem, Vol. 45, No. 3 (2015), 195 - 203 4. Raic, D., Strle, D. "Advanced Decimator Modelling with HDL Conversion in Mind in Engineering Education and Research using MATLAB"; InTeh: Rijeka, Croatia, 2014. 5. Drago Strle (2011). Mixed-Signal Circuits Modelling and Simulations Using Matlab, Engineering Education and Research Using MATLAB, Dr. Ali Assi (Ed.), ISBN: 978-953-307-6560, InTech, DOI: 10.5772/21556. 6. Hogenauer, E.B.: "An Economical Class of Digital Filters for Decimation and Interpolation", IEEE Trans. on Acoustics, Speech, and Signal processing, Vol. ASSP-29, No. 2, April 1981, pp. 155 - 162. 7. Meyer-Baese U. Digital Signal Processing with Field Programmable Gate Arrays. Springer; 2001. 8. Newbold, R.: "Practical Applications in Digital Signal Processing"; Prentice Hall, 2013, ISBN 9780-13-303838-5. Arrived: 04. 02. 2015 Accepted: 16. 09. 2015 203 original scientific paper_ Informacije imidem Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 204 - 215 Grid-Tied Smart Inverter Safety Functionality: Fast Power Quality Event Detection Isabel M. Moreno-Garcia, Antonio Moreno-Munoz, Aurora Gil-de-Castro, Rafael Real-Calvo, Emilio J. Palacios-Garcia, Miguel J. González-Redondo Department of Computer Architecture, Electronics and Electronic Technology, University of Cordoba, C. Rabanales, Ed. Leonardo Da Vinci, Cordoba, Spain Abstract: This paper addresses the fast detection of electric signal disturbance for advanced smart inverter functionality within the framework of large scale grid integration of renewable energy sources. A statistical-based technique under the fault detection and isolation (FDI) paradigm is proposed for fast detection in power systems. The aim is to improve the performance of interconnection systems and the electricity grid's energy efficiency. The new method developed is based on the Cumulative SUM (CUSUM) algorithm and is applied to a wide set of power quality events to analyse its performance. The results show that the method generates residuals that are robust to noise and accurately estimates the time locations of underlying transitions in the power system. The main advantage of the proposed technique is its early event detection, with respect to other traditional methods, because it performs sample-by-sample evaluations. Moreover, the proposed technique does not require much computational effort, which means that the presented detection method is suitable for integration into the multifunction relay protection subsystems available in novel smart inverters. Keywords: Change detection algorithms; event detection; power quality; power system protection; real-time system Varnostna značilnost pametnega omrežnega razsmernika: Hitra detekcija dogodka kvalitete moči Izvleček: Članek naslavlja hitro detekcijo moten električnega signala pri naprednih pametnih razsmernikih v okvirju široke omrežne integracije obnovljivih virov energije. Za hitro detekcijo je predlagana statistična metoda odkrivanja napak in njihovih izolacij (FDI). Cilj raziskave je izboljšanje povezav in učinkovitost prenosa električne energije. Nova metoda temelji na kumulativnem seštevalnem algoritmu (CUSUM), ki je z namenom analize učinkovitosti apliciran na širok set dogodkov kvalitete moči. Rezultati nakazujejo, da metoda generira ostanke, ki so neobčutljivi na šum in natančno ocenjujejo časovno lokacijo osnovnih prenosov v sistemu. Največja prednost predlagane tehnike, v primerjavi z obstoječimi, je hitra detekcija dogodka na osnovi medvzorčnih ocen. Nadalje, nova tehnika ne zahteva velike računske moči, zaradi česar je primerna za integracijo v večopravilne stikalne zaščitne sisteme razsmernika. Ključne besede: algoritem detekcije sprememb; detekcija dogodkov; kvaliteta moči; zaščita močnostnega sistema; sistem v realnem času * Corresponding Author's e-mail: p92mogai@uco.es 1 Introduction Nowadays, energy is a vital means of achieving social development. Nevertheless, energy production is a source of significant environmental impact, and the improper use of increasing amounts of energy is one of the factors involved in major potential environmental degradation. The transition to a more sustainable societal model is perhaps the most important challenge faced today. The increasing pressure on natural resources due to the introduction of millions of new consumers to markets, economic dependency on energy sources located outside of our territories, and climate change, as a consequence of increased global warming in recent decades, are only some of the issues that must be addressed to prevent reductions in levels of well-being. 160 © MIDEM Society I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 One method of avoiding this unbalance is for industrialised countries to reach environmental sustainability by decreasing their energy intensity, reducing their consumption of fossil fuels, diminishing greenhouse gas emissions and increasing the security of their energy supply [1]. In this context, a long-term commitment to renewable energy sources (RES) seems to be the only adequate answer to all of these issues. An example can be seen in the recent solar boom of 2010-12 and its integration into electrical systems in different countries. However, the growing penetration of solar generation raises several economic, regulatory and technical questions, some of which are closely related to power quality (PQ) [2]. Moreover, the growing coexistence of both conventional and distributed generation in the same electrical system is causing a reconsideration of the traditional power system towards the smart grid. This approach will require the global integration of large numbers of independent and autonomous systems from different stakeholders. Due to the market trend towards diversifying distributed energy resources (DERs), large infrastructure systems, such as the electric power grid, may be viewed as complex systems-of-systems. This will pose new challenges for the integration of these intelligent subsystems, so they can participate collectively and in a timely manner. This radical shift from the traditional centralised philosophy will require the implementation of real-time information in the whole electrical system. DERs not only include generation units but also aggregated flexible resources like storage for electrical and thermal energy and/or flexible loads. Thus, DER systems that generate AC output, often with variable frequencies, such as wind, microturbine or flywheel storage, need AC-DC conversion. For DC output systems like PV, fuel cells and batteries, a DC-DC conversion is typically needed to change the DC voltage level. Accordingly, MW-scale power electronics converters are essential components in new DER plants. Due to advancements of technology, the costs of power electronics have decreased significantly, sizes have also become smaller and performance has improved. Up to now, most DERs only produce power; they do not contribute to the ancillary services required to control the power system and ensure stable operation. However, the main inconveniences of DERs include their inherent variability and uncertainty. Part of the solution to moderating the impact of DERs on the grid lies in the DER units themselves, particularly in the interconnection equipment, such as inverters, that connects DERs to the electric power system. Driven by Germany's 2011 LV-MV Directives [3], inverters can contain smart features such as reactive power control to aid with grid integration. By the end of 2015, over 50% of inverters can carry these functions. This percentage could increase through disruptive energy-storage innovations being incorporated into the inverter [4]. Thus, there is a growing need for a high-performance embedded system that supports both existing functionalities and future operational requirements. Standards like IEC 61727 [5], IEEE 1547 [6] and VDE 0126-1-1 [7] establish criteria and requirements for the interconnection of DERs with electric power systems. The requirements shall be met at the point of common coupling (PCC). Although the devices used to meet these requirements can be located elsewhere, the current trend is to include it within the inverter itself [8,9]. Recently, we have presented the complete characteristics of a smart inverter for distributed energy resources (SIDER), and some possible new active functions can still be developed [10,11]. In the smart grid, SIDER can contribute to the reliability and stability of the entire power-supply infrastructure. It must respond to PQ events and fault conditions within the sub-cycle range by incorporating extremely fast response times. What is more, due to market expectations, self-diagnosis and self-healing functionalities must play a fundamental role in achieving the high PQ demanded, as well as subsequent trust in the smart grid paradigm. The rest of this paper is organised as follows. An overview of the methods proposed for detecting of PQ disturbances is presented in Section 2. In Section 3, we propose a statistically based detection method with an FDI approach. Section 4 studies the performance of the method detecting different PQ disturbances. Finally, the conclusions are given in Section 5. 2 Detection of power quality events The automated power quality analysis entails the following stages: the detection, segmentation and characterization of the power quality event. This information is useful to determine its cause and to establish limits of responsibilities between a network operator and final customer. An extensive and updated classification of different techniques available can be found in [12]; unfortunately, an analysis of their suitability for each of the above mentioned stages has not been clearly established. These stages can be preceded by a pre-processing stage of signal de-noising and normalisation. We have addressed the second and third stages thoroughly in prior works [13-18]. Thus, this paper focuses on the experimental research effort toward fast detection of electric signal disturbance within the framework of advanced smart inverter requirements. 205 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 Nowadays, well-known signal processing methods have been applied to detect PQ disturbances with satisfactory results. Evaluating electrical system disturbances involves studying voltage and current deviations from the ideal waveform. In general, these deviations can be classified into two groups under the PQ paradigm: variations and events [19]. The former (eg, harmonics, overvoltages, unbalances, etc.) are generally regarded as small and gradual deviations from the voltage/current sine wave, characterised as steady-state phenomena; the latter produce sudden, large deviations of the waveform, are characterised as non-stationary random phenomena, and are usually caused by incidents involving the electrical system's operation conditions. According to [20], the event detection methods can be grouped into time-dependent waveform feature [21], signal transformation [22] and parametric models [20]. Many studies have analysed the advantages and disadvantages of these methods. In particular, [23], shows the statistical performance of various detectors of a signal affected by a dip, using methods based on root mean square (RMS), Kalman filter, wavelet, peak voltage, missing voltage and generalized likelihood ratio test (GLRT). However, despite the wide range of PQ event parameters (frequencies, magnitudes, and durations), it is difficult to find a single method that is suitable for detecting of all types of them. For example, the commonly used wavelet transform is suitable for detecting of transients but fails for short- and long-duration variations (such as sags and swells, particularly those with a nonrectangular shapes) [24]. The situation is similar for HOS; the behavioural differences in frequency between the transients and sag (or swell) demands, which the sliding window used to extract HOS features, were completely different in both cases. For the transients, after a high-pass filter, the width of the window may be less than one cycle; for the last events, which are roughly of the same frequency as the "healthy" signal (ideal power-line sine wave), the window must contain a cycle of the 50-Hz sine wave [25]. Thus, in this paper, to unify the statistical treatment of all PQ events, it will be necessary to choose a new variable that exclusively distils the information of the perturbation from the waveform, without any losses (a descriptor). Moreover, disturbance detection is a critical task and an effective protection requirement that is needed to successfully control the interconnection of a DG system to the grid. It must be performed on-line and in strict real-time, with the less number of false detection and accomplishing the temporary response specifications suitable for monitoring parameters and planned protective actions. Fig. 1 shows a comparison of the main standards in PQ applications and protection, referring to the response times needed to disconnect the equipment of the DG system's equipment when the voltage exceeds the allowable operating ranges. Figure 1: Comparison of responses to abnormal voltage according to different standards. As shown in Fig. 1, IEEE 929 [26] and I EC 61727 [5] are very similar with respect to operating ranges and disconnection times. In these standards, being outside the normal range of operation is necessary to disconnect the equipment in < 2 s. One can see that at a relatively large distance from the percentage of nominal voltage, the trip points require low disconnection times (< 0.10 s). IEEE 1547 [6] aims for such high percentages of rated voltage to not be achieved, seeking a compromise solution to the overvoltages, so that disconnection times can be increased. Finally, the VDE 0126-1-1 [7] standard seeks to provide a compromise solution and greater simplicity in controlling the device with only two trip points for overvoltages and undervoltages, respectively. Thus, to prevent failures of high relevance to the power system, the protection devices integrated with the grid must be able to detect disturbances in early stages. We are definitely dealing with a problem of change point detection within the FDI domain, in response to the specific fault. A thorough survey can be found in [27]. The problem of change detection has remained an area of strong interest in recent years, as well as the study of parametric statistical tools for detecting abrupt changes in discrete time signals and dynamic systems [28,29]. According to the model-based filtering 206 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 introduced in [29], and bearing in mind that most of the detection methods use a detection parameter (DP) joint a threshold, the detection of abrupt changes in the processed signals can be conceived in three steps: - Residual generation: The basic principle is that residuals from are generated signal modelling. These residuals are expected to be zero (or zero mean) under no-fault conditions. In practical situations, the residuals are corrupted by the presence of noise, unknown disturbances, and uncertainties in the system model. The aim of the method is to generate robust residuals insensitive that are to these noises and uncertainties but are sensitive to faults. - Detection parameter generation: The filter residuals must be treated in order to be transformed into a distance measure (DP) that measures the deviation from the no-change hypothesis. - Stopping rule: This step is based on a statistical algorithm to make decisions on whether the deviation of a DP is significant. Figure 2: Block diagram of the detection method based on filtering [29]. 3 The proposed detection algorithm This work mainly focuses on a quantitative modelbased approach to FDI, so that it can be used to develop more efficient and reliable equipment. The detection methods included in an intelligent electronic device (IED) allow PQ measurement and provide, protection functions and predictive tools, making the device ready to be used in the new smart grid model with the characteristics described in [30], i.e. fast registration of the events, transmission to the power network control system and smart relay protection devices [5]. In our work [31] a high-capacity IED was designed to be embedded into inverter equipment took PQ, protective relay functions and synchronisation standards into account. For a fast activation of the protection functions, the detection instant should be as close as possible to when the disturbance start. Therefore, the analysis window should be as short as possible. Thus, the requisites of the algorithm are low computational load, high accuracy and robustness. What is more, if we wanted to detect the event in real-time the challenge is to make the decision in less than a half-cycle, obviously. In prior work [31], a detection method based on a CUSUM test of Page was initially proposed. In that work, the signals used were generated by a power system with a frequency was 50 Hz, in which the IED captured every half cycle (10 ms) while operating in real-time [11]. The CUSUM algorithm was selected because it operates sample to sample, making it suitable for fast detection. This algorithm accumulates the difference between the sample mean and a target mean, and plots it cumulatively. A change in the DP gradient, either increasing or decreasing, indicates a departure from the normal circumstances of the residual values [32,33]. The acquisition process, which is executed with a high priority loop, is joined in the detection process by CUSUM, which is executed with a normal priority loop that occurs in a time below 10 ms. The preliminary results from applying the CUSUM algorithm to real-time PQ detection were sufficient but not entirely satisfactory, as will be explained below. Moreover, the method's performance was only quantified using synthetic disturbances. Thus, this paper provides a following step and analyses the CUSUM method with real three-phase disturbances. A modification of the original algorithm proposed in [31] is needed to detect an event in a real environment with the lowest number of false detection. The new proposed technique for fast detection of three-phase events and the new methods used to generate residuals are presented here; additionally, the rules to calculate the DP and decide whether to stop are thoroughly described. 3.1 Residual generation As mentioned above, the aim of the residual generation in our work [31] was to model the signal in order to obtain robust residuals that are insensitive to these noises and uncertainties but are sensitive to faults. To this end, the first idea suggested was a unified analysis of the three-phase power system using the Clark Transform. However, for an unbalanced event, the transformation output adds a ripple component over the DC value, which is twice the source fundamental frequency fo. To get the DC values, a notch filter or a low-pass filter with a its cut-off frequency lower than 2*fo Hz is recommended to remove the ripple component [3436]. Unfortunately, the use of an additional filtering step causes a delay in the event detection; hence it increases the response time, which results in a delay in the overall response time. Therefore, a new method was needed here to overcome the above mentioned deficiency. A simple method called the peak detection method [37, 38], generally used in power electronics converters [39, 40], can be used to obtain our input variable. The peak detection method offers fast response time as well which, of less than a quarter of a cycle. This method is very simple 207 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 to implement and has a low computational burden; however when it was applied in real environment, it proved very sensitive to noise. Thus, the peak detection method was rejected in the early stages of this research. A filtering method was finally considered. In residual generation, an adaptive filter takes the measured signal and transforms it into a sequence of residuals that are similar to white noise before the change occurs. The filtering approach is used to separate the signal from the noise. For this purpose, finite impulse response (FIR) or infinite impulse response (IIR) filters can be used, as long as designed by any standard method (Butterworth, Chebyshev, etc.) [29]. In this work, a high pass Butterworth filter was used to generate the residuals. 3.2 Detection parameter algorithm The next step is to threat the residuals through a statistical algorithm in order to detect any abrupt change in the input signal early. To this end, several approaches can be used: analysing of the mean or variance of the residuals, analysing the square of the residuals or other options based on probability ratios. In this work, the statistical algorithm used to develop the mentioned change detector (DP) is the CUSUM method, which is based on the mean and variance of the residuals. It was selected method because it requires minimal computational effort and operates sample to sample, which it is very appropriate for fast online detection. The change detection of the CUSUM method is labelled as a change in the mean of the filtered signal. The input to the CUSUM algorithm is called distance the measure, s, which is set with the residuals from the filter, st = £( (Fig. 2). The CUSUM algorithm directly includes all of the information in the sample sequence by plotting the cumulative sums of any deviation of the sample values from a target value. The CUSUM method is widely used across industries for monitoring deviations in a process with respect to a target value and also for finding evidence of change in the a process's mean; in particular, it has been successfully employed in power system fault detection [29, 42-44]. The CUSUM method is easy to handle and useful for detecting the locations of change points. The combination of information from several samples makes the CUSUM algorithm a suitable method for detecting abrupt changes of PQ events in real-time. The CUSUM version used in [31] was the so-called tabular or two-sided CUSUM method [28,32]; it was designed to detect high and low changes in mean processes, as well as record the cumulative sums of the signal samples in two directions. In this paper, the DP proposed to detect disturbances is only based on the statistical estimator for detecting an increase in the mean of the residuals, which is given by Eq. (1). gt = max (gt-i + st - (o + K) 0) (1) where the DP, which is named g, sums the inputs st from the filter. In Eq. (1), is the ideal mean of the process control state and K is the reference value set with a value that allows for a fast fault detection, which is usually half of the difference between the value of the average target control state and the value of the average at which the process is considered out of control [32]. The constant value given by the sum of and K has been removed to prevent false alarms. In this work, unlike the previous one [31], these parameters are configured. The parameter has been set to the mean of the samples processed to the current time, and the K parameter was configured at 0.5 times the standard deviation of the filtered signal. 3.3 Stopping rule The purpose of the stopping rule phase is to detect when a process is considered to be out of control. In signal processing, the aim is to give an alarm when any statistic crosses a decision interval called a threshold, H. As mentioned above, non-zero residuals are generated if there is a disturbance in the processed signal. This situation produces a change in the mean of the samples processed at the current time, so that the change detection algorithm, g, must indicate the variation. The main problem in statistical change detection is determining the optimal threshold value to obtain high accuracy in change detection and a low rate of false alarms. Regarding the preliminary results obtained with synthetic signals, the DP deviations from zero were considered to be produced by changes in the pure sinusoidal shape of the signal. However, with the measured signals, false alarms were generated in many cases when the threshold H was initialised to zero. To set a threshold H that avoids false alarms, 127 measured events were filtering and analysed. Later, the CUSUM algorithm was used to obtain the DP, and the results were studied through of a probability density function (PDF). Fig. 3 shows the PDF. One can see that setting the threshold lower than the critical DP, the zero value, increases the probability of detection, but also produces an increase in the number of false alarms, due to the underlying noise of the real measurements. Thus, a threshold that is slightly greater than zero must be selected to avoid this problem and to design a 204 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 robust detection algorithm; 0.05 was the final threshold selected for use. 43D - | 120- I o - o z m- — —- J ■: 0.2 0.4 ojs - -.2 1.4 DP Figure 3: Results from designing the threshold over 127 disturbances. detection: the delayed detection. This issue is directly related to the ability of the selected algorithm to generate the detection signal alarm when a change occurs in real-time. An additional counter, called N, is used to reduce the effect of the analysis window and accurately calculate the start of the transition. The N parameter, introduced by Montgomery [32], estimates the first out of control instant of the process and indicates the number of consecutive times that the DP is non-zero after crossing H. Hence, the N parameter can be used to determine the time elapsed between the start of the transition (S) and the detection instant (T). Then, the non-stationary state of the process is triggered as a result of subtracting N from the initially set trigger point, T. Finally, the block diagram of the proposed technique is illustrated in Fig. 4. In this diagram, the signals are three-phase signals with no disturbance. In the residual generation block, the signals per phase are filtered and the residuals for each are obtained. Then, the residuals are treated using the CUSUM algorithm and the DP per phase is calculated. Finally, the diagnostic logic block makes the decision by using the established threshold and following the stopping rule: the start of a disturbance must be triggered (T) when the DP is across the threshold. Figure 4: Block diagram of the proposed method for disturbance detection This paper introduces further improvements in the algorithm and covers another critical issue in the online 4 Experimental results In order to validate the detector, other results from analysed measured signals are presented in this section. Considering that a design goal is to use the proposed technique alone for a wide range of PQ event parameters, the following cases are studied: dip, overvoltage, transient and interruption. All data used in this paper were obtained from measurements with the sampling rate fs = 4800 Hz and 50 Hz power system frequency. Thus, each cycle contains 96 samples, or 20 ms. In this section, all of the signals' horizontal axes show the time in samples. The characteristics of the Butterworth used are 5th-order high pass, with a cutoff frequency of 3600 Hz. Let us assume that the values of the DP that cross the threshold after a detected transition in the time of one cycle below are not considered to be transitions but effects of the previous transitions detected. 41 Dips Fig. 5 shows a three-signal with a multi-stage dip (top graph) and the detection parameters with the same threshold (bottom graph). From Fig. 5, one can see that there are three detection areas that correspond with the development between stages of the dip. The next figures, Figs. 6, 7 and 8, zoom into the detection areas. The DP per phase is individually shown in these figures, and the trigger instants T (vertical dashed line) and the calculated starting instant S (vertical solid line) are included in each one. Remember that T is the first instant when DP is across H (horizontal dashed line) and that S is the result of subtracting the counter N from T. 1184 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 Figure 5: From top to bottom: input signal with multistage dip and detection parameters with the threshold Figure 6: From left to right: zooms of the first detection area in phases A, B and C. Figure 7: From left to right: zooms of the second detection area in phases A, B and C. Table 1: Detection instants for multi-stage dip Phase First transition Second transition Third transition T S T (sample) (sample) (sample) S (sample) T (sample) S (sample) A - - 459 458 587 585 B 121 119 456 455 584 583 C 117 116 459 457 587 586 For each detection transition area, the final trigger was set to the minimum value of the S parameter in the three phases. Hence, for the analysed dip, the final triggers were set at samples 116, 455 and 583, for the first, second and third areas, respectively. Figure 9 shows the original waveforms and the RMS voltage over a half-cycle rectangular window, with the triggers (vertical lines), showing the transitions. - .E 0 S -:.. - PhA PhE - PhC 300 400 500 Time {in sampfes} Figure 9: From top to bottom: input signal with triggers and RMS voltages with triggers. 4.2 Overvoltages An example of a voltage dip due to single-phase fault with overvoltages in the non-faulted phases is shown in Fig. 10. As with in the prior case, there are three detection areas. Figure 8: From left to right: zooms of the third detection area in phases A, B and C. The detection instants calculated by the method are shown in samples in Table 1. 0 100 200 300 400 £00 800 700 8«) 900 1000 T me [- samples} Figure 10: From top to bottom: input signal with overvoltage and detection parameters with the threshold. 1185 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 The next figures, Figs 11, 12 and 13, zoom in on the detection areas. Figure 11: From left to right: zooms of the first detection area in phases A, B and C. Figure 12: From left to right: zooms of the second detection area in phases A, B and C. Figure 13: From left to right: zooms of the third detection area in phases A, B and C. The detection instants, triggered instants T and the calculated starting instant S are shown in samples in Table 2. Table 2: Detection instants for overvoltages. Phase d First transition Second transition Third transition ■■ 128 ■■ 127 ¡MSB 693 ■■ 691 ■■ ■■ B 129 127 685 682 893 889 C 128 127 685 683 893 889 The final triggers are set to the minimum value of the S parameter in the three phases per transition. Thus, the values of the triggers are set at samples 127, 682 and 889, for the first, second and third transition areas respectively. Fig. 14 shows the original waveforms and the RMS voltage over a half-cycle rectangular window with the triggers (vertical lines), showing the transitions. Figure 14: From top to bottom: input signal with triggers and RMS voltages with triggers. 4.3 Transients In this case, the detection of a transient is presented. Fig. 15 shows the original waveform with the transient around sample number 500 and the DPs resulting from CUSUM. Fig. 16 shows a zoom of the original waveforms in the area of the transient. One can see that the three phases are affected by the disturbance. The DPs per phase in the transient area are individually shown and zoomed in Fig. 17. Also, the trigger instants T (vertical dashed line) and the calculated starting instant S (vertical solid line) are included in the graphs of Fig. 17. The trigger point (T) is sample 487 for phases A and B, and sample 490 for phase C. The starting instant (S) is sample 486 for phases A and B, and sample 488 for phase C. Thus, the final trigger was set to the sample 486. The final trigger is shown in Fig. 18 with the original waveforms and the RMS voltage over a half-cycle, rectangular window. I«] 1600 o.i -PhA -PhB ■ -PlhrC .Ü'IU'IAI 600 800 1000 1200 1400 1600 T me In samples) Figure 15: From top to bottom: input signal with transient and detection parameters with the threshold. 1186 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 Figure 16: Zoom of the transient area. Figure 17: From left to right: zooms of the transitions for phases A, B and C. 100 200 300 400 500 600 700 800 900 1000 d 0.5 L/Î ¡1 -0.5 -1 - PhA PhB - PhC 0 100 200 300 400 MO 800 700 800 300 1000 Tir~= ' n E5~:z ^e) Figure 18: From top to bottom: input signal with the trigger and RMS voltages with the trigger. 4.4 Interruptions Fig. 19 shows the original waveform of an interruption (top graph) and the calculated DPs per phase (bottom graph). Zooms of the detection parameters in the area of the interruption are individually shown in Fig. 20, including the trigger instants T (vertical dashed line) and the calculated starting instant S (vertical solid line). The trigger points (T) for phases A, B and C are sample 492, sample 489 and sample 484, respectively. The starting instants (S) for phases A, B and C are sample 491, sample 486 and sample 481, respectively. The final trigger is shown in Fig. 21, with the original waveforms and the RMS voltage over-half cycle rectangular window. The final trigger is set to the minimum value of the S parameter in the three phases, which occurs at sample 481. - - PhA PhB - PhC 400 600 Time {in samples} Figure 19: From top to bottom: input signal with the interruption and detection parameters with the threshold. Figure 20: From left to right: zooms of the transitions in phases A, B and C. - «« -PhA ' PhB . -PhC - d 0.5 ■K. E 0 tn ^ -0.5 -1 400 600 SCO Time {in samples} Figure 21: From top to bottom: input signal with the trigger and RMS voltages with the trigger. 5 Conclusions The present study provides a useful technique for fast online detection of PQ events. The proposed method, based on the CUSUM algorithm as a statistical estimator, accurately detects the transition for three phases of different PQ events. Furthermore, the main advantages of the solution given in this paper are that the 1187 I. M. Moreno-Garcia et al; Informacije Midem, Vol. 45, No. 3 (2015), 204 - 215 CUSUM algorithm is extremely easy to implement and 4. has very little computational burden, making it appropriate for an effective protection requirement. Another advantage of the CUSUM method is it performs sample-by-sample evaluation, making it suitable for early event detection. Moreover, the method overcomes the detection-delay problem inherent to the analysis 5. windows of the conventional methods by including a counter that determines the time elapsed between the start of the transition and the detection instant. Ad- 6. ditionally, a robust threshold setting for the detection index has been proposed, configured with high sensitivity and a low false-alarm rate. The CUSUM statistical 7. estimator has been used to determinate the threshold. To this end, a probability density function of the detection parameter results has been made in order to apply 8. CUSUM to a wide set of real measurement signals has been made. The implemented tests and experimental 9. results show the effectiveness of this algorithm for detecting events and triggering with high precision the instant in which the three-phase signals start to deviate due to any disturbance. In summary, the proposed 10. technique does not require much computational resolution and is very well chosen for implementation in protective relays. It is a robust detection algorithm that is capable of detecting PQ events in real-time. 6 Acknowledgements This research is partially supported by FEDER-INNTERCONECTA project Total Integrated GRid Intelligent System (TIGRIS) ITC-20131002, under contract no. 12013095 and by FEDER-INNTERCONECTA project PV-On Time ITC-20131005, under contract no. 12013096. In addition, this work has been supported by the Spanish Ministry of Economy and Competitiveness under Project TEC2013-47316-C3-1-P. 7 References - 14. 1. Bassi AM. Evaluating the Use of an Integrated Approach to Support Energy and Climate Policy Formulation and Evaluation. Energies 2010;3:1604-21. doi:10.3390/en3091604. 2. Moreno-Muñoz A, De la Rosa JJG, López MA, Gil 15] de Castro AR. Grid interconnection of renewable energy sources: Spanish legislation. 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Detection of generated and measured transient power quality events using Teager Energy Operator. Energy Convers Manag 2011;52:1959-67. Arrived: 06. 06. 2015 Accepted: 04. 09. 2015 1190 Original scientific paper /midem Journal of M Informacije | Journal of Microelectronics, Electronic Components and Materials Vol. 45, No. 3 (2015), 216 - 221 Thermal properties of polymer-matrix composites reinforced with E-glass fibers Barbara Bertoncelj1,2, Katarina Vojisavljevic3, Marko Vrabelj2,3, Barbara Malič3 1Domel, d.o.o., Železniki, Slovenia 2Jožef Stefan International Postgraduate School, Ljubljana, Slovenia 3Jožef Stefan Institute, Ljubljana, Slovenia Abstract: The influence of the fraction of the glass-fiber (EGF) reinforcement, from 0 to 15 wt%, on the thermal properties of the polymer-matrix composites with the CaCO3 mineral filler is studied. The proper ratio of glass-fibers and mineral filler is important for obtaining good mechanical, and at the same time good thermal properties of the composites used in production of high-quality components in electro industry. For this purpose, the thermal stability and the thermal properties of the fiber-reinforced composites are determined from a set of different characterization techniques and linked with the microstructural changes induced by the different fiber content. The composites are stable upon heating to 260 oC, and undergo thermal oxidation between 280 and 560 oC, as found by thermogravimetric and differential thermal analysis. The specific heat capacity, Cp, of the composites slightly increases with increasing EGF content for 0 to 10 wt% EGF, with respective values 0.899 J/gK and 0.903 J/gK at 20 oC. Slightly lower Cp values of the composite with 15 wt% EGF could be related to a non-uniform distribution of EGF and presence of voids evidenced by scanning electron microscopy. Thermal conductivity of the composites decreases with increasing EGF content from 0.960(6) W/mK to 0.878(2) W/mK for 0 and 15 wt% EGF, respectively. Keywords: glass-fiber composites; thermal stability; specific heat capacity; thermal conductivity Toplotne lastnosti kompozitov na osnovi polimerov, ojačenih s steklenimi vlakni Izvleček: V članku smo raziskovali toplotne lastnosti kompozitov na osnovi polimerov, ojačanih z različnimi deleži steklenih vlaken (od 0 do 15 utežnih %) in z dodanim mineralnim polnilom CaCO3. Primerno razmerje steklenih vlaken in polnila omogoča doseganje dobrih mehanskih in istočasno tudi toplotnih lastnosti kompozitov, ki jih uporabljamo za proizvodnjo komponent v elektroindustriji. Toplotno stabilnost in toplotne lastnosti kompozitov smo analizirali z vrsto metod. S termično analizo smo zasledovali termično stabilnost in termični razpad kompozitov. Izkazalo se je, da so kompoziti termično stabilni do temperature ~ 260 °C, nato v temperaturnem območju od ~280 °C do 560 °C pride do oksidacije in termičnega razpada polimerne faze. Specifična toplotna kapaciteta, Cp, kompozitov narašča z naraščajočim deležem vlaken od 0 do 10 %. Nekoliko nižje vrednosti Cp kompozita s 15 % deležem vlaken povezujemo z nehomogeno razporeditvijo steklenih vlaken in prisotnostjo por v mikrostrukturi, ki smo jo analizirali z vrstičnim elektronskim mikroskopom. Toplotna prevodnost kompozitov se znižuje z naraščujočim deležem vlaken in je v območju od 0.960(6) W/mK do 0.878(2) W/mK za kompozita z 0 in 15 % vlaken. Ključne besede: kompoziti s steklenimi vlakni; termična stabilnost; specifična toplotna kapaciteta; toplotna prevodnost * Corresponding Author's e-mail: barbara.bertoncelj@domel.com 1 Introduction Glass-fiber reinforced polymer-matrix composites, including bulk molding compounds (BMCs) [1], are widely used in electro and automotive industry due to their easy processing, light weight, low cost and the possibility to tailor their properties. BMCs are available as pre-prepared mixtures of the polymer matrix, short glass fibers and mineral fillers. Such composites are usually processed by injection or compression molding - the techniques commonly used for mass production of small complex shaped components. Functional properties of the composites strongly depend on the weight fractions and properties of in- 216 © MIDEM Society B. Bertoncelj et al; Informacije Midem, Vol. 45, No. 3 (2015), 216 - 221 dividual constituents, i.e. polymer matrix, fibers and mineral filler particles. In assembling parts for electrical motors, such as housings, yokes and shaft insulation, the composite material should effectively dissipate the heat generated during the operation of the device to avoid possible defects. For that reason, the composite materials should have high thermal conductivity. The latter can be enhanced by incorporating fibers, metal or ceramic filler particles with high thermal conductivity, such as carbon fibers, carbon black powder, silver and alumina, into the polymer matrix [2-6]. It was shown that the thermal conductivity of the fiber reinforced composites is strongly influenced by the microstructural parameters, such as the fiber volume content, fiber diameter and fiber orientation [7]. Kalaprasad et al. studied the effect of fiber composition and fiber orientation of low-density polyethylene composite laminates reinforced with glass fibers in the amounts of up to 20 % on the thermal conductivity and thermal diffusivity at cryogenic and high temperatures. They observed that the thermal conductivity of the composites increased with the fiber content and with temperature. They also reported that the difference between the thermal conductivity parallel and perpendicular to the fiber direction was marginal because of the isotropic nature of the glass fibers [8]. In our previous work we investigated the effect of E-glass fibers (EGF) weight content and distribution on mechanical properties of the polymer-matrix composites. We found that the highest flexural strength along with the highest degree of the EGF distribution homogeneity was achieved for the samples with 10 and 15 wt% of EGF, i.e., 109 ± 4 MPa and 121 ± 15 MPa, respectively. Note that the polymer content was 21 wt%. At an even higher EGF weight content the flexural strength decreased, which was attributed to increased fiber-fiber interactions and consequent poorer stress transfer between the fibers, while at the EGF content below 10 wt% there were not enough fibers to give a sufficient mechanical strength to the composites [9]. The aim of this work was to study the effect of the EGF weight content and their microstructure on the thermal properties of the composites as this is important for their application in electro industry. The thermal stability of the composites was studied by thermal analysis, and the materials were analysed by differential scanning calorimetry, in the expected temperature interval of operation, i.e. between room temperature and 180 oC, so that the values of the specific heat capacity could be extracted. Furthermore, the thermal conductivity of the composites was measured at room temperature depending on the weight fraction of EGF. 2 Experimental Four sets of BMC test samples were commercially prepared from compounds containing 21 wt% of polymer-matrix (PM) based on thermosetting unsaturated polyester and with varying fractions of EGF and CaCO3 mineral filler (MF). The sample with the mineral filler only was prepared as reference. The composition of the samples, denoted as BMC-0, BMC-5, BMC-10 and BMC-15 in further text, is presented in Table 1. Tablel: Composition and density of the BMC composite samples. Sample PM (wt%) EGF (wt%) MF (wt%) P (g/cm3) BMC-0 21 0 79 1.96 BMC-5 21 5 74 1.91 BMC-10 21 10 69 1.87 BMC-15 21 15 64 1.86 Compression molding technique was used to prepare the test specimens according to the standard ISO 3167 [10]. The dimensions of the specimens and the cutting position for obtaining the plan-view and cross-sectional samples for microstructural characterization are shown in Figure 1. The arrow indicates the flow of the compound during the molding process. Figurel: Dimensions of the test specimens and the cutting position for obtaining the plan-view and cross-sectional surfaces for microstructural characterization. According to [11]. The samples for microstructural analysis were prepared by standard metallographic techniques. Field emission scanning electron microscope JSM-7600F (FE SEM, JEOL Ltd., Tokyo, Japan) was used for microstructural characterization. The polished plan-view and cross-section surfaces of all samples were sputter-coated with a thin carbon layer to avoid charging in SEM. SEM images were taken in the backscattered-electron mode (composition contrast mode - COMPO) at an accelerating voltage of 15 kV. The density of the samples was determined by the water immersion technique and calculated according to the equation, 217 B. Bertoncelj et al; Informacije Midem, Vol. 45, No. 3 (2015), 216 - 221 P = m_ m„ - m„ • Pw (1) where the ms is the mass of the sample in the air, mw is the mass of the sample when immersed in the water and pw is the water density at room temperature [12]. Thermal stability of the samples was studied by ther-mogravimetric and differential thermal analysis (TG-DTA) using a thermal analyzer Netzsch STA 409 PC. The samples of about 5 mm in diameter and the thickness of ~ 3 mm were placed into platinum-rhodium crucibles and heated from room temperature to 650°C at a heating rate of 5K/min in synthetic air atmosphere. The differential scanning calorimetry (DSC) curves were measured by a differential scanning calorimeter DSC 204 F1 (Netzsch, Germany). The samples of about 5 mm in diameter and the thickness of ~ 1 mm were put in Pt crucibles with lids, and heated in a calorimeter with a heating rate of 2°C/min from room temperature to 180°C. To determine the specific heat capacity Cp of the BMC samples, sapphire (Netzsch, diameter of 5.2 mm, thickness of 1 mm) was used as the standard material. The Cp values at different temperatures (20°C, 100°C and 180pC) were extracted from the linear fit of the experimental curve. Thermal transport properties of the composites were measured with the transient plane source technique [13] by using the HotDisk TPS 2500S equipment (Hot Disk AB, Gothenburg, Sweden) at room temperature. The samples for measuring the thermal conductivity were also prepared by compression molding, but they were of different dimensions, i.e. 340x80x4 mm. During the HotDisk measurement a thin disk sensor (kapton, 2 mm diameter), used both as the heat source and the temperature monitor, was sandwiched between two individual samples. The material was heated at 50 mW for 5s. The length of the current pulse was chosen short enough so that the sensor could be considered in contact with an infinite solid throughout the transient recording. In this way the thermal properties of the surrounding material could be determined by measuring the temperature increase of the disk sensor in a short period of time. [14, 15] 3 Results and discussion 3.1 Microstructure SEM micrographs of plan-view and cross-sectional areas of all composite samples are collected in Figure 2. In the BMC-0 sample we can observe irregularly shaped CaCO3 filler particles with the sizes from a few pm up to a few 10 pm in the polymer matrix. Note that the planview and cross-sectional areas were very similar, meaning that the distribution of the filler particles does not depend on the compound filling direction (see Fig. 2a). We observe that in the plan-view microstructures of the EG F-reinforced composites the fibers are mainly oriented in the direction of the compound filling flow during the molding process. This is also apparent from the intersections of the glass fibers in the cross-section micrographs (see Fig. 2b, d, f): namely, the cross-sections of the fibers that are perpendicular to the cutting position are circular and others, which are cut at an angle, are oval-shaped. At lower weight contents of EGF (< 10 wt%) the fibers are uniformly distributed in the PM. At the EGF content of 15 wt% we observe clustering of the fibers, meaning that their distribution is not homogeneous [9]. Presence of voids in the vicinity of the clusters may be related to a poor adhesion between the fibers and the PM in the latter sample (see Fig. 2f). Figure 2: SEM micrographs of the plan-view and cross-sectional surfaces of the BMC samples: BMC-0: a, BMC-5: b, c, BMC-10: d, e, BMC-15: f, g. 217 B. Bertoncelj et al; Informacije Midem, Vol. 45, No. 3 (2015), 216 - 221 The densities of the composite samples are slightly decreasing with increasing EGF weight fraction, from 1.96 g/cm3 to 1.86 g/cm3, for BMC-0 and BMC-15, respectively (cf. Table 1). Such small decrease could be tentatively connected to the porosity in the latter sample, but also to the increased weight fraction of the fibers. Note that the densities of the dispersed phases, EGF and CaCO3 are quite similar, 2.54 g/cm3 and 2.65 g/cm3, respectively [16]. 3.2 Thermal stability The thermal analyses of the BMC-0 and BMC-10, which was selected as a representative EGF-reinforced composite, are collected in Figure 3. The TG-DTA curves reveal that the samples are thermally stable upon heating to 260°C. A slight inclination of the TG curves of both samples upon heating from room temperature to around 260°C, accompanied by a hardly discernible endothermic DTA signal, is attributed to evaporation of volatile species. The major weight loss occurs in the temperature range between 320°C and ~560°C and is accompanied by endothermic (383 °C) and exothermic (398 °C and 448 °C) events. It is attributed to the oxidation and thermal degradation of the PM [17]. Above the temperature of 560 °C only inorganic phase is still present, i.e. the glass fibers and CaCO3 mineral filler, as confirmed by X-ray diffraction (pattern not shown here). The overall mass losses of 21.83 % and 20.85 % for the samples BMC-0 and BMC-10, respectively, correspond well to the initial content of the PM (21 wt%). This confirms the complete decomposition of the PM during the thermal treatment to 650°C. The thermal stability of the composites confirmed by TG-DTA, i.e. the absence of any thermal effects between 25°C and 180°C, allowed us to measure the specific heat capacity, Cp, of the samples over the mentioned temperature interval by DSC. The Cp values at 20, 100 and 180°C were extracted from the linear fits of the C curves, calculated from the values of the heat flow p measured during the heating of the sample. The Cp of the sample with the mineral filler only, is 0.899 J/gK at 20 oC and it increases with temperature to 1.154 J/gK at 180 oC, see Table 2. The values of Cp of the samples with 5 and 10 wt% EGF are almost the same, and also very similar to the sample without EGF, and they show a similar, slight increase of Cp with temperature. Only the sample BMC-15 steps out from the observed trend, since the Cp values at all temperatures are lower than the values obtained for the samples without EGF or with lower EGF contents. This difference could be tentatively related to a non-uniform microstructure of the BMC-15 sample and/or to the presence of the voids between the clustered fibers, see Fig. 2f. Table 2: Specific heat capacity (Cp) of the composites, obtained from the linear fit of the Cp experimental curves. Cp [J /gK] BMC-0 BMC-5 BMC-10 BMC-15 20°C 0.899(1) 0.903(1) 0.903(1) 0.861(1) 100°C 1.027(1) 1.039(1) 1.038(1) 0.991(1) 180°C 1.154(1) 1.175(1) 1.174(1) 1.122(1) 100 9590 8580 - 10095 90 85 80 1,0 / Temperature (°C) Figure 3: TG and DTA curves of the BMC-0 and BMC-10 composites. 3.3 Thermal conductivity The thermal conductivity, A, of the composites with different weight portions of EGF is shown in Figure 4. The values of A for the composite BMC-0 is 0.960(6) W/ mK and it decreases with increasing EGF content to 0.878(2) W/mK for the composite BMC-15. The reported values of thermal conductivity for the polymer matrix, EGF and CaCO3 mineral filler are respectively, a few 0.1 W/mK, ~1-1.3 W/mK and ~4.6-5.6 W/mK, see Table 3. A slight decrease of the thermal conductivity of the polyamide-matrix composites with increasing glass fiber content (0 -5 wt%) was also observed by Li et al. Table 3: Thermal conductivity, A, of the polymer, glass fibers and CaCO3 mineral filler obtained from literature. PM EGF CaCO3 I A (W/mK) 0.12 - 0.50[16]; 0.1 - 0.3[18] 1.04™; 1 [21]; 1.1 [22]; 1.3[19] 5.6[20]; 4.6-5.5[23] 0,5 0,5 217 B. Bertoncelj et al; Informacije Midem, Vol. 45, No. 3 (2015), 216 - 221 [22]. The composites contained alumina or magnesium hydroxide fillers with respective A values of 30 and 80 W/mK. The authors explained that the decreased thermal conductivity of the composites was related to the formation of the thermally-resistive network of the glass fibers (cf. Table 3) which limited the heat transfer between the filler-particles. We propose a similar trend in our case, namely the increasing fraction of the heat-resistive glass fibers contributes to a gradual slight decrease of the thermal conductivity of the composites. In addition, the thermal conductivity of the composite with 15 wt% EGF could be affected also by the presence of voids, see Fig. 2f. 0,96- ■ £ § 0,94- I 0,92- 0 ^ T3 C 0,90- ■ 1 H 0,88- , —i-1-1-1-1-1-1- 0 5 10 15 EGF content (wt%) Figure 4: Thermal conductivity of the BMC samples versus the EGF content. 4 Conclusions In the present study, we examined the thermal stability, specific heat capacity and thermal conductivity of the composites with glass-fibers in the amounts from 0 to 15 wt%. We found that the thermal stability of the composites is not influenced by the glass-fiber content, the composites proved to be stable to ~260 oC. The specific heat capacity of the composites slightly increases with the increasing glass-fiber content (0 to 10 wt%) and with temperature. However, the composite with the highest fiber content, 15 wt%, exhibited slightly lower values which could be tentatively related to its non-uniform microstructure. The thermal conductivity of the composites was found to slightly decrease with increasing fiber fraction, with the value of 0.878 W/mK for the composite with 15 wt% of fibers. Such decrease could be explained by the formation of the network of thermally resistive glass-fibers which effectively hinder the heat transfer through the material. The right balance of the thermal properties, and fiber distribution homogeneity, necessary for a suitable mechanical performance can be achieved by tailoring the EGF and CaCO3 mineral filler content. Based on the results presented in this and our previous work [9] the composites with 10 wt% showed optimal mechanical and thermal properties. 5 Acknowledgement BB gratefully acknowledges the financial support of the Ministry for Education, Science and Sport of the Republic of Slovenia and the European Commission through the European Social Fund. BM and KV acknowledge the financial support of the Slovenian Research Agency (P2-0105). We acknowledge Jena Cilenšek from Electronic Ceramics Department, Jožef Stefan Institute, for assistance with thermal analysis. 6 References 1. R. Burns, "Polyester molding compounds". New York, M. Dekker, 1982. 2. S. Han, D.D.L. Chung, "Increasing the through-thickness thermal conductivity of carbon fiber polymer-matrix composite by curing pressure increase and filler incorporation'; Composite Science and Technology, Vol. 71, 2011, pp. 1944-52. 3. B. Rudin, D. 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Available at: http://www. almazoptics.com/CaCO3.htm Arrived: 20. 07. 2015 Accepted: 16. 09. 2015 217 Boards of MIDEM Society | Organi društva MIDEM MIDEM Executive Board | Izvršilni odbor MIDEM President of the MIDEM Society | Predsednik društva MIDEM Prof. Dr. Marko Topič, University of Ljubljana, Faculty of Electrical Engineering, Slovenia Vice-presidents | Podpredsednika Prof. Dr. Barbara Malič, Jožef Stefan Institute, Ljubljana, Slovenia Dr. Iztok Šorli, MIKROIKS, d. o. o., Ljubljana, Slovenija Secretary | Tajnik Olga Zakrajšek, UL, Faculty of Electrical Engineering, Ljubljana, Slovenija MIDEM Executive Board Members | Člani izvršilnega odbora MIDEM Prof. Dr. Slavko Amon, UL, Faculty of Electrical Engineering, Ljubljana, Slovenia Darko Belavič, In.Medica, d.o.o., Šentjernej, Slovenia Prof. Dr. Bruno Cvikl, UM, Faculty of Civil Engineering, Maribor, Slovenia Prof. DDr. Denis Donlagič, UM, Faculty of Electrical Engineering and Computer Science, Maribor, Slovenia Prof. Dr. Leszek J. Golonka, Technical University Wroclaw, Poland Leopold Knez, Iskra TELA d.d., Ljubljana, Slovenia Dr. Miloš Komac, UL, Faculty of Chemistry and Chemical Technology, Ljubljana, Slovenia Prof. Dr. Miran Mozetič, Jožef Stefan Institute, Ljubljana, Slovenia Jožef Perne, Zavod TC SEMTO, Ljubljana, Slovenia Prof. Dr. Giorgio Pignatel, University of Perugia, Italia Prof. Dr. Janez Trontelj, UL, Faculty of Electrical Engineering, Ljubljana, Slovenia Supervisory Board | Nadzorni odbor Prof. Dr. Franc Smole, UL, Faculty of Electrical Engineering, Ljubljana, Slovenia Mag. Andrej Pirih, Iskra-Zaščite, d. o. o. , Ljubljana, Slovenia Dr. Slavko Bernik, Jožef Stefan Institute, Ljubljana, Slovenia Court of honour | Častno razsodišče Emer. Prof. Dr. Jože Furlan, UL, Faculty of Electrical Engineering, Slovenia Prof. Dr. Radko Osredkar, UL, Faculty of Computer and Information Science, Slovenia Franc Jan, Kranj, Slovenia Informacije MIDEM Journal of Microelectronics, Electronic Components and Materials ISSN 0352-9045 Publisher / Založnik: MIDEM Society / Društvo MIDEM Society for Microelectronics, Electronic Components and Materials, Ljubljana, Slovenia Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale, Ljubljana, Slovenija www.midem-drustvo.si