48 JET JET Volume 17 (2024) p.p. 48-63 Issue 2, 2024 Type of article: 1.01 http://www.fe.um.si/si/jet.htm HARDWARE IN THE LOOP TESTING OF A PROTECTION MONITORING AND DIAGNOSTIC SYSTEM PREIZKUŠANJE STROJNE OPREME V ZANKI SISTEMA ZA NADZOR IN DIAGNOSTIKO ZAŠČITE Jernej Černelič R, , Boštjan Polajžer 1 , Janez Zakonjšek 2 , Alexey Nebera 3 , Gorazd Hrovat 4 Keywords: relay protection, hardware in the loop testing, real-time digital simulations, monitoring and diagnostic 1 Abstract Protection, automation, and control (PAC) devices are very important for the reliable operation of electric power systems (EPS), which can be improved further by monitoring the PAC devices. One way is to apply a protection monitoring and diagnostic (PMD) system, which was tested using a real-time digital simulator and two numerical protection relays in the hardware in the loop configuration. Furthermore, the communication between the protection relays and the PMD system was also tested, while the EPS faults were simulated in a safe environment on a digital simulator in real-time. When a fault occurs in the EPS, the PMD system performs the fault analysis, and generates a disturbance report within several minutes after the fault. The tested PMD system also gathers all protection relays' settings, thus reducing the workload of protection specialists significantly. R Corresponding author: Dr, Jernej Černelič, University of Maribor, Faculty of Electrical Engineering and Computer Science, Koroška Cesta 46, 2000 Maribor, Tel.: +386 2 220 7340, E-mail address: jernej.cernelic@um.si 1 University of Maribor, Faculty of Electrical Engineering and Computer Science, Maribor, Slovenia 2 Relarte d.o.o, Bohinjska Bistrica, Slovenija 3 Kontron d.o.o., Kranj, Slovenija 4 ELES d.o.o., Ljubljana, Slovenija JET 49 JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat Povzetek Naprave za zaščito, avtomatizacijo in nadzor so zelo pomembne za zanesljivo obratovanje elektroenergetskega sistema (EES), kar lahko dodatno izboljšamo z uporabo sistemov za nadzor teh naprav. Eden od način je uporaba sistema za nadzor in diagnostiko zaščite, ki je bil preizkušen s pomočjo digitalnega simulatorja v realnem času in dveh digitalnih zaščitnih relejev, povezanih s simulatorjem v zaprti zanki. Preizkušene so bile tudi komunikacijske povezave med zaščitnimi releji in sistemom za nadzor in diagnostiko, pri čemer so bile okvare v EES simulirane v varnem okolju, tj. na digitalnem simulatorju v realnem času. Kadar pride do okvare v EES, sistem za nadzor in diagnostiko opravi analizo okvare in izdela poročilo že v nekaj minutah po okvari. Poleg tega preizkušen sistem za nadzor in diagnostiko zaščite zbere vse nastavitve vseh zaščitnih relejev in tako zmanjša delovne obremenitve specialistov za zaščito. 1 INTRODUCTION The reliability of Electric Power Systems (EPS) depends on protection, automation, and control (PAC) devices [1,2]. In North American EPS, for example, the rate of protection device misoperation is between 6 % and 7 %, according to the North American Electric Reliability Corporation (NERC) [3]. Around 32 % of all misoperations are caused by incorrect settings, logic, or other protection design errors. Around 18 % of all misoperations are caused by protection device malfunctions, and around 10 % of all misoperations are caused by communication failures. These misoperations add up to around 60 % of all protection device misoperations. Most protection device malfunctions are detected after the fault events are analyzed, or after preventive maintenance. The malfunctions of the protection device have a high impact on the reliable operation of EPS, because some malfunctions may lead to a wider spread of an initially local EPS disturbance [2]. The protection device malfunctions are often called "hidden failures", as they may remain undetected until a short circuit or other disturbance occurs [4-7]. Hidden failures represent themselves when the protection device fails to clear the fault in the protected element (dependability), or when the protection device operates without a fault, or operates non-selectively with a fault outside the protected zone (security) [5]. All protection device malfunctions can be subdivided into three main categories: protection device failures, configuration errors, and external failures (Figure 1). The protection device failure can be caused either by hardware or software failure. The hardware failures include failures in the power supply, discrete input/output boards, the main board (CPU and memory), measurement boards, and communications. The software failures can be subdivided into firmware failure, Continuous Function Chart (CFC) logic failure, and manufacturer- specific software failure. The external failures can be subdivided into a current transformer (CT), voltage transformer (VT), and other secondary circuit failures, operational supply circuit failures, communication channels failures, and circuit breaker (CB) control circuit failures. With such a high number and diversity of failures, there is a strong need for a protection monitoring and diagnostic (PMD) system to identify all these failures [8]. Modern PAC devices provide information about their software, hardware settings, and statuses. Moreover, some PAC devices can also provide information about the conditions of external circuits. However, because of the high number of PAC devices and the diversity of information between different software versions and device types, it is already very challenging to gather all settings, statuses, and other information in one system. 50 JET Hardware in the loop testing of a protection monitoring and diagnostic system Figure 1: Structure protection malfunction causes Despite all the challenges, an even more complex system, such as a wide-area monitoring, protection, and control (WAMPAC) system, is proposed, to minimize the incorrect operations of all PAC devices, and, consequently, improve the reliability of EPS [1,9,10]. The WAMPAC system is expected to become an indispensable part of EPSs with a high level of operational uncertainties. One of the key functions of the WAMPAC system is the PMD system. The most successful implementation of such new technologies in an EPS is achieved by real-time testing in a closed-loop manner using an appropriate Real-Time Digital Simulator (RTDS). This means that the operation of the devices under test (in our case, the PMD system) feeds back to the states of the EPS model. Such tests are referred to as Controller Hardware-In-the-Loop (C-HIL) tests. The assessment of different HIL approaches for WAMPAC testing is provided in [11], with the focus on phasor measurement unit implementation in the HIL tests. In [12] the RTDS was used to test the implementation of a protection device and self-healing function in the simulated microgrid environment. In [13] the IEC 61850 generic object-oriented substation event (GOOSE) protocol was used to test the centralized microgrid controller in transition between the island and grid-connected operating mode using the C-HIL configuration. The HIL tests are used widely to validate the performance of PAC devices used in microgrids, AC and HVDC transmission systems [14-18]. JET 51 JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat In this paper, the PMD system, developed by the Kontron company, is presented in Chapter 2, and the hardware in the loop test setup is described in Chapter 3. The test results are collected and explained in Chapter 4, while Chapter 5 summarizes the paper and gives conclusions. 2 PROTECTION MONITORING AND DIAGNOSTIC SYSTEM The PMD system requires information about the EPS topology and EPS equipment status, which can be obtained using the common information model form Network Model Management or SCADA/EMS system [19,20]. The EPS equipment status signals are collected from the Supervisory Control And Data Acquisition (SCADA) system, while the EPS topology is obtained from the EPS model. The SCADA status signals contain information about the status of the PAC devices, and the 'in service' or 'out of service' information about power lines, control switches, and other primary EPS equipment. When the disturbance occurs, the PMD systems collect the disturbance records and configuration files automatically from all the protection devices, i.e., those that only detected the disturbance and those that operated (tripped). The disturbance records can also be uploaded to the PMD system manually. The measured voltage and current signals are then retrieved from the disturbance records, checked for feasibility to evaluate their reliability, and filtered automatically, identifying only those with short-circuit current or transient patterns. Next, the PMD system synchronizes the time of received voltage and current signals automatically, because the signals are measured on different devices and might not have synchronized clocks. Additionally, the measurements are often obtained, not only from different devices, but also from different power facilities. The proposed time synchronization method ensures high synchronization accuracy to a common time scale, with the worst-case error of less than 0.1 ms within one power facility, and less than 1 ms between different power facilities. After automatic synchronization, the PMD system identifies the start and end times of the disturbance. The start moment is considered a transient moment, registered by the recorded voltage and current signals, while the end moment is the moment of clearing the disturbance. Consequently, the total fault clearing time can be obtained from the start and end time of the disturbance. Then, the PMD system calculates the RMS values of the pre-fault and fault currents and voltages. The fault type and phase selection algorithms are initiated next, identifying the type of fault and affected phases. If a fault is located on a power line, the fault location algorithm [21] is initiated, but, if the PMD system fails to identify the fault type and location automatically, then it must be identified manually by the protection specialist. Furthermore, the PMD system creates the disturbance reports automatically, based on the abovementioned disturbance records and analysis process. The content of the disturbance report is presented in Figure 5 in Chapter 4 for a selected example. 3 HARDWARE IN THE LOOP TESTING The discussed PMD system was tested using the C-HIL configuration with the RTDS, which allows to test the measurement and PAC devices even in transient conditions. Moreover, the effect of PAC devices on the EPS can be analyzed without any hazard to the stability of the real EPS. Figure 2 details the entire test setup for testing the discussed PDM system. 52 JET Hardware in the loop testing of a protection monitoring and diagnostic system A single fully licensed NovaCor RTDS chassis can calculate up to 600 single-phase network nodes using a simulation step of 25 to 50 µs. It consists of 10 IBM Power8 RISC 3.5GHz licensed cores, 12 analog input channels with 16-bit resolution, ±10 V range and a 1 MS/s sampling rate, 24 analog output channels with 16-bit resolution and a ±10 V range and 160 kS/s sampling rate, and up to 64 digital input or output channels. The NovaCor RTDS also consists of an FPGA unit, which allows parallel simulation of subnetworks with power electronic devices such as FACTS that require shorter simulation steps of 1 to 5 µs. Figure 2: Hardware in the loop test setup The hardware in the loop test setup consists of an RTDS system, two voltage and current amplifiers, two numerical protection relays, and a remote connection to the PMD system (Figure 2). The PMD system, running on a server in a remote location of the Kontron company, was connected to two Siemens Siprotec 7SD5 numerical protection relays using a network switch with a Virtual Private Network (VPN) connection. The RTDS was used to simulate faults on a power line model, using a simulation step size of 50 µs. The calculated voltages and currents captured on the discussed power line were realized on the RTDS analog output channels. Two voltage and current amplifiers were used to amplify the voltages and currents to a specified range JET 53 JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat of 7SD5 protection relays. The trip signals of the 7SD5 protection relays were connected back to the digital input channels of the RTDS, where the signals were used to operate the corresponding circuit breakers in the power line model. Consequently, the faulted power line model can be disconnected from the rest of the EPS in real time, and the correctness of the protection relay operation can be studied. 3.1 Simulation model The simulated model of the EPS (Figure 3) consisted of a single 220 kV three-phase power line between the substations Podlog (Slovenia) and Obersielach (Austria). The power line model was divided into two sections, with the fault model in between, allowing the user to change the fault location with the parameter dL. Additionally, it was possible to select any combination of faulted phases with or without ground connection, and, consequently, simulate the single-phase, two-phase, or three-phase faults. The model also consisted of circuit breakers operated by the protection relays in case of a fault, while the VTs and CTs were considered only by the constant ratio. The substations were modeled using corresponding equivalent impedances and power sources. The RLC load was also added, to set the power flow for normal operation. Figure 3: Electric power system model The parameters of the symmetrical components of the modeled power line are collected in Table 1, where L is the length of the line, R p , X p, and C p are the resistance, reactance, and capacitance of the positive sequence, respectively, while R 0 , X 0, and C 0 are the resistance, reactance, and capacitance of the zero sequence. Additionally, I max is the maximum steady-state current. 6 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat JET Vol. 17 (2024) Issue 2 ---------- operate the corresponding circuit breakers in the power line model. Consequently, the faulted power line model can be disconnected from the rest of the EPS in real time, and the correctness of the protection relay operation can be studied. 3.1 Simulation model The simulated model of the EPS (Figure 3) consisted of a single 220 kV three-phase power line between the substations Podlog (Slovenia) and Obersielach (Austria). The power line model was divided into two sections, with the fault model in between, allowing the user to change the fault location with the parameter dL. Additionally, it was possible to select any combination of faulted phases with or without ground connection, and, consequently, simulate the single- phase, two-phase, or three-phase faults. The model also consisted of circuit breakers operated by the protection relays in case of a fault, while the VTs and CTs were considered only by the constant ratio. The substations were modeled using corresponding equivalent impedances and power sources. The RLC load was also added, to set the power flow for normal operation. Figure 3: Electric power system model The parameters of the symmetrical components of the modeled power line are collected in Table 1, where L is the length of the line, R p, X p, and C p are the resistance, reactance, and capacitance of the positive sequence, respectively, while R 0, X 0, and C 0 are the resistance, reactance, and capacitance of the zero sequence. Additionally, I max is the maximum steady-state current. Table 1: Podlog – Obersielach power line parameters L [km] R p [ Ω] X p [ Ω] C p [ μF] R 0 [Ω] X 0 [ Ω] C 0 [ μF] I max [A] 65.492 3.980 27.029 0.582 14.017 66.296 0.372 920 3.2 Distance protection relays Two numerical distance protection relays, Siemens Siprotec 7SD5, were used to test the PMD system. First, the VPN connection was tested when the PMD system collected the settings from the 7SD5 relays. The most important settings of distance protection are collected in Table 2, where R LL and X LL are the primary resistance and reactance settings for the line-line faults, while R LE and X LE are the primary resistance and reactance settings for the line-earth faults. Protection zones 1-3 are directed towards the line, while the 4 th zone is undirectioned. 3.2 Distance protection relays Two numerical distance protection relays, Siemens Siprotec 7SD5, were used to test the PMD system. First, the VPN connection was tested when the PMD system collected the settings from the 7SD5 relays. The most important settings of distance protection are collected in Table 2, where R LL and X LL are the primary resistance and reactance settings for the line-line faults, while 54 JET Hardware in the loop testing of a protection monitoring and diagnostic system Hardware in the loop testing of a protection monitoring and diagnostic system 7 ---------- Table 2: Distance protection zone settings Substation Zone R LL [ Ω] R LE [ Ω] X LL & X LE [ Ω] Delay [s] Podlog (Side A) 1 22.97 45.95 22.97 0 2 32.4 64.87 32.4 0.75 3 76.7 85 76.7 2 4 85 85 85 4.8 Obersielach (Side B) 1 22.97 45.95 22.97 0 2 35.14 70.28 35.14 0.4 3 92.46 96 92.46 1.35 4 96 96 96 3 The 1 st zone of distance protection is usually not delayed, and does not protect the entire power line, but only 85 % of the power line, while the 2 nd zone protects the rest of the power line, but with a delay of 0.75 s for the Podlog location, or 0.4 s for the Obersielach location. Consequently, an unwanted delay in the relay protection operation occurs for the relay that detects the fault in the 2 nd zone. Therefore, the protection relays are connected according to the Permissive Under-reaching Transfer Tripp (PUTT) communication scheme, which reduces the distance protection operation delays for these faults, i.e., when one of the protection relays detects a fault in the 1 st zone, while the other relay detects a fault in the 2 nd zone. 4 RESULTS Ten tests were performed to test the discussed PMD system. The first eight tests were short circuit tests, where the parameters of the short circuit are presented in Table 3. The last two tests were diagnostic tests, where the VT fault was simulated by unplugging one of the voltage channels, and the protection relay restart was performed by unplugging the power supply. Both events were recorded by the PMD system, which notified the user. Table 3: PMD system tests No. Fault type dL [%] φ UA [°] R F [ Ω] T F [s] 1. ABC 50 90 0.1 0.2 2. AG 50 75 10 0.2 3. ABG 50 75 5/10 0.2 4. BC 50 90 5 0.2 5. BG 90 75 30 1.5 6. CG 10 90 40 0.2 7. BC busbar P 90 10 0.6 8. AB busbar O 90 15 0.95 All the short circuit tests were performed at 75 % of the nominal power line loading before the short circuit occurred. The letters A, B, C, and G in Table 3 describe the fault type, where A, B, R LE and X LE are the primary resistance and reactance settings for the line-earth faults. Protection zones 1-3 are directed towards the line, while the 4 th zone is undirectioned. The 1 st zone of distance protection is usually not delayed, and does not protect the entire power line, but only 85 % of the power line, while the 2 nd zone protects the rest of the power line, but with a delay of 0.75 s for the Podlog location, or 0.4 s for the Obersielach location. Consequently, an unwanted delay in the relay protection operation occurs for the relay that detects the fault in the 2 nd zone. Therefore, the protection relays are connected according to the Permissive Under- reaching Transfer Tripp (PUTT) communication scheme, which reduces the distance protection operation delays for these faults, i.e., when one of the protection relays detects a fault in the 1 st zone, while the other relay detects a fault in the 2 nd zone. 4 RESULTS Ten tests were performed to test the discussed PMD system. The first eight tests were short circuit tests, where the parameters of the short circuit are presented in Table 3. The last two tests were diagnostic tests, where the VT fault was simulated by unplugging one of the voltage channels, and the protection relay restart was performed by unplugging the power supply. Both events were recorded by the PMD system, which notified the user. JET 55 Table 3: PMD system tests All the short circuit tests were performed at 75 % of the nominal power line loading before the short circuit occurred. The letters A, B, C, and G in Table 3 describe the fault type, where A, B, and C denote the phases of the three-phase system, and G denotes the ground connection. The dL parameter denotes the relative location of the fault on the power line, measured from the Podlog side. Note that the faults in test no. 7 and 8 were simulated on each busbar, not on the power line. The φ UA parameter denotes the moment of short circuit occurrence in relation to the angle of voltage U A . The R F is the fault resistance, and T F is the fault duration. In test no. 3, the two values of fault resistance are given, where the first fault resistance was between phases, and the second was the ground resistance. Table 4 shows the absolute fault locations for both sides of the power line, denoted as dL P for Podlog and dL O for Obersielach. Comparison was made between the fault locations set in the simulation, reported by the relays, and calculated by the PMD system. The relays introduced significant errors in cases with high fault resistance, known as overreaching or underreaching. The error introduced by the PMD system was minimal, since the measurements from both sides of the power line were considered in the fault location calculation. In tests nos. 7 and 8, the PMD system correctly did not report the fault location, since the faults were on the busbar (behind the relay) and not on the power line. The last column shows the total fault clearing time T FC , determined by the PMD system. Faults in tests nos. 5 and 6, which were in the second protection zone, were cleared in times shorter than the second zone delay, showing the advantage of the PUTT communication scheme. Additionally, the tests nos. 5 and 6 were performed with a relatively high value of fault resistance, R F of 30 Ω and 40 Ω, respectively. Consequently, the protection relays determined the fault locations with a higher error than the PMD system. However, the fault location was determined less accurately by the protection relays, even at the fault resistance of 5 Ω in test no. 4. A detailed description of the results for test no. 1 is given in the next section, as well as the description of the time synchronization test. JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat Hardware in the loop testing of a protection monitoring and diagnostic system 7 ---------- Table 2: Distance protection zone settings Substation Zone R LL [ Ω] R LE [ Ω] X LL & X LE [ Ω] Delay [s] Podlog (Side A) 1 22.97 45.95 22.97 0 2 32.4 64.87 32.4 0.75 3 76.7 85 76.7 2 4 85 85 85 4.8 Obersielach (Side B) 1 22.97 45.95 22.97 0 2 35.14 70.28 35.14 0.4 3 92.46 96 92.46 1.35 4 96 96 96 3 The 1 st zone of distance protection is usually not delayed, and does not protect the entire power line, but only 85 % of the power line, while the 2 nd zone protects the rest of the power line, but with a delay of 0.75 s for the Podlog location, or 0.4 s for the Obersielach location. Consequently, an unwanted delay in the relay protection operation occurs for the relay that detects the fault in the 2 nd zone. Therefore, the protection relays are connected according to the Permissive Under-reaching Transfer Tripp (PUTT) communication scheme, which reduces the distance protection operation delays for these faults, i.e., when one of the protection relays detects a fault in the 1 st zone, while the other relay detects a fault in the 2 nd zone. 4 RESULTS Ten tests were performed to test the discussed PMD system. The first eight tests were short circuit tests, where the parameters of the short circuit are presented in Table 3. The last two tests were diagnostic tests, where the VT fault was simulated by unplugging one of the voltage channels, and the protection relay restart was performed by unplugging the power supply. Both events were recorded by the PMD system, which notified the user. Table 3: PMD system tests No. Fault type dL [%] φ UA [°] R F [ Ω] T F [s] 1. ABC 50 90 0.1 0.2 2. AG 50 75 10 0.2 3. ABG 50 75 5/10 0.2 4. BC 50 90 5 0.2 5. BG 90 75 30 1.5 6. CG 10 90 40 0.2 7. BC busbar P 90 10 0.6 8. AB busbar O 90 15 0.95 All the short circuit tests were performed at 75 % of the nominal power line loading before the short circuit occurred. The letters A, B, C, and G in Table 3 describe the fault type, where A, B, 56 JET Hardware in the loop testing of a protection monitoring and diagnostic system Table 4: PMD system test results 8 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat JET Vol. 17 (2024) Issue 2 ---------- and C denote the phases of the three-phase system, and G denotes the ground connection. The dL parameter denotes the relative location of the fault on the power line, measured from the Podlog side. Note that the faults in test no. 7 and 8 were simulated on each busbar, not on the power line. The φ UA parameter denotes the moment of short circuit occurrence in relation to the angle of voltage U A. The R F is the fault resistance, and T F is the fault duration. In test no. 3, the two values of fault resistance are given, where the first fault resistance was between phases, and the second was the ground resistance. Table 4 shows the absolute fault locations for both sides of the power line, denoted as dL P for Podlog and dL O for Obersielach. Comparison was made between the fault locations set in the simulation, reported by the relays, and calculated by the PMD system. The relays introduced significant errors in cases with high fault resistance, known as overreaching or underreaching. The error introduced by the PMD system was minimal, since the measurements from both sides of the power line were considered in the fault location calculation. In tests nos. 7 and 8, the PMD system correctly did not report the fault location, since the faults were on the busbar (behind the relay) and not on the power line. The last column shows the total fault clearing time T FC, determined by the PMD system. Faults in tests nos. 5 and 6, which were in the second protection zone, were cleared in times shorter than the second zone delay, showing the advantage of the PUTT communication scheme. Additionally, the tests nos. 5 and 6 were performed with a relatively high value of fault resistance, R F of 30 Ω and 40 Ω, respectively. Consequently, the protection relays determined the fault locations with a higher error than the PMD system. However, the fault location was determined less accurately by the protection relays, even at the fault resistance of 5 Ω in test no. 4. A detailed description of the results for test no. 1 is given in the next section, as well as the description of the time synchronization test. Table 4: PMD system test results No. dL P [km] dL O [km] T FC [ms] Set Relay PMD Set Relay PMD 1. 32.746 32.8 32.811 32.746 32.7 32.681 63 2. 32.746 35.8 32.811 32.746 31.8 32.681 72 3. 32.746 37.9 33.008 32.746 34.4 32.484 72 4. 32.746 34.6 32.615 32.746 31.9 32.877 55 5. 58.9428 59.5 58.943 6.5492 8.3 6.549 136 6. 6.5492 11 6.549 58.9428 52.4 58.943 82 7. Busbar P 3.3 - Busbar P 62.2 - 465 8. Busbar O 205.8 - Busbar O -136.2 - 1131 4.1. Test no. 1 The first test was the three-phase fault without ground connection (ABC). The fault duration was set as 0.2 s, and the fault location was in the middle of the modeled power line, while the fault resistance was 0.1 Ω. The fault was triggered at the phase angle of 90 ° of the phase 4.1. Test no. 1 The first test was the three-phase fault without ground connection (ABC). The fault duration was set as 0.2 s, and the fault location was in the middle of the modeled power line, while the fault resistance was 0.1 Ω. The fault was triggered at the phase angle of 90 ° of the phase voltage U a . Figure 4.a) shows the simulated three-phase primary voltages and currents of the power line in substation Podlog obtained from the RTDS, while Figure 4.c) consists of the three-phase voltages and currents obtained from the secondary sides of the VTs and CTs in substation Podlog. Figure 4.b) and Figure 4.d) consist of the voltages and currents obtained from the Obersielach substation. The 7SD5 protection relays were supplied with the secondary voltages and currents presented in Figure 4.c) and Figure 4.d), respectively. The PMD system collected the disturbance records from both protection relays within 2 minutes after the fault test was performed, and created the event report presented in Figure 5. The event report includes event info, log, chronology, fault analysis, disturbance records, reports, and simulation. JET 57 JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat Figure 4: Primary and secondary voltages and currents from RTDS The event info in Figure 5 presents very basic information, such as fault type, distance to fault, and fault clearing time of the event. The PMD system identified the fault type and distances from each end of the line to the fault successfully. The calculated fault distance from Podlog was 32.811 km, while the fault distance from Obersielach was 32.681 km. Since the actual middle of the line is 32.746 km, the identified fault locations are accurate to ±0.2 %. The PMD system also identified the transient fault resistances and the fault clearing time T FC, which, in this test, was 63 ms. The duration of the PMD system’s fault observation was 282 ms. The fault log provides the most basic information about the related events. The chronology provides a graphical representation of the appearance of the disturbance and related reactions of the protection relays with their distance protection functions and the reactions of the circuit breakers. The PMD system compares the actual protection relay actions to the event tree analysis and simulation in the fault analysis. Additionally, the protection specialist can provide the final decision on the correctness of operation of the analyzed protection function. 58 JET Hardware in the loop testing of a protection monitoring and diagnostic system Figure 5: Event report for a three-phase fault in test no. 1 The disturbance records collected from both protection relays were synchronized automatically to a common time scale. The time synchronization is presented in the next test. The PMD system also created the fault express report, relay analysis report, and report on comparing the measurements. 4.2 Time synchronization test The time synchronization was tested separately, where the clocks of both protection relays were not synchronized. Consequently, a large phase shift between the line currents and voltages measured by both relays can be seen in Figure 6. The phase angle difference of U b in the voltage vectors of both three-phase systems before the time synchronization was found to be 105 °. The PMD system synchronized the measured voltages and currents automatically to a common time scale with very high accuracy. The observed U b voltage phasors were synchronized with an accuracy of less than 0.1 ° (Figure 6). 5 SUMMARY The PMD systems are becoming a significant part of modern EPSs because of their ever-increasing size and complexity. Implementing PMD systems can improve the reliability of EPS operations by detecting unwanted changes in the protection relay settings. The discussed PMD system was tested successfully using the hardware in the loop configuration, where the PMD system monitored two numerical distance protection relays connected to the RTDS, which simulated different fault types. JET 59 JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat Figure 6: PMD system time synchronization With the hardware in the loop tests, it was confirmed that the PMD system, developed by the Kontron company, is capable of: 1. monitoring the two protection relays and their auxiliary equipment continuously, and detecting different short circuits along with additional events of the restarting relay and voltage transformer fault; 2. verifying the actual protection relay settings periodically, and comparing them with the reference one; 3. detecting and identifying different short circuit types and locating faults on the power line accurately; 4. performing the express analysis of faults based on real-time signals and other data acquired from the protection relays; 5. generating the disturbance report automatically within 2 to 5 minutes after the disturbance occurred; 6. notifying the responsible personnel about the event, whether it was a disturbance or relay malfunction. 60 JET Moreover, the discussed PMD system can also be integrated with comprehensive EPS simulation tools, which can be used to deepen the analysis of the protection operations further, including a protection starting evaluation and the correctness of protection settings, but this integration was not tested. Automatic report generation might take more than several minutes in larger EPS and large-scale fault events. However, the same work can take hours, or even days, when done manually. Therefore, using such a PMD system can reduce the workload of protection specialists significantly. Acknowledgment The authors acknowledge the use of the research equipment RTDS, procured within the project "Upgrading national research infrastructures - RIUM", which was co-financed by the Republic of Slovenia, the Ministry of Higher Education, Science and Innovation and the European Union from the European Regional Development Fund. References [1] V. Salehi, A. Mohamed, A. Mazloomzadeh and O. A. Mohammed, Laboratory-Based Smart Power System, Part II: Control, Monitoring, and Protection, in IEEE Transactions on Smart Grid, vol. 3, no. 3, pp. 1405-1417, Sept. 2012, doi: 10.1109/TSG.2012.2194519 [2] S. Peyghami, P . Palensky and F. Blaabjerg, An Overview on the Reliability of Modern Power Electronic Based Power Systems, in IEEE Open Journal of Power Electronics, vol. 1, pp. 34- 50, 2020, doi: 10.1109/OJPEL.2020.2973926 [3] North American Reliability Corporation (NERC): State of Reliability, An assessment of 2020 Bulk Power System performance, 2021, Available: https://www.nerc.com/pa/RAPA/ PA/Performance%20Analysis%20DL/NERC_SOR_2021.pdf [4] A. G. Phadke, J. S. Thorp, Expose hidden failures to prevent cascading outages [in power systems], in IEEE Computer Applications in Power, vol. 9, no. 3, pp. 20-23, July 1996, doi: 10.1109/67.526849 [5] D. C. Elizondo, J. de La Ree, A. G. Phadke and S. Horowitz, Hidden failures in protection systems and their impact on wide-area disturbances, 2001 IEEE Power Engineering Society Winter Meeting. Conference Proceedings (Cat. No.01CH37194), Columbus, OH, USA, 2001, pp. 710-714 vol.2, doi: 10.1109/PESW.2001.916941 [6] L. Zhao, X. Li, M. Ni, T. Li and Y. Cheng, Review and prospect of hidden failure: protection system and security and stability control system, in Journal of Modern Power Systems and Clean Energy, vol. 7, no. 6, pp. 1735-1743, November 2019, doi: 10.1007/s40565-015- 0128-9 [7] A. K. Barnes, A. Mate and J. E. Tabarez, The Risk of Hidden Failures to the United States Electrical Grid and Potential for Mitigation, 2021 North American Power Symposium (NAPS), College Station, TX, USA, 2021, pp. 1-6, doi: 10.1109/NAPS52732.2021.9654709 Hardware in the loop testing of a protection monitoring and diagnostic system JET 61 [8] A. G. Phadke, P. Wall, L. Ding and V. Terzija, Improving the performance of power system protection using wide area monitoring systems, in Journal of Modern Power Systems and Clean Energy, vol. 4, no. 3, pp. 319-331, July 2016, doi: 10.1007/s40565-016-0211-x [9] V. Terzija, G. ValverdFe, D. Cai, P. Regulski, V. Madani, J. Fitch, S. Skok, M. Begovic, A. Phadke: Wide-Area Monitoring, Protection and Control of Future Electric Power Networks, IEEE, Vol. 99, No. 1, p.p. 80-93, 2011 [10] J. Wen, W. -H. E. Liu, P. L. Arons and S. K. Pandey, Evolution Pathway Towards Wide Area Monitoring and Protection—A Real-World Implementation of Centralized RAS System, in IEEE Transactions on Smart Grid, vol. 5, no. 3, pp. 1506-1513, May 2014, doi: 10.1109/ TSG.2013.2278660 [11] D. Baltensperger, S. Sanchez, S. D'Arco and K. Uhlen, Assessing Hardware in the Loop Approaches for Wide-Area Monitoring Control and Protection Devices, in IEEE Transactions on Power Delivery, vol. 38, no. 4, pp. 2724-2734, Aug. 2023, doi: 10.1109/ TPWRD.2023.3255414 [12] P. Gadde, S. Brahma, T. Patel, Real-Time Hardware-in-The-Loop Implementation of Protection and Self-Healing of Microgrids, in IEEE Transactions on Industry Applications, vol. 59, no. 1, pp. 403-411, Jan.-Feb. 2023, doi: 10.1109/TIA.2022.3215624 [13] J. Westman, R. Hadidi, C. Fox, J. Leonard and A. Harrell, Controller Hardware-in-the- Loop Testing of an IEC 61850 GOOSE Based Control for Seamless Transition of a Microgrid Between Island and Grid-Connected Modes, in IEEE Transactions on Industry Applications, vol. 57, no. 1, pp. 61-69, Jan.-Feb. 2021, doi: 10.1109/TIA.2020.3029021 [14] A. A. Memon and K. Kauhaniemi, Real-Time Hardware-in-the-Loop Testing of IEC 61850 GOOSE-Based Logically Selective Adaptive Protection of AC Microgrid, in IEEE Access, vol. 9, pp. 154612-154639, 2021, doi: 10.1109/ACCESS.2021.3128370 [15] J. R. Camarillo-Peñaranda, M. Aredes and G. Ramos, Hardware-in-The-Loop Testing of a Distance Protection Relay, in IEEE Transactions on Industry Applications, vol. 57, no. 3, pp. 2326-2331, May-June 2021, doi: 10.1109/TIA.2021.3066328 [16] J. Y. R. Wong, C. Tan, A. H. A. Bakar and H. S. Che, Selectivity Problem in Adaptive Overcurrent Protection for Microgrid With Inverter-Based Distributed Generators (IBDG): Theoretical Investigation and HIL Verification, in IEEE Transactions on Power Delivery, vol. 37, no. 4, pp. 3313-3324, Aug. 2022, doi: 10.1109/TPWRD.2021.3126897 [17] M. Vygoder, M. Milton, J. D. Gudex, R. M. Cuzner and A. Benigni, A Hardware-in-the- Loop Platform for DC Protection, in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 9, no. 3, pp. 2605-2619, June 2021, doi: 10.1109/JESTPE.2020.3017769 [18] D. Liu, Q. Hong, A. Dysko, D. Tzelepis, C. Booth, I. Cowan, B. Ponnalagan, Hardware- in-the-loop tests and analysis of hvdc system's impact on distance protection performance, The 17th International Conference on AC and DC Power Transmission (ACDC 2021), Online Conference, 2021, pp. 96-101, doi: 10.1049/icp.2021.2451 JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat 62 JET [19] K. Shahid, K. Nainar, R. L. Olsen, F. Iov, M. Lyhne, G. Morgante: On the Use of Common Information Model for Smart Grid Applications — A Conceptual Approach, in IEEE Transactions on Smart Grid, vol. 12, no. 6, pp. 5060-5072, Nov. 2021, doi: 10.1109/ TSG.2021.3095896 [20] Y . Wang, P . Sai, Design and Optimization of an Intelligent Monitoring System for Overhead Lines Based on Common Information Model, in IEEE Access, vol. 12, pp. 31386-31398, 2024, doi: 10.1109/ACCESS.2024.3368702 [21] K. Buthelezi, M. Kabeya, M. Leoaneka, A Review of Fault Location Algorithms Utilising Travelling Wave, Wavelet Transform and Multi-Resolution Analysis Techniques, 2022 30th Southern African Universities Power Engineering Conference (SAUPEC), Durban, South Africa, 2022, pp. 1-6, doi: 10.1109/SAUPEC55179.2022.9730632 14 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat JET Vol. 17 (2024) Issue 2 ---------- 30th Southern African Universities Power Engineering Conference (SAUPEC), Durban, South Africa, 2022, pp. 1-6, doi: 10.1109/SAUPEC55179.2022.9730632 Nomenclature (Symbols) (Symbol meaning) CT Current Transformer EPS Electric Power System C-HIL Controller Hardware-in-the-Loop PAC Protection, Automation and Control PMD Protection Monitoring and Diagnostic RTDS Real Time Digital Simulator VT Voltage transformer C 0 Capacitance of the zero sequence C p Capacitance of the positive (and negative) sequence L Total length of the power line dL Relative distance from Podlog (side A) to fault location dL P Absolute distance from Podlog to fault location dL O Absolute distance from Obersielach to fault location R 0 Resistance of zero sequence of the symmetrical components R F Fault resistance R LE Resistance value of the distance protection zones for line-earth faults R LL Resistance value of the distance protection zones for line-line faults R p Resistance of the positive (and negative) sequence of symmetrical components X 0 Reactance of the zero sequence X p Reactance of the positive (and negative) sequence X LL Reactance of the distance protection zones for line-line and line-earth faults T F Fault duration time T FC Total Fault Clearing time U b Voltage of phase "b" in a three-phase system Hardware in the loop testing of a protection monitoring and diagnostic system JET 63 14 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat JET Vol. 17 (2024) Issue 2 ---------- 30th Southern African Universities Power Engineering Conference (SAUPEC), Durban, South Africa, 2022, pp. 1-6, doi: 10.1109/SAUPEC55179.2022.9730632 Nomenclature (Symbols) (Symbol meaning) CT Current Transformer EPS Electric Power System C-HIL Controller Hardware-in-the-Loop PAC Protection, Automation and Control PMD Protection Monitoring and Diagnostic RTDS Real Time Digital Simulator VT Voltage transformer C 0 Capacitance of the zero sequence C p Capacitance of the positive (and negative) sequence L Total length of the power line dL Relative distance from Podlog (side A) to fault location dL P Absolute distance from Podlog to fault location dL O Absolute distance from Obersielach to fault location R 0 Resistance of zero sequence of the symmetrical components R F Fault resistance R LE Resistance value of the distance protection zones for line-earth faults R LL Resistance value of the distance protection zones for line-line faults R p Resistance of the positive (and negative) sequence of symmetrical components X 0 Reactance of the zero sequence X p Reactance of the positive (and negative) sequence X LL Reactance of the distance protection zones for line-line and line-earth faults T F Fault duration time T FC Total Fault Clearing time U b Voltage of phase "b" in a three-phase system JET Volume 17 (2024) p.p. Issue 2, 2024 Jernej Černelič, Boštjan Polajžer, Janez Zakonjšek, Alexey Nebera, Gorazd Hrovat