UDK 621.3:(53+54+621+66)(05)(497.1)=00	ISSN 0352-9045
Strokovno društvo za mikroelektroniko elektronske sestavne dele in materiale
MIDEM
2011
Strokovna revija za mikroelektroniko, elektronske sestavne dele in materiale Journal of Microelectronics, Electronic Components and Materials
INFORMACIJE MIDEM, LETNIK 41, ST. 1(137), LJUBLJANA, marec 2011
UDK 621.3:(53+54+621+66)(05)(497.1)=00
ISSN 0352-9045
INFORMACIJE
MIDEM
1 o 2011
INFORMACIJE MIDEM	LETNIK 41, ŠT. 1(137), LJUBLJANA,	MAREC 2011
INFORMACIJE MIDEM	VOLUME 41, NO. 1(137), LJUBLJANA,	MARCH 2011
Revija izhaja trimesečno (marec, junij, september, december). Izdaja strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale - MIDEM.
Published quarterly (march, june, september, december) by Society for Microelectronics, Electronic Components and Materials - MIDEM.
Glavni in odgovorni urednik Editor in Chief
Dr. Iztok Šorli, univ. dipl.inž.fiz., MIKROIKS, d.o.o., Ljubljana
Tehnični urednik Executive Editor
Urednik elektronske izdaje Editor of Electronic Edition
Dr. Iztok Šorli, univ. dipl.inž.fiz., MIKROIKS, d.o.o., Ljubljana
Dr. Kristijan Brecl, univ.dipl.inž.el., Fakulteta za elektrotehniko, Ljubljana
Uredniški odbor Editorial Board
Časopisni svet International Advisory Board
Dr. Barbara Malič, univ. dipl.inž. kem., Institut "Jožef Stefan", Ljubljana
Prof. dr. Slavko Amon, univ. dipl.inž. el., Fakulteta za elektrotehniko, Ljubljana
Prof. dr. Marko Topič, univ. dipl.inž. el., Fakulteta za elektrotehniko, Ljubljana
Prof. dr. Rudi Babič, univ. dipl.inž. el., Fakulteta za elektrotehniko, računalništvo in informatiko Maribor
Dr. Marko Hrovat, univ. dipl.inž. kem., Institut "Jožef Stefan", Ljubljana
Dr. Wolfgang Pribyl, Austria Mikro Systeme Intl. AG, Unterpremstaetten
Prof. dr. Janez Trontelj, univ. dipl.inž. el., Fakulteta za elektrotehniko, Ljubljana,
PREDSEDNIK - PRESIDENT
Prof. dr. Cor Claeys, IMEC, Leuven
Dr. Jean-Marie Haussonne, EIC-LUSAC, Octeville
Darko Belavič, univ. dipl.inž. el., Institut "Jožef Stefan", Ljubljana
Prof. dr. Zvonko Fazarinc, univ. dipl.inž., CIS, Stanford University, Stanford
Prof. dr. Giorgio Pignatel, University of Padova
Prof. dr. Stane Pejovnik, univ. dipl.inž., Fakulteta za kemijo in kemijsko tehnologijo, Ljubljana
Dr. Giovanni Soncini, University of Trento, Trento
+ Prof. dr. Anton Zalar, univ. dipl.inž.met., Institut Jožef Stefan, Ljubljana
Dr. Peter Weissglas, Swedish Institute of Microelectronics, Stockholm
Prof. dr. Leszek J. Golonka, Technical University Wroclaw
Naslov uredništva	Uredništvo Informacije MIDEM
Headquarters	MIDEM pri MIKROIKS
Stegne 11, 1521 Ljubljana, Slovenija tel.: + 386 (0)1 51 33 768 faks: + 386 (0)1 51 33 771 e-pošta: Iztok.Sorli@guest.arnes.si http://www.midem-drustvo.si/
Letna naročnina je 100 EUR, cena posamezne številke pa 25 EUR. Člani in sponzorji MIDEM prejemajo Informacije MIDEM brezplačno. Annual subscription rate is EUR 100, separate issue is EUR 25. MIDEM members and Society sponsors receive Informacije MIDEM for free.
Znanstveni svet za tehnične vede je podal pozitivno mnenje o reviji kot znanstveno-strokovni reviji za mikroelektroniko, elektronske sestavne dele in materiale. Izdajo revije sofinancirajo JAKRS in sponzorji društva.
Scientific Council for Technical Sciences of Slovene Research Agency has recognized Informacije MIDEM as scientific Journal for microelectronics, electronic components and materials.
Publishing of the Journal is financed by Slovenian Book Agency and by Society sponsors.
Znanstveno-strokovne prispevke objavljene v Informacijah MIDEM zajemamo v podatkovne baze COBISS in INSPEC. Prispevke iz revije zajema ISI® v naslednje svoje produkte: Sci Search®, Research Alert® in Materials Science Citation Index™ Scientific and professional papers published in Informacije MIDEM are assessed into COBISS and INSPEC databases. The Journal is indexed by ISI® for Sci Search®, Research Alert® and Material Science Citation Index™ Po mnenju Ministrstva za informiranje št.23/300-92 šteje glasilo Informacije MIDEM med proizvode informativnega značaja.
Grafična priprava in tisk	BIRO M, Ljubljana Printed by
Naklada	1000 izvodov
Circulation	1000 issues
Poštnina plačana pri pošti 1102 Ljubljana Slovenia Taxe Percue
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
ZNANSTVENO STROKOVNI PRISPEVKI	PROFESSIONAL SCIENTIFIC PAPERS
K. Gorecki, J. Zar^bski: Vpliv modela MOSFET tranzistorja na karakteristike ojačitvenega pretvornika	1	K. Gorecki, J. Zar^bski: Influence of MOSFET Model Form on Characteristics of the Boost Converter
J. Trontelj jr.: Hitro prilagodljiv in cenovno ugoden testni system za analizo ustreznosti vezij ASIC s priporočili za generiranje STDF datotek na več projektnih silicijevih rezinah	8	J. Trontelj jr.: Flexible Low Cost ASIC Design Verification Tool with Guidelines for Generation of STDF for Multi Project Wafer Sort
M. Starešinič, T. Muck, M. Stanič, M. Klanjšek Gunde: Razvoj metod slikovne analize za oceno tiskovne prehodnosti tiskane elektronike	12	M. Staresinic, T. Muck, M. Stanic, M. Klanjsek Gunde: Development of Image Analysis Procedures for Evaluation of Printed Electronics Quality
A. Vesel, M. Mozetic, M. Balat-Pichelin: Absorpcija mikrovalovne moči v dušikovi plazmi pri nizkih tlakih	18	A. Vesel, M. Mozetic, M. Balat-Pichelin: Absorption of Microwave Power in Nitrogen Plasma at Moderately Low Pressure
S. A. Tekin, H. Ercan, M. Algi: Novo temperaturno kompenzirano vezje CCCII	22	S. A. Tekin, H. Ercan, M. Algi: A New Temperature Compensated Current Controlled Conveyor
M. Fras, J. Mohorko, Ž. Čučej: Simulacija taktičnih omrežij z realnim sistemom v simulacijski zanki	27	M. Fras, J. Mohorko, Z. Cucej: Simulation of Tactical Networks Using System-of-the- loop
R. Azim, M. Tariqul Islam, N. Misran and A. T. Mobashsher: Kompaktna UWB planarna antena za širokopasovne aplikacije	37	R. Azim, M. Tariqul Islam, N. Misran and A. T. Mobashsher: Compact UWB Planar Antenna for Broadband Applications
S. Klampfer, J. Mohorko, Ž. Čučej, A. Chowdhury: Simulacija vpliva različnih velikosti pomnilnika usmerjevalnikov na zakasnitev VoIP prometa znotraj usmerjanega omrežja	41	S. Klampfer, J. Mohorko, Z. Cucej, A. Chowdhury: Simulation of Different Router Buffer Sizes which Influences on VoIP Jitter Delay within the routed Network
M. R. I. Faruque, M .T. Islam, N. Misran: Vpliv feritnega dodatka na EM absorpcijo	46	M. R. I. Faruque, M .T. Islam, N. Misran: Influence of Material Attachment for EM absorption
D. Pavliha, A. Trost: Podatkovni multiplekser MPEG-2 TS v vezju FPGA	53	D. Pavliha, A. Trost: MPEG-2 TS Multiplexer in FPGA Technology
B. Radulovič, J. Stergar: Pilotni scenarij implementacije varovanih lokalizacijskih storitev v združenem WiFi omrežju	59	B. Radulovic, J. Stergar: A Pilot Scenario of Secure Location-Based Services Implementation in a Unified WiFi Network
M. Tokmakgi: Novo FLC CMOS vezje	65	M. Tokmakgi: A Novel CMOS Defuzzification Circuit Employing Current Differencing Buffered Amplifier based Current-mode Multipliers
J. Tratnik and M. Vidmar: 2,8 GHz - 5,7 GHz zelo hiter ultra širokopasoven tokovno krmiljen oscilator z diskretnimi SiGe RF tranzistorji	70	J. Tratnik and M. Vidmar: 2.8 GHz - 5.7 GHz very fast UWB CCO using Discrete-packaged SiGe RF Transistors
MIDEM prijavnica	73	MIDEM Registration Form
Slika na naslovnici: Kolaž fotografij vzetih iz prispevkov v tej številki		Front page: Collage of pictures taken from contributions published in this issue
VSEBINA		CONTENT
Obnovitev članstva v strokovnem društvu MIDEM in iz tega izhajajoče ugodnosti in obveznosti
Spoštovani,
V svojem več desetletij dolgem obstoju in delovanju smo si prizadevali narediti društvo privlačno in koristno vsem članom.Z delovanjem društva ste se srečali tudi vi in se odločili, da se v društvo včlanite. Življenske poti, zaposlitev in strokovno zanimanje pa se z leti spreminjajo, najrazličnejši dogodki, izzivi in odločitve so vas morda usmerili v povsem druga področja in vaš interes za delovanje ali članstvo v društvu se je z leti močno spremenil, morda izginil. Morda pa vas aktivnosti društva kljub temu še vedno zanimajo, če ne drugače, kot spomin na prijetne čase, ki smo jih skupaj preživeli. Spremenili so se tudi naslovi in način komuniciranja.
Ker je seznam članstva postal dolg, očitno pa je, da mnogi nekdanji člani nimajo več interesa za sodelovanje v društvu, se je Izvršilni odbor društva odločil, da stanje članstva uredi in vas zato prosi, da izpolnite in nam pošljete obrazec priložen na koncu revije.
Naj vas ponovno spomnimo na ugodnosti, ki izhajajo iz vašega članstva. Kot član strokovnega društva prejemate revijo »Informacije MIDEM«, povabljeni ste na strokovne konference, kjer lahko predstavite svoje raziskovalne in razvojne dosežke ali srečate stare znance in nove, povabljene predavatelje s področja, ki vas zanima. O svojih dosežkih in problemih lahko poročate v strokovni reviji, ki ima ugleden IMPACT faktor. S svojimi predlogi lahko usmerjate delovanje društva.
Vaša obveza je plačilo članarine 25 EUR na leto. Članarino lahko plačate na transakcijski račun društva pri A-banki: 051008010631192. Pri nakazilu ne pozabite navesti svojega imena!
Upamo, da vas delovanje društva še vedno zanima in da boste članstvo obnovili. Žal pa bomo morali dosedanje člane, ki članstva ne boste obnovili do konca leta 2011, brisati iz seznama članstva.
Prijavnice pošljite na naslov: MIDEM pri MIKROIKS Stegne 11 1521 Ljubljana
Ljubljana, marec 2011
Izvršilni odbor društva
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
INFLUENCE OF MOSFET MODEL FORM ON CHARACTERISTICS OF THE BOOST CONVERTER
Krzysztof Gorecki, Janusz Zar^bski Department of Marine Electronics, Gdynia Maritime University, Poland
Key words: MOS transistors, BOOST converters, modelling
Abstract: In the paper boost converter characteristics at the steady state obtained from SPICE analysis with the use of selected kinds of MOSFET models of various complexity and accuracy are compared. The dependencies of the converter output voltage, the watt-hour efficiency and the MOSFET inner temperature on the frequency and the duty cycle of the MOSFET control signal as well as the converter load resistance are considered. The correctness of the calculation results was verified experimentally. The duration time of the analyses corresponding to all the considered models of the MOS transistor are compared, too.
Vpliv modela MOSFET tranzistorja na karakteristike ojačitvenega pretvornika
Kjučne besede: V čLanku primerjamo statične karakteristike pretvornika pridobljene s SPICE simulacijo z uporabo izbranih MOSFET modelov različnih kompleksnosti in natančnosti. Opišemo odvisnost izhodnih napetosti, učinkovitost ter MOSFET temperaturo od frekvence kontrolnega signala in bremenske upornost. Pravilnost dobljenih rezultatov smo preverili tudi eksperimentalno. Primerjali smo tudi čase simulacije v odvisnosti od uporabljenih modelov.
Izvleček: MOS tranzistorji, pretvorniki, modeliranje
1. Introduction
Dc-dc converters are commonly used in power supply systems /1/. The boost converter is the most popular in the class of step-up converters of the output power up to 1 kW. The network representation of the boost converter with the MOS power transistor operating as the switch is shown in Fig.1.
Vin
-nrr>r\- L n	. in ..	. C
y JL— i (t) ^yS Vcontr		
		
Ro
V0I
Fig. 1. The diagram of a boost converter
The analysis and design of electronic circuits e.g. dc-dc converters requires the use a proper computer tool (algorithms). To this end SPICE is the appropriate tool /2, 3/. The accuracy and duration time of calculations depend among others on the form of models of semiconductor devices and elements existing in the considered circuit.
The characteristics describing dc-dc converters at the steady state have a fundamental significance for the engineer-designer of such a class of circuits. Two groups of methods of the analysis of dc-dc converters at the steady
state can be distinguished. The first method is based on the dc analysis with average models of the analysed circuit taken into account /4-8/, whereas in the other method based on the transient analysis, the large-signal dynamic models of devices operating in the circuit are used /2, 4, 7, 9/. As it was shown in /10/, the second method allows obtaining much better consistency between the calculation and measuring results, but the analysis duration time can be much longer than in the first method.
There are models of different accuracy, among of both kinds of models mentioned before. For example, in the paper /11/ the results of the analysis of the isolated dc-dc converter obtained by nonlinear inertial models of the Schottky diode and the MOS transistor are presented. In turn, the paper /12/ presents the results of a small-signal analysis of the buck-boost converter obtained with the use of devices models of the form of ideal switches. In the paper /13/ the results of the analysis of the dc-dc converter obtained by the SPICE built-in models of the diode and the MOS transistor were used as the reference results to verifie the correctness of the new method of calculations of converter characteristics. The description of the behavioral dc-dc converter models of different accuracy dedicated to the system level analysis can be found in /14/. The similar meaning is to be found in the models presented in the paper /15/, whose parameters values can be estimated with the use of the catalogue data of converter devices. The paper /16/ describes the method of estimation of the electrothermal characteristics of dc-dc converters with the
1
K. Gorecki, J. Zar^bski: Influence of Mosfet
Informacije MIDEM 41(2011)1, str. 1-7	Model Form on Characteristics of the Boost Converter
use of the method of the separated iteration with the use of nonlinear semiconductor devices models. The nonlinear models of semiconductor devices were also used in the analysis of a dc-dc converter in the small-signal /17/ and large-signal /18/ case, respectively. The average models of dc-dc converters with nonlinearities of semiconductor devices taken into account are described in /19, 20/.
The aim of this paper, being of the extended version of the paper /21/, is to estimate the influence of the form of the MOS transistor model on the boost converter characteristics at the steady state obtained by the transient analysis. The analyses were performed by SPICE with the use of SPICE built-in linear models of: the inductor L, the capacitor C, the resistors R0, RG, the voltage sources Vin, Vcontr and the model of the diode D1 described in /22/. Five various models of MOS transistor were tested. Namely: the model of the ideal switch, the Dang's model built-in in SPICE, the two-value resistor model, the electrothermal model of the two-value resistor /23/ and the electrothermal hybrid model of the considered device /24/. The results of the analysis of the form of the proper characteristics of the boost converter and the duration time of the analyses performed with the use of the above mentioned MOS transistor models are presented and compared. The calculations were performed in the wide range of variations of the duty cycle D and the frequency f of the control signal as well as the load resistance R0. Some results of the analyses were compared with the results of measurements.
2. MOSFET models used in analyses
The simplest model of the MOS transistor, among the considered models, is the ideal switch model, whose switch-on and switch-off resistances are equal to zero and infinity, respectively. The main drawback of this model is discontinuity of their characteristics, which can result in the problem of the lack of calculations convergence. Such a model cannot be directly implemented in SPICE. On the other hand, the SPICE built-in model of the voltage controlled switch (VSWITCH) with switch-on and switch-off resistances of the values, which tend to be zero and infinity respectively, can be used.
The second in turn considered model is the two-value resistor model, which possesses non-zero value resistance in the on-state (RON) and the finite value of the resistance in the off-state (Roff). In this model the values of the resistances RON and ROFF are independent of temperature.
These models are formulated in SPICE with the use of the model of the voltage controlled switch, the characteristics of which are described by the four parameters: the resistances Ron, Roff and the voltages VON, VOFF - representing the device gate-source voltage at the device on-state and off-state, respectively.
of the two-value resistor model, in which the influence of the ambient temperature and the selfheating phenomenon on the resistance RON are included. This model, the network representation of which is shown in Fig.2, is composed of two elements connected in series: the SPICE built-in model of the voltage controlled switch S1 (the two-values resistor) and the voltage controlled source ERON described by the formula
F = V a
RON ' 51 RON

(i)
where VS denotes the voltage on the two-values resistor, VS1 - the voltage on the switch S1, Ta - ambient temperature, Rth - the thermal resistance of the transistor, I - the current of the two-value resistor, aRON - the temperature coefficient of variations of the on resistance of the two-values resistor. The resistance of the switched-on switch S1 is equal to the resistance RONO corresponding to the on-resistance of the two-values resistor at the reference temperature T0.
E
RON
Si S
-o
Vs Vsi
oG
The third model of the MOS transistor is the electrothermal model of the switch /24/. This model is an improved version
Fig.2. The network representation of the two-values resistor model
Both the electrical inertia and nonlinearity of the device current-voltage characteristics are not included in the presented models.
The next is the Dang's isothermal model of the MOS transistor built-in in SPICE, described e.g. in /22/. This model takes into account the nonlinear d.c. characteristics and the inertia of the considered device, whereas the selfheating phenomenon is not taken into account in this model. There are 28 parameters describing the Dang's model /22/. These parameters are: model index (LEVEL), default channel length (L), default channel width (W), drain ohmic resistance (RD), source ohmic resistance (RS), gate ohmic resistance (RG), bulk/substrate ohmic resistance (RB), zero-bias bulk-drain junction capacitance (CBD), zero-bias bulk-source junction capacitance (CBS), bulk junction saturation current (IS), Bulk junction saturation current per sq-meter of junction area (JS), Bulk junction saturation current per length of sidewall area (JSSW), bulk junction emission coefficient (N), bulk junction potential (PB), bulk junction sidewall potential (PBSW), gate-source overlap capacitance per meter channel width (CGSO), gate-drain overlap capacitance per meter channel width (CGDO), gate-bulk overlap capacitance per meter channel length (CGBO), drain and source diffusion sheet resistance (RSH), Zero-bias bulk junction bottom capacitance per square meter of junction area (CJ), zero-bias bulk junction sidewall capacitance per length of sidewall (CJSW),
2
K. Gorecki, J. Zar^bski: Influence of Mosfet
Model Form on Characteristics of the Boost Converter
Informacije MIDEM 41(2011)1, str. 1-7
bulk junction bottom grading coefficient (MJ), zero-bias bulk junction sidewall capacitance per meter of junction perimeter (CJSW), bulk junction sidewall grading coefficient (MJSW), bulk junction transit time (TT), flicker noise coefficient (KF), flicker noise exponent (AF), coefficient for forward-bias depletion capacitance formula (FC), zero-bias threshold voltage (VTO), transconductance parametr (KP), bulk threshold parameter (GAMMA), surface potential (PHI), oxide thickness (TOX), substrate doping (NSUB), surface state density (NSS), fast surface state density (NFS), type of gate material (TPG), metallurgical junction depta (XJ), lateral diffusion (LD), lateral diffusion width (WD), surface mobility (UO), critical field for mobility degradation (UCRIT), critical field exponent in mobility degradation (UEXP), transverse field coefficient (UTRA), maximum drift velocity of carriers (VMAX), total channel charge coefficient (NEFF), thin-oxide capacitance model flag and a fraction of channel charge attributed to drain (XQC), width effect on threshold voltage (DELTA), mobility modulation (THETA), static feedback (ETA) and saturation field factor (KAPP).
The last one is the electrothermal hybrid model of the MOS transistor proposed by the authors in /24/, the network representation of which is shown in Fig.3. This model consists of the Dang's model (SBM) and two controlled voltage sources EG and ERD modelling the influence of selfheating on the device threshold voltage and its drain resistance, respectively. The voltages on these sources are expressed by
ERD - ÏD " RD " aRD^j ~To)
eg =a u f - to)
(2) (3)
I n the analytical description of these sources (Eqs (2-3)) the temperature coefficients of variations of both the threshold voltage and the drain series resistance aRD, appear. The internal temperature Tj of the transistor is given by
Tj=Ta + Rth-vDS-iD	(4)
where iD denotes the drain current and vDS is the drain-
source voltage.
G
o-
VDS
S
Fig.3. The circuit representation of the electrothermal hybrid model of the MOSFET transistor
The boost converter (Fig.1) with transistor IRF840, the diode BY229, the inductor of inductance 650 ||H, and the capacitor of capacitance 47 |F was investigated.
In the considered MOS transistors models the values of the parameters collected in Table 1 were used.
Table 1. The values of parameters of the considered MOS transistor IRF840 models
Dang's model (curve b)							
parameter	LEVEL	KAPPA	TOX	UO	PHI	RS	KP
value	3	0.2	100 mn	600 cm2VV	0.6 V	6.382 mfí	20.85 |iA/V2
parameter	W	L	VTO	RD	TT	RDS	CBD
value	0.68 m	2pm	3.879 V	0.6703 Q	710ns	2.222 Mß	1.415 uF
parameter	PB	MJ	IS	CGSO	CGDO	RG	
value	0.8 V	0.5	56 pA	1.625 nF/m	133.4 pF/m	0.6038 n	
Additional parameters of the electrothermal hybrid model (curve a)							
parameter	Ou	Ord					
value	-3 mV/K	IO-2K-'					
Two value-resistor model (curve d)							
parameter	RON	Roff	Von	Voff			
value	0.67 £2	1MÜ	14 V	IV			
ideal switch model (curve c)							
parameter	Ron	Roff	Von	Voff			
value	ljlfl	1MÜ	14 V	IV			
Electrothermal model of a two-valnes resistor (curve e)							
parameter	Rono	Roff	Von	Voff	aRON		
value	0.67 Q	IMG	14 V	IV	10"2K_1		
To estimate the correctness of the considered models, in Fig.4 the calculated and measured output characteristics iD(vDS) of the transistor IRF840 at vGS = 15 V are presented. In this figure (and in the further ones) the points denote the measuring results, whereas the lines - the results of the analysis. In Fig.4 the following notations are used: a - the electrothermal hybrid model of the considered transistor, b - the isothermal built -in in SPICE Dang's model, c - the ideal switch model, d - the isothermal model of the two-
IRF840	d
VGS=15V	
	
c	e
	□ o °° ° ^^^ a
	.......calculations
	□ □ □ measurements
0	12	3	4
VDS [V]
Fig. 4. Calculated and measured dc output
characteristics of the transistor IRF840
5
3
Informacije MIDEM 41(2011)1, str. 1-7
K. Gorecki, J. Zar^bski: Influence of Mosfet
Model Form on Characteristics of the Boost Converter
value resistor, e resistor.
electrothermal model of the two-value
As seen from Fig.4, the characteristic corresponding to the ideal switch (the characteristic c covers the vertical axis of ordinates) differ essentially from the remaining characteristics (curves a, b, d, e). In turn, the characteristics calculated with the device isothermal model (curve b) and with the model of two-value resistor (curve d) are practically identical and linear in the considered range of variations of the drain current. The characteristics corresponding to the models including selfheating (the curves a and e) are nonlinear and practically overlap. The characteristics a and e show that selfheating evidently results in an increase of the device resistance RON.
3. Results
Using the considered models of the MOS transistor (Section II) the transient analysis of the boost converter (Fig .1) up to the steady state for various values of the load resistance R0, the duty cycle D and the frequency f of the device control signal, was performed. The influence of these parameters (R0, D, f) on the output voltage and the watt-hour efficiency of the converter as well as the MOS transistor case temperature was investigated. During the measurements the MOS transistor and the diode were situated on the heat-sinks. The value of the thermal resistance of the MOS transistor measured with the use of the measuring method from /25/ and the measuring set described in /26/ is equal to 5.5 K/W. The mesurements of characteristics were carried out by typical multimeters at the thermal steady-state, whereas the device case temperature was measured by the pyrometer ST-3. In the analysis the SPICE built-in isothermal model of the p-n diode with the following parameter values (corresponding to the diode BY229): Is = 53.4 pA, N = 1.185, RS = 0.12 W, trsl = 3-10-3 K-1, Ikf = 3.5 mA, Cjo = 325 pF, M = 0.3333, Vj = 0,75 V, Fc = 0.5, Isr = 100 pA, Nr = 2, TT = 145 ns was used. In the analysis the inductor series resistance of the value equal to 0.1 W was taken into account.
The transient analyses of the considered circuit until the steady-state were performed with the use of all the models described in Chapter III. The calculated values of the converter output voltage Vout, the watt-hour efficiency h, and the case temperature TC are shown in Figs. 5 -7.
In Fig.5 the results of the calculated and measured dependences of the output voltage and the watt-hour efficiency of the considered converter and the MOS transistor case temperature on the duty cycle D of the gate control signal at the frequency f = 108.7 kHz and the load resistance R0 = 20 W are presented.
As seen from Fig.5, the results of analysis with the use of the electrothermal hybrid model of the MOS transistor (curve a) and the electrothermal model of the two-values resistor (curve e) fit well to the measuring results. Neglecting the
a) 40 35 30 c- 25
E.
s 20
10 5 0
BOOST		
Ro = 20n		
Vin= 6.2 V	C \ /	
f= 108.7 kHz	N/	
-------calculations	y	
■ ■ ■ measurements		
1 "	a „ /	
	e	
0,2
0,4
0,6
0,8
b)	100
	90
	70
	60
	50
	
	40
	30
	20
	10
	0
calculations ■ measurements
BOOST
Ro = 20n Vm = 6.2V f= 108.7 kHz
o
0,2
0,4
0,6
c)	140 n
	120 -
	100 -
U	80 -
	
H	
U H	60 -
	40 -
	20 1
	o -
BOOST		
Ro = 20n		
Vin = 6.2 V		r/
f= 108.7 kHz	a\	
~ calculations		
■ ■ ■ measurements	m ,y	r
1 -----—J—■— 1		
0	0,2	0,4	0,6	0,8	1
D
Fig. 5. The calculated and measured dependences of the output voltage (a), the watt-hour efficiency (b) of the converter and the transistor case temperature (c) on the duty-factor of the control signal
selfheating phenomenon in the MOS transistor (curves b and d) results in too high values of the converter output voltage and shifts of the maximum on the characteristic Vout(D) towards the higher values of the coefficient D. In turn, neglecting conducting losses in the transistor (curve c) results in a considerable increase of the converter output voltage. It is worth mentioning that the differences between the values of the voltage Vout obtained with the use of all the considered models are hardly visible at small values of the coefficient D (D < 0.4). Moreover, these differences increase with an increase of D.
As seen from Fig.5b the dependence h (D) is a decreasing function. The best agreement between the analysis and measuring results is assured by the MOS transistor models with a electrical inertia and selfheating taken into account
4
K. Gorecki, J. Zar^bski: Influence of Mosfet
Model Form on Characteristics of the Boost Converter
Informacije MIDEM 41(2011)1, str. 1-7
(curves a, b, d, e). Disregarding conducting losses in the MOS transistor results in a considerable increase of the watt-hour efficiency of the converter.
It results from Fig.5c that the case temperature Tct of the MOS transistor is an increasing function of the coefficient D and the values of Tct obtained with the use of the both electrothermal models (curves a and e) fit well to the measurements.
In Fig.6 the calculated and measured values of the converter output voltage (Fig.4a) and the watt-hour efficiency (Fig.4b) as well as the MOS transistor case temperature (Fig.4c) on the converter load resistance at D = 0.5 and f = 100 kHz are presented.
a) 14
calculations ♦ ♦ ♦ measurements		BOOST
	'/7	
	/Ve a	f= 100 kHz D = 0.5 Vm=6V
0,1
10 Ro[i2]
b) 120 100 80 £1 60 40 20 0
BOOST calculations		
♦ ♦♦ measurements		, ♦ *
C X	♦ -p*	
	\	f= 100 kHz
d	Va	D = 0.5 Vta = 6V
0,1
10 R«[£2]
100
1000
<0	120
	100
u	80
	
	60
H	
u	
H	
	40
	20
	0
BOOST
f= 100 kHz D = 0.5 Vin = 6 V
calculations ■ measurements
0,1
10 R«[i2]
100
1000
Fig. 6. The calculated and measured dependences of the converter output voltage (a) and the watt-hour efficiency (b), as well as the transistor case temperature (c) on the load resistance.
Fig. 6a shows that the converter output voltage is an increasing function of the resistance R0. In the range of small
values of the load resistance (R0 < 2 W) the considered converter operates incorrectly, that means that Vout < Vin.
It results from Fig.6b that a decrease of the resistance R0 leads to a decrease of the converter watt-hour efficiency. It is worth mentioning that the dependences h (R0) obtained with the use of the models taking into account the MOS transistor conducting losses (curves a, b, d, e) have local minimums and local maximums (peaks) at the load resistance values in the range from 0.5 W to 2 W Neglecting the conducting losses in the MOS transistor results in an increase of both the output voltage and the watt-hour efficiency of the converter even more than 50%.
Fig.6c shows that the measured values of the case temperatures of the MOS transistor fit well to the calculated values at R0 < 1.5 W only. The measured characteristic TCT(R0) is a monotonically decreasing function, whereas the same characteristic obtained from the calculations has the peak at R0 = 1.5 W.
In Fig.7 the influence of the frequency f of the signal controlling the MOS transistor on the converter output voltage (Fig.7a) and the watt-hour efficiency (Fig.7b) as well as the case temperature of the MOS transistor (Fig.5c) is presented. The calculations and measurements were performed at D = 0.75 and R0 = 20 W.
It results from Fig.7a that the voltage Vout is a decreasing function of the frequency f. This dependence is described correctly by the electrothermal hybrid model of the MOS transistor (curve a) only. The values of the voltage Vout obtained from the remaining models are inflated. For the signal frequency f > 1 MHz the investigated converter does not operate correctly due to too high values of the MOS transistor inner capacitances, which make the proper switching of the MOS transistor impossible. The values of the voltage Vout corresponding to this range of the signal frequency are equal to the difference of the converter input voltage and the voltage drop on the forward biased diode D. As seen, the model of the two-value resistor ensures the correct values of the voltage Vout if the signal frequency is less than 150 kHz only.
It results from Fig.7b that increasing of the signal frequency f causes increasing of the converter watt-hour efficiency up to a few percentage only in the range of the frequency f > 1 MHz. This phenomenon is observed from the calculation results obtained with the use of all the considered models, because in all the analyses the diode inertia is taken into account.
Fig.7c shows that the electrical power dissipated while switching the MOS transistor influences substantially the device case temperature Tct in the range of higher values of the frequency of the MOS transistor controlling signal. The values of the temperature Tct obtained with the use of both the considered electrothermal models differ from each other even more than 30%. The temperature Tct doubles when the signal frequency f increases from 100 kHz to 5 MHz.
5
Informacije MIDEM 41(2011)1, str. 1-7
K. Gorecki, J. Zar^bski: Influence of Mosfet
Model Form on Characteristics of the Boost Converter
a) 25 20
£ 15 a
>• 10
		C —__	BOOST Ro = 20n v D = 0.75 V¡„ 6 V
			
----- calculations			
♦ ♦ ♦ measurements			
f [kHz]
b) 90 80 70 60 50
cx
40 30 20 10 0
———__	BOOST
C	Ro = 20n
	D = 0.75
	Vin = 6 V
	
	
v.\ b	
calculations *. V x	
♦ ♦ ♦ measurements -, _	
10
100
1000
10000
f [kHz]
C) 120
80
u H
60
40
Ro = 20Q		BOOST
D = 0.75		
Vin = 6 V	y	
* Mf'		
~ calculations		
> + + measurements		
10 100 1000 10000 f [kHz]
Fig. 7. The calculated and measured dependences of the converter output voltage (a) and the watt-hour efficiency (b) as well as the transistor case temperature (c) on the frequency of the control signal
Apart from the model accuracy, the time of the converter analysis with the use of these models gives also very important information about the usefulness of the models. Table 2 compares the times (in seconds) of the analysis of the boost converter with the use of the considered MOS transistor models.
As seen from Table 2, in the range of small values of the frequency of the control signal, the isothermal model of the two-value resistor ensures the shortest time of the analysis - more than twice shorter than the analysis time with the use of the hybrid electrothermal model. In turn, in all the considered range of variations of the frequency f, the isothermal built-in model of the MOS transistor is the best from the point of view of the analysis rate. In this case the time indispensable for the analysis is twice lower than in the case, when the models of the ideal switch or two-values resistance are used. It is worth mentioning that the model of the worst accuracy (the model of the ideal switch) does not ensure the shortest time of the analysis. This results from the fact, that during switching of the non-inertia switch, very fast changing of the currents and voltages are observed. In a consequence, the time derivatives of currents and voltages of the high values appear, what results in shortening of the calculating step. Finally, the time of analysis have to be increased.
4. Conclusions
In the paper the influence of the model form of the MOS transistor on the characteristics of the boost converter is investigated. As results from the investigations performed by the authors, using the device electrothermal hybrid model ensures a good agreement between the calculated and measured characteristics of the considered dc-dc converter in the wide range of variations of the load resistance, the duty-factor and the frequency of the control signal of the MOS transistor.
If the control signal frequency is less than 150 kHz, then the electrothermal model of the two-value resistor ensures a good agreement between the calculation and measurement results and moreover the analysis time is twice shorter than in the case of the use of the electrothermal hybrid model of the MOS transistor.
For the low values of the MOS transistor control signal frequency and small values of the converter load resistance, selfheating has to be included in the model, whereas it is indispensable for the high values of the control signal frequency to take to account the MOS transistor electrical inertia.
The presented results of the boost converter investigations show that for the control signal frequency less than 150 kHz the inertia can be omitted in the devices models, whereas the static losses in these devices at the on-state
Table 2. Times of the boost convereter analysis with the use of the considered MOS transistor models
Characteristic	Hybrid electrothermal model	Isothermal built-in model	Ideal switch	Two-value resistor	Electrothermal two-value resistor
V0Ut(D)	161.77 s	125.83 s	70.28 s	67.11 s	87.17 s
Vou,(Ro)	366.05 s	289.55 s	148.10 s	126.06 s	165.24 s
Vout(f)	281.08 s	232.69 s	513.84 s	418.22 s	504.78 s
6
K. Gorecki, J. Zar^bski: Influence of Mosfet
Model Form on Characteristics of the Boost Converter
Informacije MIDEM 41(2011)1, str. 1-7
play the essential role. Therefore a very important challenge would be working out an electrothermal large-signal model of the transistor switch with the inertia phenomena taken into account.
References
/1/ M.H. Rashid, "Power Electronic Handbook", Academic Press, Elsevier, 2007.
/2/ N. Mohan, W. P. Robbins, T. M. Undeland, R. Nilssen, O. Mo, "Simulation of Power Electronic and Motion Control Systems - An Overview", Proceedings of the IEEE, Vol. 82, 1994, pp. 1287-1302.
/3/ M.H. Rashid, H. M. Rashid, SPICE for Power Electronics and
Electric Power, Taylor & Francis, 2006. /4/ Gorecki K.: Non-linear average electrothermal models of buck and boost converters for SPICE. Microelectronics Reliability, Vol. 49, no.4, 2009, pp. 431-437. /5/ R. Ericson, D. Maksimovic, "Fundamentals of Power Electronics",
Norwell, Kluwer Academic Publisher, 2001. /6/ D. Maksimovic, A. M. Stankovic, V.J.Thottuvelil, G.C. Verghese, "Modeling and simulation of power electronic converters", Proceedings of the IEEE, Vol. 89, No. 6, 2001, pp. 898-912. /7/ Ch. P. Basso, "Switch-Mode Power Supply SPICE Cookbook",
New York, McGraw-Hill, 2001. /8/ S. Ben-Yaakov: Average simulation of PWM converters by direct implementation of behavioural relationships. International Journal of Electronics, Vol. 77, No. 5, 1994, pp. 731-46. /9/ J. Vlach, A. Opal: Modern CAD methods for analysis of switched networks. IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications, Vol. 44, No. 8, 1997, pp. 759-762.
/10/ K. Gorecki, J. Zar^bski: Investigations of the Usefulness of Average Models for Calculations Characteristics of Buck and Boost Converters at the Steady State. International Journal of Numerical Modelling Electronic Networks, Devices and Fields, Vol.23, No.1, 2010, pp. 20-31. /11/ R. Simanjorang, H. Yamaguchi, H. Ohashi, T. Takeda, H. Murai, M. Yamasaki, "Estimating performance of high output power density 400/400V isolated DC/DC converter with hybrid pair SJ-MOSFET and SiC-SBD for power supply of data center", 31 st International Telecommunications Energy Conference, INTELEC 2009, 2009. pp. 1-5. /12/ A. Reatti, M. Balzani, "Computer aided small-signal analysis for PWM DC-DC converters operated in discontinuous conduction mode", 48th Midwest Symposium on Circuits and Systems, 2005, Vol. 2, pp. 1561 - 1564. /13/ B.P. Divakar, K.W.E. Cheng, D. Sutanto, Shi Zhanghai K.F. Kwok, "The use of power factor and K-factor as goodness factors in the analysis of dc-dc converters", Australasian Universities Power Engineering Conference, AUPEC '08, 2008, pp. 1 - 6. /14/ R. Prieto, L. Laguna-Ruiz, J.A. Oliver, J.A. Cobos, "Parameterization of DC/DC converter models for system level simulation", 2007 European Conference on Power Electronics and Applications, 2007, pp. 1-10. /15/ R. Prieto, L. Laguna, J.A. Oliver, J.A. Cobos, "DC/DC Converter Parametric Models for System level Simulation", Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2009, pp. 292-297.
/16/ M. Vellvehi, X. Jorda, P. Godignon, J. Millan, "Electro-thermal Simulation of a DC/DC Converter using a Relaxation Method", 7th International Conference on Thermal, Mechanical and Multiphasics Simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSime 2006, pp. 1-7.
/17/ J.H. Ly, K. Siri, "Frequency response analysis for DC-DC converters without small-signal linearization", Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition APEC '03, 2003., Vol. 2, pp. 1008-1013.
/18/ F. Alonge, F. D'Ippolito, F. M. Raimondi, S. Tumminaro, "Nonlinear Modeling of DC/DC Converters Using the Hammerstein's Approach", IEEE Transactions on Power Electronics, Vol. 22, No. 4, 2007, pp.1210 - 1221.
/19/ S. Abid, A. Ammous, "Average modeling of DC-DC and DC-AC converters including semiconductor device non-linearities", International Conference on Design and Test of Integrated Systems in Nanoscale Technology DTIS 2006, pp. 384 - 389.
/20/ P. Chrin, C. Bunlaksananusorn, "Large-Signal Average Modeling and Simulation of DC-DC Converters with SIMULINK", Power Conversion Conference - Nagoya PCC '07, 2007, pp. 27-32.
/21/ K. Görecki, J. Zarçbski: Influence of MOSFET Model Form on Boost Converter Characteristics at the Steady State. 16th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2009, tödz, 2009, p. 162.
/22/ B.M. Wilamowski, R.C. Jaeger, "Computerized circuit Analysis Using SPICE Programs", McGraw-Hill, New York, 1997.
/23/ K. Görecki, "A New Electrothermal Average Model of the DiodeTransistor Switch", Microelectronics Reliability, Vol. 48, No. 1, 2008, pp. 51-58.
/24/ K. Görecki, J. Zarçbski, "Modeling Nonisothermal Characteristics of Switch-Mode Voltage Regulators", IEEE Transactions on Power Electronics, Vol. 23, No. 4, 2008, pp. 1848 - 1858.
/25/ F. F. Oettinger, D. L. Blackburn, "Semiconductor Measurement Technology: Thermal Resistance Measurements", U. S. Department of Commerce, NIST/SP-400/86, 1990.
/26/ K. Görecki, J. Zarçbski, „System mikrokomputerowy do pomi-aru parametröw termicznych elementöw pölprzewodnikowych i uktadöw scalonych", Metrologia i Systemy Pomiarowe, t. VIII, Nr 4, 2001, ss. 379-396. (in Polish)
Prof. Krzysztof Gorecki Prof. Janusz Zarqbski
Gdynia Maritime University Department of Marine Electronics Morska 83, 81-225 Gdynia, POLAND, Tel. ++48 58 6901448, ++48 58 6901599, fax ++48 58 6217353 E-mail: gorecki@am.gdynia.pl, zarebski@am.gdynia.p\
Prispelo: 17.03.2010	Sprejeto: 03.03.2011
7
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
FLEXIBLE LOW COST ASIC DESIGN VERIFICATION TOOL WITH GUIDELINES FOR GENERATION OF STDF FOR MULTI
PROJECT WAFER SORT
Janez Trontelj jr. Faculty of Electrical Engineering, Ljubljana, Slovenia
Key words: Wafer sort, ASIC, ATDF, STDF, DAQ Card
Abstract: This article describes practical, low cost approach for sensitive, analog or mixed signal application specific integrated circuit (ASIC) design verification. Step by step is described how to solve the problems about wafer sort on multi-project wafers, how to select appropriate low cost test hardware and suitable operating system platform. All these actions are performed with one main goal in mind to speed up the measurements. It is also described in detail how to achieve test data compatibility with several commercial automatic statistical analysis tools. Entire critical parameter verification process was also practically implemented on very high sensitive ASIC for industrial application and complies with strict automotive standards.
Hitro prilagodljiv in cenovno ugoden testni system za analizo ustreznosti vezij ASIC s priporočili za generiranje STDF datotek na več projektnih silicijevih rezinah
Kjučne besede: Testiranje silicijevih rezin, Vezja po naročilu, ATDF, STDF, DAQ kartica
Izvleček: Članek opisuje praktičen, nizko cenovni pristop za merjenje občutljivih, analognih oziroma analogno-digitalnih sklopov na integriranih vezjih po naročilu. Korak za korakom so opisane tudi rešitve problema testiranja več projektnih silicijevih rezin, kako izbrati primerne testne naprave z ustreznimi operacijskimi sistemi za pospešitev hitrosti zajemanja meritev. Podrobno je opisan tudi način, kako generirati testne podatke, ki so kompatibilni z večino orodij za avtomatsko statistično analizo izmerjenih parametrov. Celoten proces raziskave kritičnih parametrov visoko občutljivega integriranega vezja po naročilu za industrijsko aplikacijo je bil praktično preizkušen in ustreza strogim standardom, ki so predpisani za avtomobilsko industrijo.
1. Introduction
A proper operation of sensitive, analog or mixed signal application specific integrated circuits for microelectronic systems is often influenced by so many parameters that sometimes can't be predicted only by expertise and simulation tools. In such cases, it is a good practice to utilize low cost multi-project wafer production service, which is offered by major semiconductor houses. Schedules for nowadays microelectronics projects are by default very tight. Quick response is critical, when such multi-project wafer is received for design specification evaluation. Usually several ten thousand parts must be evaluated, before new design corrections may be justified and determined. Evaluation time for each part should be well below one second and total control of measurement process is required. It is quite common that several thousand measurements are necessary just for one part characterization in less than one second time frame. The most time efficient way to accomplish this goal is to do measurements directly on silicon wafer /1 //2/, to eliminate the device packaging delay. Of course sometimes also package effect must be considered. This even further confirms the described approach, because results on the wafer sort can be later easily compared to the packaged parts measurement results.
There are certainly several software packages for test and automated measurements available on the market.
The problem is that in general they are too universal and therefore too bulky. The outcome is relatively slow data acquisition. Sometimes only preparation for one measurement task takes approximately 100 times more time than it is requested for both - preparation and measurement. In this article our approach will be described for low cost and fast wafer sort measurements on multi-project wafers. At the end we will also introduce how to achieve test data compatibility with commercial automatic statistical analysis tools.
2. Adopting wafer sort to multi-project wafers
The most obvious visible characteristic of the multi-project wafer (MPW) is that all devices for different projects are disposed within one small square area on the silicon wafer. The areas are then distributed over the wafer. Example of such different die images on a multi-project reticle is presented in figure1. There may be one or even more than ten identical devices on the same die image.
In general, fully automatic wafer probers are not adapted to the unique layout of multi-project wafers. There are actually two solutions to solve this problem. We may load and run one wafer as many times as there are identical parts to test
586
J. Trontelj: Flexible Low Cost ASIC Design Verification Tool
With Guidelines for Generation of STDF for Multi Project Wafer Sort
Informacije MIDEM 41(2011)1, str. 8-11
Fig. 1: Multi-Project wafer with emphasized die image.
on one die image. This is not an optimal solution, because it spends quite some time on wafer handling. Better solution is to write a special control software code for the wafer prober. Usually an ordinary personal computer with the suitable interface for wafer prober will do the job. Here we should take care about software compatibility. In case that the same computer is used to control wafer prober and our measurement acquisition system, it is always a good practice to check for the eventual driver and software library compatibility issues.
To teach the wafer prober to march upon the multi-project reticle, we need to adjust device X and Y dimensions to the dimensions of the die image in the multi-project reticle. After that we can use automatic wafer prober features like auto alignment, initial test square area recognition and automatic wafer map generation. Basically, all we need to do to test all devices on one die image is to use relative coordinate control commands of the wafer prober. This enables us to create required wafer prober chuck movements to all identical parts within the same die image that are relating to one project. When all parts on one die image are tested, relative coordinates for return back to the initial position on currently tested die image must be calculated. Than a simple "jump to next die" command can be used to continue with measurements on the next die image.
For marking bad or good parts on multi-project wafers inking is preferred to the wafer map. On the other hand, similar algorithms may also be used to convert original wafer map data from the wafer prober to the packaging company wafer map format.
3. How to select proper measurement equipment
The most crucial point in test program development is to select the right gear to do it. The selection is huge, but from the low cost point of view, it is a very good idea to use multifunction data acquisition cards (DAQ). They do
have several limitations, but with proper design of the load board, most of them can be easily removed. As a matter of fact, load board can be connected directly on the DAQ card and everything together can be placed almost on the top of the probe card. This means very low signal degradation and improves signal measurement accuracy. Figure 2 represents such combination of DAQ card and load board that can be simply attached (with connectors) to DAQ card. Figure 3 shows assembled load board and DAQ card with very short wires to probe card on the wafer prober.
Fig. 2: DAQ card with load board.
Fig. 3: Assembled DAQ card and load board connected to the probe card on wafer prober.
It is quite common to have a DAQ card with 32 or even more analog inputs (several of them may be also differential), 32 digital inputs/outputs, 4 analog outputs and two or three counters. So each pin of the ASIC that needs to be measured or triggered can be connected directly to its dedicated pin. If the number of pins is insufficient, we may simply add some extra cards to the USB (Universal Serial Bus) port. This method eliminates the need for expensive and time consuming switching matrix. It is well known that in general the switching matrix suffers from poor reliability when huge number of commutations is in question and they also degrade the signals due to longer switching paths.
To achieve high speed, control and flexibility of the DAQ cards we should go to the lowest possible level of program-
9
Informacije MIDEM 41(2011)1, str. 8-11
J. Trontelj: Flexible Low Cost ASIC Design Verification Tool
With Guidelines for Generation of STDF for Multi Project Wafer Sort
ming, which is usually limited by the driver and software library availability. Most of the DAQ cards still support writing subroutines in some kind of programming language like C or C++. A modern DAQ card actually enables us to utilize its own memory and processing power to run data acquisition independently from the control computer. Only trigger, sweep frequency setup and measured data must be transferred between the DAQ card and control computer. On the other hand, the latency may be the problem. Our tests show, that with such configuration the latency across the USB is approximately 20 miliseconds. Consecutive output set and measure time afterwards may be even faster than 1 micro second per repetition. In the case that we need a lot of configuration settings, the latency may be avoided by switching from windows platform to DOS or Windows 98 platform. There are still several DAQ cards available on the market, which are still supported in DOS mode. They also come in CardBus PC card shape and can be easily used with a laptop computer. In this case our test showed almost no latency and output set and measure time took approximately 5 micro seconds. In general, Linux is not widely supported by the DAQ card manufacturers, but the situation is improving.
This brief survey shows us, what kind of compromises must be made. Data acquisition may become even faster, if raw digital data are used for analog output configuration or voltage measurement wherever possible. In this case for unipolar operation the following formula should be used: Voltage
binaryValue =- * max BinaryValue (1)
referenceVoltage
Where max BinaryValue for 16 bit card is 65536 and referenceVoltage corresponds to the previously selected voltage range. On some cards with gain settings also gain should be considered. Therefore we have for unipolar operation:
binary Value = Voltage * gain * I max Binary Value 11	(2)
^ preference Voltage J J
4. Generation of STDF file
After we have selected a suitable test platform and created a stable ASIC wafer sort test environment, we would like to do a fast measurement data evaluation. In the beginning of the test program development, acquired test results are usually nicely organized in plain ASCII data files. It is always possible to load such data files into various software tools and do some basic statistical analysis, plot charts and similar.
The problem arises with the growing amount of test data and tested wafers. Suddenly, such approach becomes quite time consuming and the lack of suitable, professional analysis tool is evident. There are several available on the market. In general, they will not accept our specific ASCII data file, but they will definitely accept STDF (Standard Test Data Format)/3/. STDF is a proprietary file format for semiconductor test information, originally developed by
Teradyne, as a test result output of all of Teradyne UNIX operating system based testers. Teradyne derives no direct commercial benefit from propagating this standard. Now it is widely used throughout the semiconductor industry, since it is a commonly employed format. It is also produced by automatic test equipment platforms from all leading companies. STDF is a binary format, and specifications are available on the internet. It can be converted either to ASCII format known as ATDF (ASCII Test Data Format) or to a tab delimited test file. Working with STDF variable length binary field data format is not trivial, since it involves a detailed comprehension of over 100 pages long specification document.
Fortunately, conversion from STDF to ATDF does not lose any information and tools are available to do the conversion in both directions - from STDF to ATDF and vice versa. Such tool is called "STDFUtilTools" and it is also available on the internet as well as detailed ATDF specification /4/. ATDF is actually much easier to implement than STDF, so it shouldn't be a big problem for any test programmer using whichever programming language to do it. So we can conclude that STDF test data files may be produced from ATDF data files to conform to one single standard.
Anyway, ATDF specification is also quite extensive and it takes quite some time to determine the required sequence of the necessary record types. So let us give some additional information about sequence of the ATDF record types:
1.	First record type should be "FAR" (File Attributes Record). It determines ATDF and STDF format versions and scaling flag.
2.	"ATR" (Audit Trail Record) is second record type and it is used to record all operations essential to contents of the file.
3.	"MIR" (Master Information Record) record is needed for all global information of the file.
4.	"SDR" (Site Description Record) describes information about presence of test sites and test heads.
5.	Then we may have several "PMR" (Pin Map Record) type records.
6.	"PGR" (Pin Group Record) is used to associate a pin name with a group of pins.
7.	"WIR" (Wafer Information Record) is used to mark the beginning of wafer test.
8.	"PIR" (Part Information Record) acts as a marker to indicate where testing of a particular DUT (Device under Test) started. It is followed by "BPS" (Begin Program Section Record) type record. Then we can have several "PTR" (Parametric Type Record), "FTR" (Functional Type Record) and other similar record types to store measurement data. After all measurement data for one DUT is stored, we insert "EPS" (End Program Section Record) record type. The last record type is "PRR" (Part Result Record) that contains the results information relating to each part tested by the
10
J. Trontelj: Flexible Low Cost ASIC Design Verification Tool
With Guidelines for Generation of STDF for Multi Project Wafer Sort
Informacije MIDEM 41(2011)1, str. 8-11
test program. Point 8 is then repeated for all parts that were tested.
9.	Then we have all necessary "TSR" (Test Synopsis Record) type records. They contain statistics for one parametric or functional test.
10.	After "TSR" type record we may have several "HBR" (Hardware Bin Record) type records. They store a count of parts placed in a particular bin after testing. Here we may have "pass", "fail" or similar bins.
11.	"PCR" (Part Count Record) type record includes part count totals for one or all test sites.
12.	"WRR" (Wafer Results Record) type record includes results for each wafer tested by the test program.
13.	"MRR" (Master Results Record) is the last type record in the ATDF file and is a logical extension of the "MIR" type record.
Above 13 points actually describe the ATDF file structure. Further details about all ATDF type records used here are shown in ATDF file specifications /4/. Figure 4 represents a small cut off from the beginning of the ATDF file. Unfortunately some lines are too long and they will not fit on one page to represent them completely.
SDR: 11 0 | [I TSK-APM9 0AI2 ITIES | 1 |MxIdbl2 | 1 | Universal^!) | 0
Fig. 4: Small cut off from ATDF file.
After ATDF file is generated we may use previously mentioned "STDFUtilTools" tool to create a valid STDF file. This file can be used for an automatic statistical analysis for entire population of tested devices. Usually one STDF file per silicon wafer is required, but we may also join results from several wafers into one STDF file.
important features of such system are respectful test speed and accuracy to low cost ratio, easy adaptation to new ASIC versions and STDF test data compatibility. All aspects of this approach were practically implemented and tested on several wafers.
High precision magnetic micro system that was recently designed and developed in our laboratory was also successfully characterized with such system. Test demands were about 2300 accurate voltage measurements, 18 precise frequency measurements and selective trimming, setting or reading of 250 OTP (one-time programmable) fuses per part at two different temperatures. Unique serial number was also written via OTP fuses to each part. This enables later measurement comparison of packed parts and identification of wafer sort measurement data from the STDF file. Average test time per part was approximate^ 850 miliseconds and could be even faster, if no DUT settling delays were necessary. Wafer prober moving time is half a second per part, so wafer sort time was a little bit less than 1.5 second. For the time being about one quarter of a million parts were successfully tested.
6. References:
/1/ J. Trontelj-jr, Precise Analog Automatic Testing on Silicon wafer,
Midem Proceedings, 2006. /2/ J. Trontelj-jr, Development of a Dedicated Low Cost ASIC Test System for Fully Automatic Wafer Prober, Midem Proceedings, 2007.
/3/ Web site for STDF specifications< http://freestdf.git.sourceforge. net/git/gitweb.cgi?
p=freestdf/freestdf-DEAD;a=blob_plain;f=docs/stdf-spec.pdf>, accessed on 23/03/2010. /4/ Web site for ATDF specifications < http://freestdf.git.source-forge.net/git/gitweb.cgi?
p=freestdf/freestdf-DEAD;a=blob_plain;f=docs/atdf-spec.pdf>, accessed on 23/03/2010.
Dr. Janez Trontelj jr.
University of Ljubljana, Faculty of Electrical Engineering Laboratory of Microelectronics Tržaška 25, SI-1000 Ljubljana, Slovenia Tel.: +386(0)14768471 e-mail: janez.trontelj-jr@fe.uni-lj.si
5. Conclusions
In this article the most critical parts of the low cost and high precision fully automatic test system development
for multi-project wafers evaluation is described. The most Prispelo: 25.03.2010	Sprejeto: 03.03.2011
11
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
DEVELOPMENT OF IMAGE ANALYSIS PROCEDURES FOR EVALUATION OF PRINTED ELECTRONICS QUALITY
1Marica Starešinič, Tadeja Muck, 2Maja Stanič, 3Marta Klanjšek Gunde
University of Ljubljana, Faculty of Natural Sciences and Engineering, Ljubljana, Slovenia 2University of Zagreb, Faculty of Graphic Arts, Zagreb, Croatia 3National Institute of Chemistry, Ljubljana, Slovenia
Key words: printed electronics, image analysis, RFID, ImageJ, printed UHF antenna.
Abstract: The procedures described in this work show the feasibility of the first stage of standardized methods for evaluation of printability of printed electronics.
Printed electronics are electronically functional devices printed onto media like paper, plastic, flexible materials, textiles etc. One of the main goals of printed electronics is simply that electronic components could be printed with mass printing technologies, enabling fast production speed and cheaper products. A new area of applied research is focusing on providing several methods for quality evaluation of printed components to perform fast on-line characterisation.
Within present research we study the potential to develop a system for detection of printing defects and imperfections such as substrate non-uniformity and poor surface ink coverage during in-line (in-situ) production of printed electronics. The possibilities for fast and relevant in-line control of printed electronic devices are introduced and applied on printed antenna samples applied for RFID (Radio Frequency Identification) tags.
For evaluation and the prospects of development of procedures for in-line control, image analysis is used with applying ImageJ software. Each separate layer (surface of printing material and conductive printed ink) was captured by CCD camera, stereo microscope and scanning electron microscope. Further, it was evaluated by ImageJ software. For automatic and relevant evaluation different routines were used, developed, modified or upgraded; 1) macro for printing surface coating non-uniformity, 2) macro for evaluation of percentage of coverage of conductive ink on the printed substrate and 3) procedure including 3D visualization plug-in to evaluate ink layer thickness in all three (x, y, z) dimensions.
The first routine presented here gives the information about the homogeneity or potential defects of printing material surface (with or without pre-coating). The non-uniformity of surface coatings and functional layers is an important property of printed electronics as it is directly related to the electrical properties and therefore to the performance of printed electronic. Other two routines give relevant information about percentage of coverage and thickness of printed functional ink layer. That tells us whether printed electronic element is OK or destruct. This way a reliable procedure was obtained for quick on-line (in situ) testing of printed electronics.
These results present the first stage of our research, which is focused on to set up the steps and possibilities for using presented in-line control methods for evaluation of printed electronic devices. The presented procedures could in future be applied for in-line control at printing speeds.
Razvoj metod slikovne analize za oceno tiskovne prehodnosti
tiskane elektronike
Kjučne besede: tiskana elektronika, slikovna analiza, RFID, ImageJ, tiskana UHF antena.
Izvleček: Pokazana je možnost hitre in učinkovite kontrole kvalitete struktur tiskane elektronike, ki se izvede med procesom oz. med posameznimi fazami tiska. Pokazan je primer uporabe na tiskani anteni za pasivni RFID. Uporabljena je slikovna analiza mikroskopskih posnetkov s pomočjo ImageJ programa. Površine tiskovne podlage v vsaki fazi tiska se posnamejo s CCD kamero, optičnim mikroskopom in/ali elektronskim mikroskopom, dobljeno sliko pa se digitalno analizira. Za potrebe te analize so bili prilagojeni, razviti ali uporabljeni različni numerični pristopi: 1) makro za analizo enakomernosti površine, 2) makro za vrednotenje deleža površine, ki je pokrita s funkcionalno prevodno plastjo in 3) makro za 3D vrednotenje debeline in oblike plasti v (x,y,z) smereh. Prikazani rezultati so del raziskav v smeri iskanja učinkovitih in hitrih metod za nadzor tiskovne prehodnosti sistemov tiskane elektronike. Za integracijo predlaganih postopkov v tiskarske sisteme bi bilo potrebno vanje vgraditi zgolj vhodne naprave, kot so, npr. CCD kamere..
1. Introduction
Electronically functional devices printed onto media like paper, plastic, flexible materials, textiles etc. are today represented as printed electronics. The majority of applied materials are organic, therefore also the term "organic electronics" is applied - this distinguishes it from classic electronics which base on inorganic materials.
However, in practice organic materials are not applied only by some printing technique, therefore the terms printed electronics and organic electronics may designate products of different technologies.
One of the main goals of printed electronics is simply that it could be printed with mass printing technologies, enabling fast production speed and cheaper products.
Printable electronics technology has the potential to drastically reduce ecological footprint and energy consumption in manufacturing process. For example, digital fabrication using inkjet technology, by patterning high-purity electronically functional materials without the original patterning masks, can reduce costs and turnaround time /1/.
Print techniques used in production of printed electronic structures are screen-printing, offset, gravure printing as
591
M. Staresinic, T. Muck, M. Stanic, M. Klanjsek Gunde: Development of
Image Analysis Procedures for Evaluation of Printed Electronics Quality	Informacije MIDEM 41(2011)1, str. 12-17
well as flexography, inkjet printing and laser-based printing. The first demonstration was performed on screen printing, which is also used for defining source-drain electrodes (channel length 200 mm, thickness 10 mm) /2/. Offset, the most commercial printing technique, is also very attractive for electronic manufacturing when the right compromise between ink viscosity, surface tension and evaporation rate is established /3/. Gravure printing is less used, but conductive carbon-based ink for interconnections and gate-electronics can be printed with this technique /4/. Flexography is also much less used because the flexible printing plate causes stamp distortions on the prints, resulting in problems with prints accuracy /5/. Plastic transistors created with ink-jet printer present a new low-cost electronics option.
Xerox has reported in 2005 that they have come up with air stable versions of printable electronic elements (conductors and insulators) needed to make long lasting circuits easier /6/.
Another advantage of organic electronic is capability to bend without losing its functionality. The creation of stretch-able electronics originates from metal electrodes on rubber substrates, showing good mechanical but poor electronic properties. Nevertheless, active matrix sheet was reported that can be stretched by 70 % without mechanical or electrical damage /7/.
For such applications electrically functional printing inks are needed. Simplified structures of electronic components can be prepared by very small number of them /8/. This is in principle in agreement with industrial printing machines where typically 4 to 12 printing inks or the same number of printing processes are available in series. A number of research studies are focused on modification of different polymer materials to get various electronically-functional properties which are suitable for printing with conventional high-speed printing technologies /9-12/. The potential to adapt graphic art printing techniques to the manufacture of functional devices is today the focus of many research groups. They put the emphasis on the structures for integration of advanced functionality, other than only graphic information on different substrates. It is inspired by the need to reduce the manufacturing cost of existing electronic devices like radiofrequency identification (RFID) tags. Low cost printing can also enable the use of electronic devices in modes, applications and environments, which are currently not accessible by conventional electronics.
A functional ink which is printed in a given shape must form more-or-less continuous layer to assure its proper (acceptable) functionality. Most printing techniques give dot-shaped off-prints rather than uniform coverage of printed shapes. The print quality of normal graphic art applications regards visually accepted quality which, most likely, will not fulfil demands of electronic functionality. In this area more continuous coverage is desired and should be evaluated accordingly. Therefore new and precise methods to evaluate coverage are desired.
Those would also reveal whether some parts of the functional layer were damaged. In this case the coverage of substrate is considerably smaller what may cause inappropriate operation of printed layer or not operation at all. By precise evaluations those faults could be eliminated on time.
Suitable methods that control printability of printed electronic devices are based on structure - property relations. The microscopy methods, like AFM (Atomic Force Microscopy) or SEM (Scanning Electron Microscopy) are used to see the surface. X-ray diffraction data are used to understand the relationship between nucleation, growth, crystallinity and device performance /13/.
By using AFM a wide variety of growth morphologies were observed in organic thin films, revealing the complexity of the building blacks /14/. Other methods used to evaluate the printability are layer thickness determination, optical density and surface resistance.
A new area of applied research is focusing on providing several methods for quality evaluation of printed components to perform fast on-line characterisation.
Image analysis is one of them and is fast and suitable for in-line control of printing process even thought images are captured by digital still cameras. It was already shown that digitally captured images are comparable when compared to newly developed coloured films, though films still show better 3D structure, better details, higher sensitivity and wider dynamic range /15/.
Optical images of printed polymers at magnification rates showing the whole array or just small regions are used to estimate the quality of print. At that stage, the print errors can be determined while still in the production line (in-line control) /16/. Analysis and measurements need to be carried out to pre-process the images and minimize the deformations. In the paper from 2006 the authors have defined five steps for image analysis and processing; 1) the threshold to isolate the area of interest on the image, 2) isolation of pixels in the background, 3) simple calibration of pre-set dimensions in X and Y dimensions, 4) particle filtering analysis to remove particles according to their morphological properties, and 5) the edge-enhancement analysis to enhance the edge, separating it from the background /17/. Following these steps the line patterns in a circuit image can be enhanced so the centre and width of the circuit can be analyzed.
In the field of printed electronic the base surface uniformity of printed material (i.e. a substrate) is also very important. The completely uniform surface without any cracks or any other surface defects has to be achieved, especially when several layers are overprinted to get the final functionality. The polymer foils which are frequently used as printing substrate, usually have adequately uniform surface. In applications in which the paper or board are used as substrates, more surface defects are usually observed. In such cases, the printed conductive ink layer may not
13
M. Starešinič, T. Muck, M. Stanič, M. Klanjšek Gunde: Development of
Informacije MIDEM 41(2011)1, str. 12-17	Image Analysis Procedures for Evaluation of Printed Electronics Quality
enable desired conductivity and destruction of electronic component may not be an exception. This is the reason why hydrophobic pre-coatings are applied on absorptive materials like papers and boards.
It is essential to recognize problems concerning non-uniformity of the surface as early as possible, best during the printing process. This way the quality of printed electronics could be detected practically on-line during successive printing steps.
a)
2. Materials and methods
For the purpose of present research the professional example of printed UHF (Ultra High Frequency) RFID antenna from a commercial design (COPACO) from the LOPE-C exhibition brochure (Organic Electronics, OE-A) /18/ was investigated. It is presented on Figure 1, reproduced by diverse image capture methods. Antenna was printed with conductive silver ink directly onto cardboard, frequently used for printing electronics in packaging, which was at the same time evaluated by the means of surface coating non-uniformity.
Images of selected sample (antenna and printing surface) were captured using stereo microscope Leica EZ4D with integrated digital image capture device, digital camera NIKON D300 with Nikkor AP-S micro 105mm, 1:2,8G-ED lens and SEM - scanning electron microscope JSM6060LV by JEOL. For SEM observation the sample was coated by C+Au/Pd mixture in vacuum evaporator by JEOL, Japan.
The images were saved in either .jpg and .tiff file format and analyzed with ImageJ /19/. It is freeware software for image processing and analysis in Java, inspired by NIH Image for Macintosh. For automatic and relevant evaluation different routines were used, developed, modified or upgraded; 1) macro for printing surface coating non-uniformity, 2) macro for evaluation of percentage of coverage of conductive ink on the printed substrate and 3) procedure including 3D visualization plug-in to evaluate ink layer thickness in all three (x, y, z) dimensions.
b)
c)
3. Results and discussion
3.1 Diverse image capture methods
RFID antenna, reproduced by diverse image capture methods is presented on Figure 1.
Different image capture devices results in different surface texture details of the sample presented. Digital camera images and images obtained by stereomicroscope can be used both for research, as well as for in-line control, though magnification conditions have to be experimentally determined. SEM images were later used for 3D calibration of 2D images taken by other two capturing methods to determine the thickness of printed layer and were.
Fig.1: RFID antenna captured with digital camera (a), stereomicroscope (b) and SEM (c) respectively.
3.2 Surface coating non-uniformity
To evaluate the non-uniformity of the printing substrate surface coating as an important property of printed electronics, a special macro was developed. The amount of non-uniformity is calculated on the basis of the image's histogram which represents the number of pixels as a function of their intensity (gray value). The amount of the non uniformity is expressed as the Non-uniformity index (NU):
NU = Ux - Lx	(1)
14
M. Starešinič, T. Muck, M. Stanič, M. Klanjšek Gunde: Development of
Image Analysis Procedures for Evaluation of Printed Electronics Quality	Informacije MIDEM 41(2011)1, str. 12-17
where Ux and Lx are the average gray values of pixels above and below median grey value, respectively. Ux is calculated as the mean of the intensities between median and maximum gray values of the histogram, whereas Lx is calculated as the mean of the intensities between minimum and median gray values of the histogram. The larger is NU, the greater is the surface non-uniformity. It reveals the relevant measure of the usefulness of the surface texture for application of a functional layer with desired properties. NU value measures whether its surface is uniformed enough.
The designed macro includes sequence steps:
saveSettingsO;
setBatchMode(true);
run("8-bit");
run("Set Measurements...", "mean min median limit
redirect=None
decimal=2");
Dialog.create("Select Area Dimensions to Evaluate");
Dialog.addNumber("Width (px):", 200);
Dialog.addNumber("Height (px):", 200);
Dialog.show();
w = Dialog.getNumber();
q = Dialog.getNumber();
makeRectangle(0, 0, q, w);
ID1 = getImageID();
setTool(0);
beep();
print("Wait For User", "Select Area to Analyze");
if (selectionType () !=0)
exit("Please select rectangle!");
selectImage(IDI);
run("Measure");
median = getResult("Median");
getMinAndMax(min, max);
selectImage(IDI);
//run("Threshold...");
setThreshold(min, median);
run("Measure");
mean = getResult("Mean");
Lx = mean;
resetThreshold;
selectImage(IDI);
//run("Threshold...");
setThreshold(median, max);
run("Measure");
mean = getResult("Mean");
Ux = mean;
resetThreshold;
selectImage(IDI);
NU = (Ux-Lx);
showMessage("Histogram Mottle: ", "Non-uniformity number (NU) is: "+NU);
title = getTitle(); print(title+" NU is: "+NU); restoreSettings();
The evaluation of surface non-uniformity is shown on Figure 2. The example shows the printed antenna's substrate - a commercial base material, frequently used for printing electronics (coating barriers paper). The NU of the sample is 9,99. If the value would be higher (more uneven base) the functionality of ink layer printed over such a base could be unacceptable. The limit NU level must be defined for each applied substrate individually.
In each case the range of acceptable values have to be determined with some separate experiment.
0	2 5 S
Count: 786432 Min: 46
Mean: 106.41 Max: 178
StdDev: 11.83 Mode: 111 (24461)
Fig. 2: An example of evaluating of surface coating non-uniformity. The coating barrier paper was captured by stereo microscope Leica EZ4D at 35 x magnification in reflection mode. The histogram of gray values on this picture was obtained by its analysis with ImageJ software.
3.3 Percentage of coverage of functional ink on the printed substrate
To evaluate the print quality of the ink layer, the macro for evaluating the percentage of coverage was upgraded and modified. It measures the coverage of the printing substrate with the printing ink. The adequate percentage of ink coverage is limited by minimal and maximal area covered. These values must be given in advance experimentally.
The procedure was tested on test RFID antenna sample, shown on figure 3.
The example (Figure 3) shows a UHF-antenna designed by COPACO and printed with conductive silver ink directly on cardboard. The applied macro gives relevant information about the print quality in terms of adequate ink coverage
15
M. Starešinič, T. Muck, M. Stanič, M. Klanjšek Gunde: Development of
Informacije MIDEM 41(2011)1, str. 595-17	Image Analysis Procedures for Evaluation of Printed Electronics Quality
Fig. 3: RFID antenna with application of the macro for evaluation of percentage of coverage of conductive ink on the printed substrate. Left image: good antenna with adequate ink coverage and good ink printability; right image: completely destroyed antenna - ink coverage is not sufficient.
of the passive antenna. If the area of ink layer is not adequate, the macro gives the information that the antenna is destruct. In the presented example the sufficient ink area was determined according to area of CCD captured image on the good-working antenna. For a good on-line evaluation process the limit for covering has to be defined in advance.
The macro steps were as follows: run("8-bit"); run("Make Binary"); if (bitDepth!=8)
exit("This macro requires an 8-bit image"); black = 255; white = 0;
getHistogram(0, hist, 256); total = 0;
for (i=0; i<256; i++) total += hist[i]; print("");
print("Black pixels: " + hist[black]); print("White pixels: " + hist[white]); print("Percent black: " + 100*hist[black]/total); P=100*hist[black]/total; if (P<=30)
print("The antenna is destruct!"); else
print("Congratulations, the antenna is OK!");
3.4 Ink layer thickness evaluation in three
dimensions
The thickness of conductive ink layer of passive RFID antenna is very important. Among others, it determines the conductivity level and thus, the quality factor of the antenna. With the use of 3D visualization plug-in and custom developed routine, the quick and relevant method for analysis of ink thickness in z-direction from 2D sample image captured by CCD camera can be performed. First, the ink thickness was evaluated by cross cutting of the sample and capturing it by SEM (Figure 4). The thickness of the ink layer was de-
termined by image analyzing tool included in SEM software. The printed passive RFID antenna was then captured by CCD camera. The image was transformed into 8-bit image and Set-scale tool was used to calibrate x and y dimensions in millimetres. After that, the 8 bit image was calibrated in z-direction, by determining and calibrating the ink thickness to grey value. For the final evaluation of ink layer thickness in three dimensions, the image was transformed into 32-bit image type and the plug-in 3D interactive surface plot /20/ was used (Figure 5).
Fig. 4: SEM micrograph of UHF-antenna sample from Fig. 3. Cross cut shows the conductive ink layer on the right side and its determination of the thickness.
Fig. 5: The example of using macro/plug-in for evaluating the ink layer thickness in three dimensions. In image the UHF-antenna sample from Figure 3 is presented.
Figure 5 shows that captured 2D image, by applying 3D interactive plug-in, can be used to visualize and obtain precise information about ink layer of passive printed antenna in all three directions, acting as a fast analyzing tool for the evaluation of final printed antennas.
4. Conclusions
The procedures described in this work show the feasibility of the first stage of standardized methods for evaluation of
14
M. Starešinič, T. Muck, M. Stanič, M. Klanjšek Gunde: Development of
Image Analysis Procedures for Evaluation of Printed Electronics Quality	Informacije MIDEM 41(2011)1, str. 12-17
printability of printed electronics. We study the potential to develop a system for detection of printing defects and imperfections such as substrate non-uniformity and poor surface coverage with ink during in-line production of printed electronics.
For automatic and relevant evaluation of printability of printed electronics different routines were used, developed, modified or upgraded utilizing image analyzing software Image J; 1) macro for surface coating non-uniformity, 2) macro for evaluation of percentage of coverage of conductive ink on the printed substrate and 3) procedure including 3D visualization plug-in to evaluate ink layer thickness in all three (x, y, z) dimensions.
The first routine presented here gives the information about the homogeneity or potential defects of printing material surface (with or without pre-coating). Other two routines give relevant information about percentage of coverage and thickness of printed functional ink layer, which is an indicator whether printed electronic element is OK or destruct. This way a reliable procedure was obtained for quick on-line (in situ) testing of printed electronics.
The presented procedures could in future be applied for in-line control at printing speeds. For performing described analysis, in existing printing equipment only the input devices like CCD cameras in the line of printing units should be incorporated.
References
/1/ Tsuyoshi Sekitani et al., "Organic Transistors Manufactured Using Inkjet Technology With Subfemtoliter Accuracy, PNAS (Proceedings of the National Academy of Sciences of the United States of America), vol. 105, No. 13, pp. 4976-4980, 2008. /2/ H .Sirringhaus et al., "Manufactoring of Organic Transistor Circuits by Solution-based printing" in Organic Electronics: Materials, Manufactoring and Applications, edited by Hagen Klauk, 2006, WILEY-VCH.
/3/ M. Pudas, J. Hagberg, S. Leppavouri, " Gravure printing parameters and ink components affecting ultra-file-line gravure-offset printing for electronics applications", J. European Cer. Soc. 24, pp. 2943-2950, 2004. /4/ M. Pudas, N. Halonen, P. Granat, J. Vahakangas, "Gravure printing of conductive particulate polymer inks on flexile substrates", Prog. Org. Coat. 54, pp. 310-316, 2005. /5/ U. Herzau-Gerhard, H. Nagel, "Printing of functional layers using flexography", 34th International Research Conference, Advances in printing and media technology, Grenoble 2007. Book of extended abstracts. Iarigai, International Association of Research Organizations for the Information, Media and Graphic Arts Industries, 2007, Session 8B pp. 1-4. /6/ R. F. Service, "Printable electronic that stick around", Science
304, pp. 675, 2004. /7/ Tsuyoshi Sekitani et al., "A Rubberlike Stretchable Active Matrix Using Elastic Conductors", Science, Vol. 321, No. 5895, pp. 1468-1472, 2008. /8/ M. Berggren, D. Nilsson, N.D. Robinson, "Organic materials for printed electronics", Nature Materials 6, (2//7) pp 3-5, 2006.
/ 9/ M. Chen, "Printed electrochemical devices using conducting polymers as active materials on flexible substrates", Proceedings of the IEEE 93, pp. 1339-1347, 2005.
/10/ K. Lee, S. Cho, S.H. Park, A.J. Hegger, C.W Lee, S.H. Lee, "Metallic transport in polyaniline", Nature 441, pp. 65-68, 2006.
/11/ H. Alves, A.S. Molinari, H. Xie, A.F. Morpurgo, "Metallic conduction at organic charge-transfer interfaces", Nature Materials 7, pp. 574-580, 2008
/12/ A. Morrin, O. Ngamna, E. O'Malley, N. Kent, S.E. Moulton, G.G. Wallace, M.R. Smyth, A.J. Killard, "The fabrication and characterization of inkjet-printed polyaniline nanoparticle films", ElectrochimicaActa, pp. 5092-5099, 2008.
/13/ D. J. Gundlach et al., "Contact-induced crystallinity for highperformance soluble acene-based transistors and circuits", Nature materials 7, pp. 216 - 221, 2008.
/14/ Gregor Hlawacek et al, "Characterization of Step-Edge Barriers in Organic Thin-Film Growth", Science, Vol. 321, No. 5885, pp. 108-111, 2008.
/15/ Tadaki Tani, "AgX Photography: Present and Future", Journal of Imaging Science and Technology, vol. 51, No.2, pp. 110-116, 2007.
/16/ H. Sirringhaus et al. "Manufactoring of organic transistor circuits by solution-based printing" in Organic Electronics: Materials, Manufacturing and Application. Edited by Hagen Klauk, WILEY-VCH., pp. 294-322, 2006.
/17/ Minh-Huan Yang et al.: Pattern Recognition and Analysis for Circuit Fabrication by Ink jet printing, Journal of Imaging Science and Technology, vol. 50, No.3, pp. 251-256, 2006.
/18/ Large-area, Organic & Printed Electronic Convention - LOPE-C, Frankfurt, 23.-25. 6. 2009.
/19/ ImageJ, Image processing and Analysis in Java, NIH Image, available on line: http://rsbweb.nih.gov/ij/index.html, (20 jan 2009).
/20/ Kai Uwe Barthel, Interactive 3D surface plot, available on line: http://rsb.info.nih.gov/ij/plugins/surface-plot-3d.html , (25, jan, 2009).
Marica STAREŠINIČ*, Tadeja MUCK University of Ljubljana, Faculty of Natural Sciences and Engineering, Snežniška 5, SI-1000 Ljubljana, Slovenia
Maja STANIČ
University of Zagreb, Faculty of Graphic Arts, Getaldiceva 2, 10000 Zagreb, Croatia
Marta KLANJŠEK GUNDE National Institute of Chemistry, Hajdrihova 19, SI-1000 Ljubljana, Slovenia
* Corresponding author: marica.staresinic@ntf.uni-lj.si
Prispelo: 17.03.2010	Sprejeto: 03.03.2011
17
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
ABSORPTION OF MICROWAVE POWER IN NITROGEN PLASMA AT MODERATELY LOW PRESSURE
Alenka Vesel1, Miran Mozetic1 and Marianne Balat-Pichelin2
Jozef Stefan Institute, Jamova cesta 39, 1000 Ljubljana, Slovenia 2PROMES-CNRS laboratory, Font-Romeu Odeillo, France
Key words: plasma; reflected power; matching; power transfer; energy absorption; electron motion
Abstract: The efficiency of microwave absorption by nitrogen plasma has been studied. Plasma was created within a quartz glass tube mounted perpendicular to a microwave cavity. The cavity was powered by a microwave generator operating at a standard frequency of 2.45 GHz and adjustable nominal power up to 1200 W. Plasma was created at low pressure. The quartz tube was pumped with a two stage rotary pump with a nominal pumping speed of 33 m3/h. A valve was mounted between the tube and the pump in order to adjust the effective pumping speed. The pressure of nitrogen in the quartz tube was thus varied between 100 Pa and 2500 Pa. The experiments were performed at the gas flow of 20 l/h. The nominal and adsorbed powers were measured with appropriate power meters. At low nominal power the reflected power was rather low but it kept increasing with increasing nominal power. The reflected power also depended on the pressure. The reflected power decreased monotonously with increasing pressure. At the highest pressure the reflected power was about 5 times lower than at the lowest pressure. The results were explained by energy accumulation of electrons at elastic collisions during oscillation in EM field.
Absorpcija mikrovalovne moči v dušikovi plazmi
pri nizkih tlakih
Kjučne besede: plazma, odbita moč, uskladitev, prenos moči, absorpcija energije, gibanje elektronov
Izvleček: Preučevali smo učinkovitost absorpcije mikrovalov v plazmi dušika pri nizkih tlakih. Plasma je bila ustvarjena v cevi iz kvarčnega stekla, ki je bila nameščena pravokotno na mikrovalovni resonator. Resonator je bil napajan z mikrovalovnim generatorjem, ki deluje na standardni frekvenci 2,45 GHz in ima nastavljivo nazivno moč do 1200 W. Razelektritveno cev smo črpali z dvostopenjsko rotacijsko črpalko z nazivno črpalno hitrostjo 33 m3/h. Med cevjo in črpalko je bil nameščen ventil, s katerim smo uravnavali efektivno črpalno hitrost. Tlak dušika v razelektritveni cevi je tako bil med 100 Pa in 2500 Pa. Eksperimenti so bili izvedeni pri pretoku plina 20 l/h. Nominalno in adsorbirano oz. odbito moč smo merili z ustreznimi merilniki moči. Pri nizki nominalni moči je bila odbita moč sicer majhna, vendar je z naraščajočo nominalno močjo naraščala. Odbita moč je bila odvisna tudi od tlaka. Odbita moč je monotono padala z naraščajočim tlakom. Pri največjem tlaku je bila odbita moč približno 5-krat nižja kot pri najnižjem tlaku. Rezultate smo pojasnili s kopičenjem energije elektronov pri elastičnih trkih med nihanjem v EM polju.
1. Introduction
Low pressure gaseous plasma is nowadays widely used for treatment of different materials /1-9/. Depending on specific needs plasma is created by various electrical discharges. Basically we can distinguish between two types of discharges: those where charged particles are accelerated in sheet region next to the electrodes, and those where charged particles are accelerated in electrical field presented in the volume. Examples of the first type of discharges include a simple DC glow discharge /10,11/, capacitively coupled RF discharge /12,13/ and hot-cathode as well as hollow cathode discharges /14/. The second type of discharges includes a variety of resonance discharges such as the popular electron cyclotron resonance (ECR) discharges /15,16/, inductively coupled RF discharges /6,9,17/ and MW discharges /18-22/. The absorption of energy supplied by an appropriate power supply is usually very high at surface discharges, but in volume discharges they may or may not be that high. If conditions for resonant acceleration of charged particles in electromagnetic fields are met, the power absorption is usually pretty high. On the other hand, the absorbed power
could be very low and many authors use expressions like unmatched or unbalanced plasma. The problem of insufficient power absorption is particularly severe in devices for modification of the properties of solid materials since the optimal conditions for power absorption can not be made due to particular requirements regarding the samples that are treated. In such cases a compromise between the requirements and the power absorption should be made. A pretty good example is plasma created in a microwave cavity. In this paper we present results on systematic measurements of the reflected power in order to show the right conditions for plasma generation.
2. Experimental
Experiments were performed at solar facilities of PROMES-CNRS laboratories for treatment of materials in Font Romeu through the FP7 program SFERA. The experimental reactor MESOX is used for characterization of high-temperature materials properties after exposure to gaseous plasma at extreme conditions. Samples are heated by concentrated light at maximum power of 5 kW concentrated on a spot area of about 1 cm2 and simultaneously heated by gaseous
598
A. Vesel, M. Mozetic, M. Balat-Pichelin: Absorption of Microwave
Power in Nitrogen Plasma at Moderately Low Pressure
Informacije MIDEM 41(2011)1, str. 18-21
plasma. A schematic of the experimental system is shown in Fig. 1. Plasma is created in the discharge chamber which is 50 cm long quartz glass tube with the diameter of 5 cm. The tube is pumped with the two stage rotary pump with the nominal pumping speed of 33 m3/h. There is a variable valve between the pump and the discharge chamber. The valve serves for adjusting the effective pumping speed at the exhaust of the discharge chamber. Depending on the valve adjustment the pumping speed can be decreased down to about 1 m3/h. Gas is leaked into the discharge chamber on the other side through flow controller. The maximum throughput of the controller is 20 l/h. Pressure is measured between the discharge chamber and the variable valve as shown in Fig. 1. The pressure in the discharge chamber depends on the position of the leak valve as well as the variable valve. At current experiments we created plasma in pure nitrogen.
Fig. 1: Schematic of the experimental vacuum system: (1) rotary pump, (2) venting valve, (3) adjustable valve, (4) bellows, (5) absolute vacuum gauge, (6) discharge chamber, (7) MW cavity, (8) leak valve with flow meter, (9) high pressure valve, (10) nitrogen flask.
Plasma was created by a microwave (MW) generator. A detail about plasma system is shown in Fig. 2. The discharge chamber is placed perpendicularly to the microwave cavity which is made from copper and has standard dimensions of 9x4x15 cm3. The cavity is powered with the MW generator operating at the standard industrial frequency of 2.45 GHz and at adjustable power up to 1200 W. On the other side of the microwave cavity there is manually operating matching unit. At our experiments the matching unit was optimized at the maximal effective pumping speed (practically equal to the nominal pumping speed of the vacuum pump) and was kept at that position during all experiments. The MW generator is equipped with a MW power meter, while the wave-guide between the MW generator and the cavity is equipped with a meter of the reflected power, as shown in Fig. 2.
Experiments were performed at different pressures in the microwave cavity corresponding to different effective pumping speeds. Pressure was measured with an absolute vacuum gauge. Depending on the opening of the variable valve the pressure in the discharge chamber was between
Fig. 2: Detail of the discharge chamber with MW apparatus.
100 Pa and 2500 Pa. At each pressure we performed measurement of the reflected power versus the nominal power of the microwave generator. At high pressure it was possible to perform measurements up to the nominal power of 800 W, but at lower pressure measurement up to lower power were realized because of the automatic switch-off function of the MW generator. Results of systematic measurements are summarized in Fig. 3.
I
bbO		
50(1		- -100Pa
		-o- 150Pa
450		-+-200Pa
400		-a- 290Pa
		- 390 Pa
350		--510Pa
300		-♦-710 Pa
		-»-960 Pa
250		1250 Pa
200		1670 Pa
		2450 Pa
1bU		
		
100		
50		
0		
100 200
300 400 500 Total power (W)
600
700
800
Fig. 3:
Reflected power versus the nominal power of the MW generator. The parameter is the nitrogen pressure in the discharge chamber.
Discussion
The results of the measurements of the reflective power shown in Fig. 3 reveal some interesting features. As a general rule the reflected power increases with increasing the nominal power. At low power up to about 200 W the reflected power is much lower than the nominal power indicating rather good matching of the microwave generator. As the total power is increased, the reflected power is increased too. The increase of the reflected power
19
Informacije MIDEM 41(2011)1, str. 18-21
A. Vesel, M. Mozetic, M. Balat-Pichelin: Absorption of Microwave
Power in Nitrogen Plasma at Moderately Low Pressure
depends enormously on the pressure. At low pressures the increase of the reflected power is pretty steep while at higher pressures a pretty good matching is observed at the total power of say 500 W. Such a huge discrepancy in matching between different pressures is explained by transfer of energy between the electromagnetic field and free electrons in nitrogen plasma.
Charged particles are accelerated in electric field. The energy gained from the field does not depend on the type of charged particle (electrons or ions) in the DC field. Namely, the energy gained is just e . U, where e is the charge of the charged particle and U is the voltage, U = E. x. Here, E is the electric field and x is the path. This also holds for AC electrical field as long as the frequency is low. As the frequency of the electrical field increases, the charged particles may not rich the walls of the chamber but they start oscillating in the electrical field. The oscillation of a charged particle with mass m in high-frequency electrical field is described by the basic equation /23//23/:
mx = eE0 coscoi	(1)
The kinetic energy of charged particles depends on the frequency (w) and the mass of the charged particle (m) and is determined as:
Wk--mx2	(2)
2
where x is the velocity, i.e.
eE
x = —-sinooi	(3)
moo
The oscillation amplitude is determined by integration of the Eq. (1) and is:
eE
x-—--cosottf	(4)
moo
The Eqs. (1-4) reveal important fact about oscillations of charged particles in high-frequency electrical field. First, the oscillation amplitude and the energy gained depend on the mass of the charged particle. Massive particles gain much less energy than particles with a low mass. The mass of nitrogen molecules is about 30.000-times larger than the electron mass. From Eqs. (1-4) it is clear that charged nitrogen molecules can not follow the oscillations of the electromagnetic field when the frequency is moderately high. In practical cases this often happens at the frequency of about 1 MHz. The frequency of the electrical field in our MW discharge is over 1.000-times larger at 2.45 GHz. Massive ions practically do not feel such high frequency electrical field so they gain practically no energy. On the other hand electrons are much lighter so they are still capable of oscillating with a reasonably large amplitude and kinetic energy. Electrons oscillating in vacuum cannot accumulate energy from the electrical field. Namely, when they reach maximal kinetic energy the electric field is transversed so they are slowing down instead of accelerating. An electron can only accumulate the kinetic energy if suffering an elastic collision with a heavy particle at the time when it has the
maximum kinetic energy obtained from the electric field. Namely, at elastic collision the kinetic energy of the electron is preserved, but the direction of the velocity becomes opposite. The electron is thus capable to take advantage of further accelerating in the electric field. If such collisions happen each time when the electric field is changed, the electron can accumulate a lot of energy. In the ideal case, the path between the two collisions should be equal to the oscillation amplitude. In such a case the electron would be able to keep accumulating its kinetic energy so it could gain energy much larger than the maximum energy according to Eq. (2).
The path between two collisions depends on several parameters, but the major one is the pressure. The mean free path decreases linearly with increasing pressure. At the pressure of 100 Pa the mean free path is roughly 10-4 m. This is at least of order of magnitude larger than the oscillation amplitude of electrons at 2.45 GHz and power of the order of 100 W. At low pressure obviously the electrons cannot gain much energy from the oscillating electromagnetic field. As the pressure increases the mean free path decreases so the accumulation of kinetic energy by electrons become more and more efficient. The electrons can thus accumulate energy at higher pressure and this accumulation is illustrated as better matching between microwave field and nitrogen plasma. The decrease of the reflected power with increasing pressure is demonstrated in Fig. 3. is therefore explained by better accumulation of the electron kinetic energy.
The upper consideration explains a huge difference in the reflected power versus pressure at high nominal power. Let us now discuss a rather good absorption of MW power at low discharge power. At the nominal power of about 100 W the absorbed power is almost perfect. As mentioned above the matching unit was adjusted just to have best matching at such conditions. The pretty good absorption of MW power at low powers cannot be explained by accumulation of electron kinetic energy at collisions but other effects should be taken into account. As mentioned earlier the heavy particles are not accelerated in the microwave field so their velocity is orders of magnitude smaller than the electron velocity. The consequence of such huge difference between positive ions and electron velocities is depletion of plasma since electrons escape on the walls leaving positive ions in the gas phase. Plasma becomes positively charged against the walls of the discharge chamber. The potential difference between the gas phase and the surface obviously depends on the ratio between electron and ion velocities, but is typically of the order of 10 V. This voltage prevents further depletion of the electrons and causes acceleration of ions towards the surface of the discharge chamber. The typical thickness of the sheath between the wall and unperturbed plasma is of the order of the Debye length /24/. This holds for chamber walls far from any electrode. In practice however there are always electrodes present and the voltage between plasma and the wall backed by an electrode can be as high as several
20
A. Vesel, M. Mozetic, M. Balat-Pichelin: Absorption of Microwave
Power in Nitrogen Plasma at Moderately Low Pressure
Informacije MIDEM 41(2011)1, str. 18-21
100 V. Such voltage is high enough to cause acceleration of positive ions onto the wall surface where they may emit a free electron. Electron enters the sheath and is accelerated to an energy which is large enough for sustaining the discharge. A rather good matching at low powers is therefore explained by such surface effects rather than by acceleration of charged particles in the volume.
Here, it is worth mentioning that formation of sheath is only possible when we already have charged particles in the gas phase. Charged particles can be only obtained by multiplication at ionization collisions which is possible only if electrons accumulate their energy. The discharge at low voltage therefore cannot be ignited. This is sound with experiments performed in any lab with MW plasma: the ignition of the discharge is only possible at high power. As mentioned earlier our experiments were performed in such a way that a discharge was ignited at maximum power and once plasma was established, the power was decreased. Opposite procedure would never be possible.
4. Conclusions
The absorption of MW power by nitrogen plasma was studied versus the pressure. While the absorption was pretty good and it did not depend much on pressure at low power, huge differences were observed at large power. The power absorption at low pressure and large power was only about 20% of the available power. At larger pressure, the absorption of MW power became reasonably good also at larger nominal powers. The huge differences in the absorption ability were explained by oscillations of electrons in the electromagnetic field and accumulation of kinetic energy at elastic collision with gaseous particles. At low power, on the other hand the energy accumulation was rather poor so pretty good power absorption was explained by effects in the sheath between the unperturbed plasma and the surface of the discharge tube. The results clearly indicate that high pressure is more suitable for plasma generation by MW discharge. If there is a need for nitrogen plasma generation at lower power one is recommended to use discharge at a lower frequency, such as inductively coupled RF discharge.
Acknowledgements
This project was funded by Slovenian Research Agency (ARRS) and the French grant through the European SFERA program.
References
/1/ K. Elersic, I. Junkar, A. Spes, N. Hauptman, M. Klanjsek Gunde,
A. Vesel. Mater. Tehnol., 2010, vol. 44, pp. 153-156. /2/ A. Vesel, M. Mozetic, P. Panjan, N. Hauptman, M. Klanjsek-Gunde, M. Balat-Pichelin. Surf. Coat. Technol., 2010, vol. 204, pp. 1503-1508.
/3/ A. Vesel, M. Mozetic, A. Drenik, N. Hauptman, M. Balat-Pichelin. Appl. Surf. Sci., 2008, vol. 255, pp. 1759-1765.
/4/ A. Vesel, M. Mozetic, A. Drenik, S. Milosevic, N. Krstulovic, M. Balat-Pichelin, I. Poberaj, D. Babic. Plasma Chem. Plasma Process., 2006, vol. 26, pp. 577-584. /5/ R. Kulcar, M. Friskovec, N. Hauptman, A. Vesel, M. Klanjsek-
Gunde. Dyes Pigm., 2010, vol. 86, pp. 271-277. /6/ A. Vesel, I. Junkar, U. Cvelbar, J. Kovac, M. Mozetic. Surf.
Interface Anal., 2008, vol. 40, pp. 1444-1453. /7/ U. Cvelbar, K. Ostrikov, M. Mozetic. Nanotechnology, 2008, vol.
19, pp. 405605-1-405605-7. /8/ U. Cvelbar, Z. Chen, M. K. Sunkara, M. Mozetic. Small, 2008,
vol. 4, pp. 1610-1614. /9/ M. Mozetic. Mater. Tehnol., 2010, vol. 44, pp. 165-171. /10/ Z. Lj. Petrovic, Z. Donko, D. Maric, G. Malovic, S. Zivanov. IEEE
Trans. Plasma Sci., 2002, vol. 30, pp. 136. /11/ I. R. Rafatov, D. Akbar, S. Bilikmen. Phys. Lett. A, 2007, vol.
367, pp. 114-119. /12/ G. Dinescu, B. Mitu, E. Aldea, M. Dinescu. Vacuum, 2000, vol. 56, pp. 83-86.
/13/ T. Vrlinic, C. Mille, D. Debarnot, F. Poncin-Epaillard. Vacuum,
2009, vol. 83, pp. 792-796. /14/ S. V. Vladimirov, K. Ostrikov. Physics Reports, 2004, vol. 393, pp. 175-380.
/15/ F.L. Tabarés, D. Tafalla, B. Bra as, E. de la Cal, I. García-Cortés, T. Estrada, I. Pastor, J. Herranz, E. de la Luna, F. Medina. J. Nucl. Mater. 2001, vol. 290-293, pp. 748-752. /16/ E. de la Luna, I. García-Cortés, V. Tribaldos, F. Tabarés, J.A. Jiménez, T. Estrada, E. Ascasíbar, A. Cappa, F. Castejón, A. Fernández, J. Herranz, K. Likin, A. López-Fraguas, R. Martín, K. McCarthy, I. Pastor, J. Sánchez, D. Tafalla, B. Zurro and TJ-II Team. Fus. Enign. Design., 2001, vol. 53, pp. 147-151. /17/ M. Mozetic. Surf. Coat. Technol. 2007, vol. 201. pp. 4837-4842.
/18/ S. Bockel, T. Belmonte, H. Michel, D. Ablitzer. Surf. Coat. Technol., 1997, vol. 97, pp. 618-625. /19/ T. Czerwiec, J. Gavillet, T. Belmonte, H. Michel, A. Ricard. Surf.
Coat. Technol., 1998, vol. 98, pp. 1411-1415. /20/ M. Balat-Pichelin, A. Vesel. Chem. Phys., 2006, vol. 327, pp. 112-118.
/21/ T. Belmonte, S. Bockel, H. Michel, D. Ablitzer. Surf. Coat. Technol., 1999, vol. 112, pp. 5-9.
/22/ A. Ricard, C. Jaoul, F. Gaboriau, N. Gherardi, S. Villeger. Surf. Coat. Technol., 2004, vol, 188-189, pp. 287-293.
/23/ U. Cvelbar, M. Mozetic. Vakuumist, 2007, vol. 27, pp. 24-33. /24/ J. D. Swift, M. J. R. Schwar. Electrical Probes for Plasma Diagnostic, Iliffe Books, London 1969.
Alenka Vesel*, Miran Mozetic
Jozef Stefan Institute, Jamova cesta 39, 1000 Ljubljana, Slovenia
Marianne Balat-Pichelin PROMES-CNRS laboratory, Font-Romeu Odeillo, France
Corresponding author: Email: alenka.vesel.@ijs.si, Fax: +38614773440, Tel: 38614773502
Prispelo: 05.05.2010	Sprejeto: 03.03.2011
21
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
A NEW TEMPERATURE COMPENSATED CURRENT CONTROLLED CONVEYOR
Sezai Alper Tekin, Hamdi Ercan, Mustafa Alçi
Engineering Faculty, Dept. of Electrical and Electronics Engineering,
Erciyes University, Turkey
Key words: Conveyor, Temperature Compensation, Circuit, SPice Simulation
Abstract: A simple and effective temperature compensation scheme which generates approximately temperature-independent output current for a current controlled conveyor and its application to a current-mode oscillator is designed and introduced. The temperature sensitivity of the current controlled conveyors parasitic resistance is reduced by this new design. This proposed circuit includes two current conveyors and a translinear circuit. The circuits' theoretical analysis was carried out, and the performance of the block circuit was confirmed through PSpice simulation results. From the simulation results for applications of proposed circuit, we found that the circuit's temperature-dependence was reduced.
Novo temperaturno kompenzirano vezje CCCII
Kjučne besede: CCCII, temperaturna kompenzacija, vezje, SPice simulacija
Izvleček: V članku opišemo enostaven in učinkovit pristop k izvedbi tokovno krmiljenega in temperaturno kompenziranega vezja CCCII, kakor tudi njegovo uporabo pri izvedbi tokovno krmiljenega oscilatorja. Z novim pristopom znižamo temperaturno občutljivost parazitnih uporov CCCII. Opravili smo teoretično analizo vezja in potrdili funkcionalnost posameznih blokov s pomočjo PSpive simulacije. Iz rezultatov sklepamo, da smo vezju za to uporabo močno zmanjšali temperaturno odvisnost.
1. Introduction
Until recently, a current-mode circuit has been used as the main building block in circuit design. The fact that the gain-bandwidth product is fixed in voltage mode circuits and the slew rate is bounded are disadvantages in many electronic circuit applications. Because current-mode circuits have a number of positive characteristics, such as large bandwidth, high slew rate, wide dynamic range, low power consumption, basic circuit structure and wide linearity, they are used widely in electronic circuit design, especially for oscillator and filter circuits /1-4/.
Current conveyors and related current-mode circuits have begun to emerge as an important class of circuits with properties that enable them to surpass their voltage-mode counterparts in a wide range of applications. A current-mode approach is not just restricted to current processing, but it offers important advantages when interfaced to voltage-mode circuits. The Current Controlled Conveyor (CCCII) which is electronically controllable by a biasing current has been employed in many applications /5,6/. CCCII has been used as a part of filters, oscillators, multipliers and many current-mode applications that require temperature compensation /6-8/. Parasitic resistance is essentially a disadvantage in electronic circuits. But it is used to advantage in current controlled conveyor circuits because it can be easily controlled by biasing current. Output current is negatively affected by the temperature dependence of this resistance /9/. This resistance is directly proportional to
thermal voltage for bipolar technology /10/ and surface mobility (p) for CMOS technology /11/. This means that the characteristics of the current controlled current conveyor-based circuits will depend strongly on the absolute temperature. Also the MOS transconductance parameter is affected by a strong dependence on temperature /12/. Therefore, a technique for temperature compensation is required. In a previous study /16/, a temperature compensated scheme for a translinear current conveyor-based circuit was investigated. This scheme had a disadvantage because it includes a resistor as a passive component. Also the temperature coefficient of the resistor was neglected in that work /16/. Until now, it is not shown that temperature compensated CCCII is used some where else.
In this study, a new circuit building block which consists of two CCCIIs and a translinear circuit block was designed for temperature compensation. The new building block, called the temperature compensated current controlled conveyor (TC-CCCII) has no passive component. Parasitic resistance's temperature dependence is eliminated, so that temperature compensation can be provided for the output current of the current conveyor. To demonstrate the proposed circuit's easy applicability it was used in a CCCII-based oscillator. The circuits' theoretical analysis was carried out, and the simulation process was realized using a PSpice electronic circuit simulation program. Simulation results verify the theoretical considerations.
22
S. A. Tekin, H. Ercan, M. Algi:
A new Temperature Compensated Current Controlled Conveyor
Informacije MIDEM 41(2011)1, str. 22-26
2. Current controlled conveyor
A conventional current controlled conveyor is given in Fig. 1. Port characteristics of the current controlled conveyor are given in (1) /14/.
(1)
Fig. 1. Conventional CCCII; (a) Symbol, (b) Circuit diagram
When port Y of the CCCII is grounded and port X constitutes the input of the circuit (Fig. 1), the input current is then given by

(2)
In CCCII based circuits, realization methods take advantage of the parasitic resistance Rxthat appears at port X of the conveyor. Hence, the resistance Rx, which can be varied by means of an external bias current. From (2), if Vx < < VT is assumed, then the function sinh (Vx/VT) is approximately equal to Vx/VT. The expression for this equivalent resistance is

(3)
where VT is the thermal voltage given by kT/q and I0 is an external bias current /9/. This means that the characteristic of the current conveyor based circuits will depend strongly on temperature. Therefore, some form of temperature compensation is required. The relation between ports X and Y can be modeled as shown in Fig. 2.
Fig. 2. Equivalent circuit between ports Y and X
3. Proposed circuit topology
Fig. 3 shows symbol and schematic diagram for the proposed temperature compensated current controlled conveyor (TC-CCCII).
Fig. 3.
Proposed TC-CCCII; (a) Schematic diagram, (b) Symbol
The temperature compensated current controlled conveyor was designed using two current conveyors and a translinear (TL) circuit block based on translinear principle.
Currents I01, and I02 denote bias currents for the first and second current conveyors, respectively, and VS is an external voltage. Fig. 4 shows the circuit structure of the TC-CCCII.
When port X of the first CCCII (X1) is grounded and port Y of the first current conveyor (Y1) constitutes the input of the proposed circuit, the output current of the first current conveyor (IZ1), which is equal to current that exists at port X of the first current conveyor, can be expressed as
Vs

(4)
It is shown that output current IZ1 of the first current conveyor depends on the voltage V applied to port Y1 and the bias current of the first current Sconveyor (I01) in (4).
A translinear circuit is used as a current divider circuit to generate bias current for CCCII. This circuit is almost temperature-independent. This circuit is presented in Fig. 5.
The relations among the currents in this circuit are given in (5).
23
Informacije MIDEM 41(2011)1, str. 22-26
S. A. Tekin, H. Ercan, M. Alçi:
A new Temperature Compensated Current Controlled Conveyor
-

(5)
where I02 is the bias current of the second current conveyor aiming at providing temperature compensation. As shown in Fig. 4, I1 and I2are the collector currents of the QBand QC transistors respectively. The current of the second current conveyor's port X can be expressed as
V
— (6) Vr
In this case, the current of the second current conveyor's port X will be
Current mirrors which are obtained by Q10, Q12and QB, Qc transistors allow the biasing current (I01) to flow through the Q13 transistor at the collector of the QBand QC transistors. So I1 and I2 currents are equal to curre nt I01. From (7), we can see that the parasitic resistance of the second current conveyor can be expressed as,
1=21 —s' * z102 - -

(8)
The parasitic resistance Rx input current Ixand output current Iz of the whole circuit can be independent from VT by adjusting the suitable configuration of the circuit blocks.
Fig. 4. Realization of the TC-CCCII circuit 4. Simulation results
To verify the validity of the theory, the circuits in Fig. 1 and Fig. 4 were simulated using models for the transistors of type NR100N and PR100N whose parameters are detailed in /15/. The biasing current I0= 85 |jA , that is, Rx=150 W was used for the conventional current conveyor. The circuit parameters were chosen as I01=100 jA and VS= 15 mV for the temperature compensated current conveyor, and the power supply was ± 2.5 V.
First, a simulation of the conventional current conveyor shown in Fig.1 was realized using a PSpice simulation program. Port Y of the CCCII is grounded and port X constituted the input of the circuit. The I-V characteristic at port X for different temperature values are shown in Fig. 6.
From (1), IZis equal to IX. Thus, from Fig. 6 it is concluded that IZis affected by temperature change.
Fig. 5. Translinear circuit
150
100
50
a o
-50
-100
-150
							
							
							
							
					—	0 °c 30	
w					m	60 °C 90 1C	
-20 -15
-10
-5
10
15
20
V*tmV)
Fig. 6. Current-voltage characteristics of the CCCII without temperature compensation
Next, a simulation of the temperature compensated current conveyor was realized using a PSpice simulation program. Port Y of the second CCCII was grounded and port X of the second CCCII constituted the input of the circuit. The I-V characteristic at port X for different temperature values are shown in Fig. 7.
150
100
50
a o
-50
-100
-150
							
							
							
							
					•	o °c 30 °C	
						M °C 00 "C	
-20 -15
-10
-5
10
15
20
Vx(mV>
Fig. 7. Current-voltage characteristics of the TC-CCCII
In Fig. 7, it is clear that the output current for different temperature values changes in regard to nanoampers. These values are almost negligible. In addition, when Fig. 7 is taken into consideration, it does not show a characteristic deviation in the origin, on the contrary in Fig. 6. Characteristic deviation in the origin is caused by a mismatch
24
S. A. Tekin, H. Ercan, M. Alçi:
A new Temperature Compensated Current Controlled Conveyor
Informacije MIDEM 41(2011)1, str. 22-26
between the transistors. This situation clearly denotes that the proposed circuit is more stable.
Fig. 8 depicts changing output current versus temperature for both the conventional and the temperature compensated CCCII's output current.
Fig. 8. Variation of the output currents versus temperature for CCCIIs
When the current curve of the conventional CCCII in Fig. 8 is considered, it can be seen that the characteristic is not exactly linear. This result is an obvious consequence of the hyperbolic function in (2). In previous studies /14/, this hyperbolic function was approximately linearized. Thus, the characteristic of CCCII output was obtained in linear form.
5. Current controlled oscillator based on cccii
The oscillator was designed using a current amplifier (current mirror) and two TC-CCCIIs as shown in Fig. 9.
The current loop gain or the return ratio T(s) of the circuit at port X is characterised by
aR.QS
T(s) - -
(9)
1+2RIC1S+2RrC,C7S
CCCII has a finite input resistance RXat the X terminal, which is controllable by the bias current I0/ 16/. RXis considerably affected by temperature. Sinusoidal oscillation frequency is shown in the following equation
1 _
(10)
2 fdQcfij

where the oscillation condition is a = 2 /16/. Oscillation frequency can be tuned by varying the Rx. The current mirror in Fig. 9 is independent from temperature, so oscillation frequency is not affected under this condition. Table 1 depicts a theoretical changing RXand oscillation frequency versus temperature for the conventional CCCII.
Fig. 9. Proposed current controlled oscillator schematic diagram
In Table 1, it is clear that Rxand oscillation frequency for different temperature values change. Biasing currents were chosen as I0 = 250 |jA for conventional CCCIIs.
Table 1. Theoretical changing R and oscillation frequency versus temperature for the conventional CCCII.
To demonstrate the applicability of the new temperature compensated CCCII, it was used in place of a conventional CCCII to realize temperature compensation in the current controlled oscillator.
To evaluate the performance of the circuit in Fig. 9, several PSpice simulations have been performed using the typical parameters of the bipolar transistor NR100N and PR100N whose parameters are detailed in /15/. A biasing current I0 = 250 jA, that is, Rx= 50 W was used for the conventional current conveyor.
Circuit parameters were chosen as I01 = 75 jA and VS= 15 mV for the temperature compensated current conveyor in Fig.4 and the power supply was ± 2.5 V. C1 and C2were 0.01 jF for all simulations.
Simulation results are shown in Fig. 10, which displays current amplitude against frequency for a number of temperatures for the current controlled oscillator based on a conventional CCCII. This graph was obtained from an oscillator circuit using conventional CCCII.
Fig. 10. Unstable oscillation frequency at different
temperatures for oscillator based on conventional CCCII.
25
Informacije MIDEM 41(2011)1, str. 22-26
S. A. Tekin, H. Ercan, M. Alçi:
A new Temperature Compensated Current Controlled Conveyor
In Fig. 10, it is clear that, the oscillator's oscillation frequency is strongly affected by temperature change. The oscillation frequency of the circuit changes between 265 KHz - 340 KHz.
Fig. 11 shows stable oscillator frequency at different temperature values for the current controlled oscillator based on the temperature compensated CCCII. This graph was obtained from an oscillator circuit using the TC-CCCII.
									0"C 30 "C 60 *C «0 "C	
										
										
					L					
220 240 260 280 300 320 340 360 380 400 Frequency (KHz)
Fig. 11. Stable oscillation frequency at different
temperatures for oscillator based on TC-CCCII.
It is clear that the temperature performance of the compensation circuit is much better than that of the conventional circuit. In addition, it can also be seen that the compensated circuit results in a much lower temperature sensitivity.
6. Conclusion
In this study, a temperature compensated circuit for conventional CCCIIs was designed, and its application to a current-mode oscillator was tested. The temperature sensitivity of the current controlled conveyor's parasitic resistance was reduced in this new design. The proposed circuit was simulated using a PSpice simulation program, and its simulation results were compared with the simulation results of a conventional CCCII. The compensated circuit was less temperature sensitive than conventional circuits. However, the proposed circuit was found to be suitable for implementing in integrated circuits due to its having no passive element. To demonstrate the applicability of the new temperature compensated CCCII, it was used in place of a conventional CCCII to realize temperature compensation in a current controlled oscillator. Finally, the proposed circuit which is controllable by biasing current was used as a part of many sensitive current-mode applications that especially require temperature compensation.
/3./ Siripruchyanun JM, Jaikla W. Current controlled current conveyor transconductance amplifier (CCCCTA): a building block for analog signal processing, Electrical Engineering (Archiv fur Elektrotechnik), Electrical Engineering, Springer 2008; 90(6) : 443-453.
/4./ Cam U. A New Transadmittance Type First-Order Allpass Filter Employing Single Third Generation Current Conveyor. Analog integrated circuits and signal processing 2005; 43 : 97-99.
/5./ Yuce HE, Minaei S, Cicekoglu O. Resistorless floating immittance function simulators employing current controlled conveyors and a grounded capacitor. Electrical Engineering (Archiv fur Elektrotechnik) 2006; 88(6) : 519-525.
/6./ Kiranon W, Kesorn J, Sangpisit W, Kamprasert N. Electronically tunable multifunctional translinear-c filter and oscillator. Electronics Letters 1997; 33 (7) : 573-574.
/7./ Minaei S, Turkoz S. New current-mode current-controlled universal filter implemented from single-output current controlled conveyors. Frequenz 2000; 54 (5) : 138-140.
/8./ Cicekoglu O, Kuntman H, Berk S. Allpass filters using a single current conveyor. International Journal of Electronics 1999; 86 (8) : 947-955.
/9./ Fabre A, Saaid O, Wiest F, Boucheron C. High frequency applications based on a new current controlled conveyor. IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications 1996; 43 (2) : 82-91.
/10./ Fabre A. Bidirectional current controlled PTAT current source, IEEE CASI 1994; 41 : 922-925.
/11./ Adachi T, Izumiya S. A MOS temperature compensation function generator for TCXO using differential MOS multipliers. IEEE International Frequency Control Symposium Joint with the 22nd European Frequency and Time Forum 2009; 990-993.
/12./ Mahmoud, S. A low voltage CMOS floating resistor. IEEE International Conference on Electrical, Electronic and Computer Engineering 2004; 453-456.
/13./ Surakampontorn W, Riewruja V, Kumwachara K, Fongsamut C. Temperature compensation of translinear current conveyor and OTA. Electronics Letters 1998; 34 (8) : 707-709.
/14./ Fabre A, Alami M. Universal current mode biquad implemented from two second generation current conveyors. IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications 1995; 42 (7) : 383-385.
/15./ Frey DR. Log-domain filtering: an approach to current-mode filtering. IEE Proceedings G, Circuits, Devices and Systems 1993; 140(6):406-416.
/16./ Kiranon W, Kesorn J, Wardkein P. Current controlled oscillator based on translinear conveyor. Electronics Letters 1996; 32 (15) : 1330-1331.
Sezai Alper Tekin, Hamdi Ercan, Mustafa Alg\ Engineering Faculty, Dept. of Electrical and Electronics Engineering, Erciyes University, Turkey satekin@erciyes.edu.tr, hamdiercan@erciyes.edu.tr,
malci@erciyes.edu.tr
7. References
/1./ Palmisano G, Palumbo G, Pennisi, S. CMOS Current Amplifiers.
Kluwer Academic Publishers: Boston (MA), 1999;1-9. /2./ Schmid H. Approximating The Universal Active Element. IEEE Transaction on Circuit Systems-II:Analog and Digital Signal
Processing 2000; 47(11) : 1160 - 1169.	Prispelo: 26.01.2010	Sprejeto: 03.03.2011
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
SIMULATION OF TACTICAL NETWORKS USING SYSTEM-OF-THE-LOOP
Matjaž Fras1, Jože Mohorko2, Žarko Čučej2
1Margento R&D, Gosposvetska cesta 84, Maribor, Slovenia 2University of Maribor, Faculty of Electrical Engineering and Computer Science,
Maribor, Slovenia
Key words: tactical network, simulation, system-in-the-loop, C2IS, real-time
Abstract: The successes of military missions strongly depend on quality planning. The need for near-real time simulation tools has become apparent, which allows the realistic network planning and training of command personnel on real Command and Control Information Systems (C2IS). Real hardware and C2IS software are, in these cases, connected to the simulator via a Local Area Network, where the tactical radio communication infrastructure is simulated on a virtual terrain. Such simulation of the network runs real-time with the simulated use of the C2IS. Operators of C2IS systems can simultaneously evaluate the qualities of tactical networks from the points of view of network throughput, end-to-end delays, radio visibility, etc., for each individual tactical unit. This paper presents some simple examples of using this new simulation methodology, which can be easy adapted to more complex C2IS scenarios.
Simulacija taktičnih omrežij z realnim sistemom v
simulacijski zanki
Kjučne besede: taktična omrežja, simulacija, sistem v simulacijski zanki, C2IS, realni čas
Izvleček: Uspeh vojaških akcij je v veliki meri odvisen od kakovostnega planiranja le teh. V zadnjem času se je pojavila potreba po simulacijah taktičnih omrežij v realnem času, ki omogočajo realistično načrtovanje operacij in trening povelniškega osebja na realnem informacijskem sisemu poveljevanja in kontrole (C2IS). Za te namene se je razvil nov tip simulacij, ki omogoča povezavo realne strojne in programske opreme s simulacijskim orodjem. Simulaci-jsko orodje je namenjeno simulaciji virtualnega terena na katerega postavimo omrežje ter simulacijo povezav ali omrežij, preko katerih poteka komunikacija med realnimi napravami, ki jih priključimo na simulator. V članku predstavljamo simulacijo taktičnih omrežij z realnim sistemom v simulacijski zanki, ki je bila namensko razvita za Slovensko vojsko. V takšnem sistemu smo povezali realni informacijski sistem poveljevanja in kontrole (C2IS) s simuliranim taktičnim radijskim omrežjem na virtualnem terenu. V nadaljevanju smo predstavili različne ekperimente in simulacijske rezultate, kot je prenos digitalnega videa preko simulirane radijske povezave, ter rezultate simulacij v katere smo vključili realne naprave s programsko opremo informacijskega sistema poveljevanje in kontrole (C2IS) Slovenske vojske. S pomočjo takšnih simulacij lahko načrtovalci operacij ovrednotijo kakovost preiskušenih taktičnih omrežij na osnovi prepustnosti, radijske vidljivosti, zakasnitev, itd.
1. Introduction
Since joining NATO, Slovenia has had to face new challenges in terms of modernization and connectivity with other members. In 2001, the Multilateral Interoperability Programme (MIP) was established to advocate successful and harmonized operational functions for international peace-keeping forces /1/. Interoperability is achieved by C2IS (Command and Control Information Systems) at all military levels. C2IS is designed to control the operational, logistical and communication information stored in the C2IEDM (Command and Control Information Exchange Data Model) data bases. The success of this command and control system is highly correlated with the capacities of the data information carriers.
Most of the developed tools for tactical network simulations are "off-line" simulation tools, where we can analyze a tactical network after a simulation run. The most prominent problems in tactical networks are limited bandwidth, big round-trip delays, and the influence of terrain and nodes' mobility under radio link conditions /2/. Simulation of
tactical networks is an important task in the process of military mission planning. Such methodologies assure a higher probability of success for critical tactical operations in military arenas. One of the early papers about tactical radio systems' simulation presented a solution /3/, where a specialized FORTRAN program was developed to simulate radio propagation effects, interference, SNR etc. The most often used simulation tool is the OPNET Modeler /4/ which is also used as a basic tool in our work. The results of tactical network simulations can be used when evaluating the performances of tactical communication networks /5/. Two-well known tools have been developed specifically for military tactical network simulations based on OPNET. The first tool is NETWARS /6, 7, 8/, which enables simulation of different tactical simulation scenarios by using diverse combinations of tactical network devices and military concepts. The second tool is INCOT, which represents an intelligent specialized tool for the optimization of communication networks /9-11/. In our case we have developed new simulation methodologies and tools for "off-line" analysis that enable C2 (Command and Control) communication systems' optimization /6-18/. We have de-
27
Informacije MIDEM 41(2011)1, str. 27-36
M. Fras, J. Mohorko, Z. Cucej:
Simulation of Tactical Networks Using System-of-the-Loop
veloped the helper application TPGEN (Slovenian acronym for Tactical Information Traffic Generator), which enables user-friendly entering and editing of tactical network parameters to an OPNET simulation data model /15/. We have also developed an expert system application, which enables automatic analysis of OPNET simulation results /17/, and a tactical player visualization tool which combines MAK 3DNV (3D network visualization) simulation records with the results of expert system application /18/.
Over recent years the new concept of »on-line« tactical network simulation has also appeared where simulation is executed in "near-real" time. One of the earlier near- realtime simulators with a military application is the Battlespace communication network planner and simulator /19, 20/. This simulator is based on the OPNET simulation tool, where special communication hardware and software interfaces were developed that allow interconnection with actual command and control (C2) systems. In contrast to what we have described, we have also developed our real time simulator using OPNET with its System-in-the-loop (SITL) module which allows connections between real devices and the simulation. In this case, special communication devices are no longer needed. The SITL module provides packet translation between real and simulated packets /21/, where we show the basic concept of SITL simulations for simple voice application.
This paper presents a simple near real-time simulations example of tactical networks, where the real C2IS equipment of tactical units is connected through the simulator. The developed simulation system enables the testing and training of different tactical missions in a lab-environment, where the radio part of a wireless tactical network is simulated by an OPNET Modeler simulation tool. Within the simulated tactical communication infrastructure we can define radio parameters, position, trajectories of movement, etc., according to real radio equipment, and the mission plan. Radio wave propagation models based on virtual terrain modeling are used in simulation. During the simulation run, tactical planners and operators can analyze situations when a long delay appears, units have lost radio visibility, or lost the connection or data. Such a simulator enables early predictions of any possible problems that may appear during a real mission. In such a way, simulation tool can improve the probability of mission success, depending also on C2IS being dramatically improved. This new simulation methodology, presented in this paper, can be easy adapted to more complex C2IS scenarios, which is schematically shown in Figure 1. This figure shows schematic of connections between real tactical units, equipped with C2IS, and a simulator. External units are connected to the hub, which is connected to the physical interface (NIC) of the computer, where the simulator is installed. In the simulator the external connected units are represented as tactical wireless radio devices. On these modeled wireless stations, planners can set different parameters, such as channel frequency, bandwidth, antenna pattern, etc.
Fig. 1: LAN connections between real tactical units and the simulator, where the tactical radios of tactical units are modeled on virtual terrain.
This paper is organized as follows. The second section briefly describes the command and control information system (C2IS) used by the Slovenian Army. The third section describes advanced methods of OPNET Modeler for near-rear-time simulations. Two examples of near real-time simulations are presented in the fourth section. The first example presents the transmission of a video stream over the simulated wireless link. The second example presents the simulation, using real C2IS software. This section also presents the simulation results for both cases. This paper concludes with some guidelines for future work.
2. Command and control
communication system in the Slovenian army
Command and Control Information System (C2IS) (TISPINK is the Slovenian acronym) is designed to control the operational, logistical and communication information stored in the operation data bases (C2IEDM/JC3IEDM). The C2IS system provides information about operational developments, the state of your own, other friendly, and hostile units. This information is very important for modern international military operations and for the successes of many international operations. Figure 2 shows the main structure of the TISPINK unit. The core of the TISPINK system represents two main programs developed by a Danish company Systematic Software Engineering A/S /22/, in accordance with MIP recommendations. These programs are IRIS replication mechanism (IRM) and Sitaware. The IRM program /23/ is responsible for data exchange (replications) between the C2IS data bases of military subjects in accordance with so-called agreements. Agreements, which are set between the subjects, are comprised of the
28
M. Fras, J. Mohorko, Z. Cucej:
Simulation of Tactical Networks Using System-of-the-Loop
Informacije MIDEM 41(2011)1, str. 27-36
addressee of the military unit, the collection of data to be shared, and of used communication protocol (peer-to-peer or broadcast). This replication mechanism enables flexible control and supervision over information exchange in tactical networks.
The Sitaware program packet /24/ is a graphic interface of the command and control system. It is used for the planning, checking and analyzing of tactical units' activities on the battlefield. It enables the operators or planners of the operations to ascertain information about the situations of individual units in the field, and share this information with other military units. Sitaware is distinguished by a powerful graphical interface which is supported by GIS (Geographical Information System). GIS in turn, supports various geographical map formats and has different user layers thus enabling the entering of different information about tactical conditions on the battlefield.
TISPINK- UNIT
SITAWARE
Fig. 2: TISPINK army unit
Figure 2 shows C2IS typical tactical unit. Each unit has its own C2IEDM data base, IRM replication mechanism and Sitaware. Various sensors can be connected to the tactical units, such as GPS. TISPINK units compose the hierarchical tactical network, as shown in Figure 3, where units can communicate by inferior and superior units based on defined IRM contracts, which are described in more details in /14/.
3. Advanced modules for tactical simulator in real time
3.1 OPNET Modeler
The developed tactical network simulation system for near real-time simulations is based on OPNET simulation tool /4,
UNIT COMUANDC«
Fig. 3: Hierarchical structure of tactical network
6, 7, 8, 14/. We used the OPNET Modeler Wireless Suite for Defence, which supports high-fidelity protocols and equipment models with a scalable simulations environment capable of simulating wireless and also wired networks. It supports wireless simulations incorporating terrain influences in path-loss calculations with different propagations models, mobility, and 3D visualization.
OPNET Modeler is an object-oriented event driven communication simulation tool, with a hierarchical modeling environment, which uses graphic user interfaces (editors)
-	Network, Node and Processes editors. The Network editor enables a graphical description of network topology, while a Node Editor is used for describing communication device protocols and connections between them using layers of the ISO/OSI model. The Process editor is an upgrade of language C and uses a powerful finite state machine (FSM) approach to represent different communication algorithms and protocols. The OPNET Modeler is used for the modeling and simulation of communication networks and, at the same time, enables construction and study of communication infrastructure, individual devices, protocols, and applications.
3.2 System-in-the-loop module
System-in-the-loop (SITL) /4, 21, 33/ is an OPNET Modeler program module, which provides an interface between physical and simulated networks. It provides packet exchanges between real and simulated communication devices. SITL gateway represents an external device by which the simulation exchanges the packets, where the WinPcap /35/ library is used to route those packets selected by user defined filter, from an Ethernet network adaptor to the simulation process. In such a simulation manner, physical hardware and simulation can interact as a unified system. There are three main simulation topologies for using the SITL module /33/:
-	real-to-real (communication between real devices over simulated network)
-	sim-to-sim (communication between simulated devices over real network)
29
M. Fras, J. Mohorko, Ž. Čučej:
Informacije MIDEM 41(2011)1, str. 27-36	Simulation of Tactical Networks Using System-of-the-Loop
- sim-to-real (communication between real and simulated devices)
SITL module is used for near real-time simulations and can be used for many different purposes, such as: testing the effect of a simulated network on a real application, simulating the impact of network traffic amount to real network generating in simulation using a traffic generator, testing new prototypes of newly-developed devices and protocols, testing the performances of new protocols being developed by driving real network traffic over simulated traffic, etc. Simulated models running in the OPNET Modeler affect real applications and devices, providing various network effects, such as packet loss, delay, jitter, duplicate delivery, etc.
Using the module SITL we achieved packet exchanges using discrete event simulation via mapped interfaces. It also allows for multiple interfaces for mapping different network addresses in the simulated network. The SITL module directly routes packets from the network adapter to the simulation, and translates the entire packets, but the IP datagram stays unchanged in the regard to the rest of the simulation. Figure 4 shows the real-sim-real case of SITL simulation.
Fig. 4: Example of real-to-real type of SITL simulation, where real devices (client and server) communicate through a simulated network consists from routers.
In the OPNET Modeler 14.0 together with the SITL module support the following protocols /33/:
Ethernet
-	IPv4 and IPv6 (except for fragmentation)
-	Higher layer protocol conversion (real-sim-real, sim-real)
-	ICMP, ICMPv6
-	OSPFv2
-	RIPv1 and RIPv2
-	TCP, UDP
-	Limited FTP standard model application support
-	Users can add support for their own protocols
When developing our own protocols, we wrote our own translation function (SITL translation function) to convert simulation packets to real packets, and vice versa. In the case of real-sim-real simulation, virtually all application-layer protocols are supported because, in this case, the simulation network is only used as a transit network for IPv4 or IPv6 packets.
3.3 3DNV
A 3D Network Visualizer (3DNV) /18, 21, 34/ is an additional OPNET Modeler module, which enables 3D animation simulated network topology, network devices, and link status. It can be used for visually demonstrating how terrain features, such as hills and mountains interfere with the wireless communication devices of mobile networks. Visual presentation can also be enhanced by network statistics, such as received packets, transmission quality, throughput, delay, message status information, etc. The communication devices used in the OPNET Modeler can be visualized in 3DNV by many different 3D objects, which are stored in a library of 3D models (cars, planes, ships, tanks, etc.). Figure 5 shows an example of communication unit visualization in 3DNV. 3DNV allows viewing animation of the whole network or just one or a few units, from any perspective. It also allows viewing animation of unit movement by predefined trajectories from different viewing angles at different altitudes. A set of 3D animation configuration objects used in animations are also included, as are lines between nodes which represent packets transmission, spheres to represent the transmitter's range, and numbers which represent the simulation results.
Fig. 5: An example of communication unit visualization by 3D Network Visualizer (3DNV)
3.4 Wireless package
The OPNET Modeler Wireless package is flexible and a scalable environment for the modeling and simulation of wireless networks /25, 26/. All the characteristics of wireless networks are integrated into lower layer protocols, which enables the modeling of all viewing points regarding wireless transmission, such as the spreading of RF electromagnetic waves /27/ by considering ground impact to the diffraction, fading, interferences, characteristics of the receiver and transmitter, nodes mobility, etc. OPNET allows efficient development of various wireless communication technologies such as MANET, 802.11, 3G/4G, Ultra Wide Band, WiMAX, Bluetooth, Satellite links /25, 26, 28/. In OPNET, wireless package wireless links between transmitter and receiver are simulated by using an open-concept called a transceiver pipeline. The transceiver pipeline
30
M. Fras, J. Mohorko, Z. Cucej:
Simulation of Tactical Networks Using System-of-the-Loop
Informacije MIDEM 41(2011)1, str. 27-36
enables delay computations during the spreading of radio waves, closing radio links, consideration of an aerial's emissive diagram, background noise, modulation effects, interference, bit-error rate, forward error corrections, etc.
3.5 Terrain modeling module (TMM)
The Terrain Modeling Module (TMM) is a special OPNET module which enables improvement in the accuracy of the wireless network simulations, by taking into account signal loss due to terrain effects. They include the impact of natural barriers on simulations (mountains and the earth's curvature) and the physical characteristics of the environment (conduction, permeability, surface refractivity) spreading of radio waves. TMM supports various propagation models:
A free space propagation model /29/ using the theory of spreading electromagnetic waves in an ideal vacuum. This model does not use terrain effects or any other physical limitations.
Longley-Rice model /30, 31/, also known as Irregular Terrain Model (ITM), is a more accurate propagation model of radio waves spread, as a model of optical visibility (LOS). It is used within frequencies ranging between 20 MHz and 20 GHz. It was originally developed for television transmission in 1960's.
The TIREM model /32/ is the most detailed, with the fewest limitations. It is used within a frequency range between 1 MHz and 40 GHz. It also includes effects such as multiple diffraction on edges and barriers, reflections from the troposphere, absorption in atmosphere, surface guiding of waves because of ground conductance, troposphere dispersing, long-term fading etc. It is one of the best choices for use in models of non urban terrain.
Virtual terrain is modeled by using DTED (Digital Terrain Elevation Data) and USGS (U.S. Geological Survey) DEM (Digital Elevation Model) maps. Figure 6 shows a terrain profile between the transmitter and receiver, and an estimation of the received power for different propagation models.
4. Tispink system simulation in real time
We used the real-sim-real type of SITL simulation, where real C2IS equipment communicates through a simulated wireless environment. Figure 1 shows the basic connections between tactical units and the simulator. This is more detailed in Figure 7 which shows configuration of our test simulation scenario. Here, two real TISPINK tactical units are connected to the hub. On each of these TISPINK units we define IP addresses, gateway, disabled firewall, etc. The hub is also connected to the physical interface (NIC) of the computer, where OPNET simulation tool is installed. On this computer we must also set IP addresses, gateways, disabled firewall, etc. It is important that each of tactical the unit is from a different subnet. In other cases they will communicate directly across the hub and not to over the OPNET simulator.
In the simulation environment we modeled the tactical radio equipment on virtual terrain, as shown in Figure 7, where tactical radios are labeled as simulated units (Unit 1 and Unit 2). Externally connected real tactical equipment serve as traffic sources and sinks. Modified real packets of TISPINK application run through simulation, where the SITL gateway translates real packets to simulation packets, and vice versa.
Fig. 6: Terrain profile with calculation of radio signal power between transmitter and receiver by using different propagation models.
Fig. 7: Topology of test network for data transmission between real Unit 1 and Unit 2 over simulated wireless link.
In the OPNET Modeler, we created a model of tactical radio for the purpose of simulations in near real-time, as shown in Figure 8. It consists of three devices: SITL gateway (node_2), SITL link, and wireless router as tactical radio model (node_1). SITL gateway translates packets between simulated and real communication equipment. Using its attributes, it can configure a filter that defines which packets from which network interface card will be imported or exported via the SITL gateway. Using the wireless router we can define the tactical radio's attributes such as the transmitter's power, receiver's sensitivity, channel frequency, types of modulations, types of antenna, etc.
31
Informacije MIDEM 41(2011)1, str. 27-36
M. Fras, J. Mohorko, Z. Cucej:
Simulation of Tactical Networks Using System-of-the-Loop

Fig. 8: Model of tactical radio device for SITL simulations: connection between SITL gateway and wireless router with SITL link
4.1 Video over simulated wireless link
In this example, of near real-time simulation, we show the transmission of video stream over the simulated wireless link. Figure 7 illustrates the topology we used in our experiments with the exception that we did not use any special C2IS on the tactical unit stations. The simulation scenario on the OPNET Modeler's side is shown in Figure 9, where the radio equipment of Units 1 and 2 are located at certain positions on the virtual terrain. Unit 1 (video stream receiver) represents the fixed node. Unit 2 (video stream transmitter) is the mobile unit, which moves by a predefined trajectory, as shown in Figure 9.
Fig. 9: Simulation scenario in OPNET Modeler, where tactical units are located at certain position on the virtual terrain. Unit 1 presents the fixed tactical unit, Unit 2 presents the mobile tactical units, which moves during the simulation run along a predefined trajectory.
The speed of unit movement is 60km/h. The radio equipment of both units act as wireless 802.11g devices with channel capacity of 54Mbps. Virtual terrain is defined by
using a DTED Level 2 elevation map with 30m resolution. For a propagation model we chose TIREM. With these requirements we can ensure the best possible realistic transmission of live video stream over simulated wireless link. We used the well known VLC media player - the cross-platform media player and streaming server as video streaming equipment. It can be used for unicast or multicast streaming in IPv4 or IPv6 high-bandwidth networks for various audio and video formats (MPEG-1, MPEG-2, MPEG-4, DivX, mp3, etc.). Both tactical computer workstations are connected to the Ethernet network interface card (NIC) of simulation computer over hub (Figure 7). Such a kind of connection is possible in the case, where the external computers (Unit1 and Unit 2) have network IP addresses from different subnets; otherwise, communication between them would go directly over the hub and not over the simulation process. Multiple network interface cards are needed (one NIC for each external computer) to support such configurations, where both external computers have IP addresses from the same subnet.
During a near real-time simulation run, we can observe video signal on the real transmitter and receiver. For video source at the transmitter side, we chose the AVI movie. Real packets of a test movie video stream were transmitted through the simulated wireless link, which is affected by simulated conditions such as distances, radio visibility, etc. During simulation runs we could see that, over some time intervals, we lost some packets and errors appeared in received video signal. Sometimes the receiver lost the video signal for several seconds or for even longer periods up to 60 seconds. In these cases there was no radio visibility between receiver and transmitter. Figure 10 shows the examples of the captured video frames from transmitter (left) and receiver side (right) under various link conditions.
m
Fig. 10: Captured video stream on the transmitter (left side) and receiver (right side) for two cases. In the first case (upper figures) without packets lost and in the second case (lower figures) distortions appears on receiver caused by lost packets.
The graphs in Figure 11 represent the traffic of the transmitted video stream from Unit 2 (first graph) and received video
32
M. Fras, J. Mohorko, Z. Cucej:
Simulation of Tactical Networks Using System-of-the-Loop
Informacije MIDEM 41(2011)1, str. 27-36
stream from Unit 1 (second graph). On the second graph parts without received traffic and some additional peaks are noticeable some, which represent packets' repetitions in the conditions of the transmission errors on radio's visibility borders. Figure 12 shows the received power (first graph) and bit-error rate - BER (second graph) for the receiver (Unit 1). In those cases, where the receiver power is lower than the threshold (sensitivity), the receiver is unable to detect incoming traffic. On the radio visibility boundary, the S/N ratio increases what is visible through increasing BER. In those intervals, where radio visibility between receiver and transmitter is established, BER is almost equal to 0. In the intervals where radio visibility was almost lost, BER strongly increased. At these intervals the packet-rate of the received traffic is also increased, caused by packet repetitions, as can be seen on the second graph in Figure 11. BER was not calculated for intervals without radio visibility
Fig. 11: Comparison between sent traffic from Unit 2 (video transmitter) and received traffic by Unit 1 (video receiver).
4.2 Tispink system simulation in near realtime
In the second example, we used TISPINK applications (Sitaware and IRM replication mechanism) installed for tactical units Unit 1 and Unit 2, instead of video streaming application. Unit 1 is the role of the Battalion and Unit 2 represents the Brigade. Using the IRM user interface shown in Figure 13, we defined "peer-to-peer" contract between units Unitl and Unit 2. Traffic between these units was caused manually by sending and requesting management or the operational bulks of the IRM replication mechanism. In this simulation case we used the same topology (shown in Figure 8), as in the first example. We also used the same virtual terrain, the same predefined trajectory from Figure 9, and the same tactical radio parameters.
Fig. 12: First graph represents received power and biterror rate (BER) on receiver side (Unit 1).
Fig. 13: IRM application user interface at Battalion unit, where we sent and requested operational and management bulk during near-real time simulation.
We created two different scenarios for the OPNET simulation tool. In the first scenario the Battalion and Brigade units (Unit1 and Unit2) are stationary and between them is all the time-assured radio visibility. In the second scenario, Unit 1 is mobile along a defined trajectory and Unit 2 is stationary (Figure 9). In both scenarios, the network traffic is generated by sending and requesting operational and management bulks. In the first scenario, where radio visibility is assured, there are no communication problems during the replication process. From the simulation results (in Figure 14), we can see, that radio visibility between units in the first scenario is possible during all simulation runs. The receiver power at the Brigade tactical unit is almost the same (with some exceptions) during all simulation, and is above the receiver's threshold.
33
Informacije MIDEM 41(2011)1, str. 27-36
M. Fras, J. Mohorko, Z. Cucej:
Simulation of Tactical Networks Using System-of-the-Loop
In the second scenario, we repeated simulation when the Brigade was moving along a predefined trajectory (as in Figure 9). For the Battalion we sent and requested operational and management bulk, but at some intervals there are no response from the Brigade unit when connection was lost. In these cases, we cannot successful send management or operational bulks. At the moment when connection has been reestablished, replications of all data changes were accomplish during lost connection. In these cases a large amount of replication traffic appears. This is visible in Figure 15, which shows the sent traffic from the Battalion unit and received traffic of the Brigade unit, where there are some intervals within the range between 50 and 150 seconds, where radio visibility between units is unavailable.
Fig. 14: The first graph shows sent traffic of the Battalion tactical unit, the second graph shows received network traffic by the Brigade tactical unit and the third graph shows the received power of the Brigade unit. The threshold of the receiver is -12.5dB.
Graphs in Figure 16 shows the estimated values for received power and signal-to-noise ratio (SNR) of the Brigade unit, which can only be estimated in cases where connections between units are established. Figure 17 illustrates an example of the 3D Network Visualizer (3DNV) representation of the tactical network.
Fig. 15: The first and second graphs show the sent and received network traffic between tactical Unit 1 and Unit 2 for the second scenario.
Fig. 16: Received power and signal-to-noise (SNR) parameter for the Brigade.
Conclusions
This paper presents the development of near-real time simulation methodology, where real tactical units can communicate with each other over simulated wireless links. This methodology enables training and planning for tactical missions in laboratory environments. Such a simulator allows the testing of different action scenarios on virtual terrain and to evaluate tactical networks in the sense of network delay, congestion, data lost, etc. We show two different examples of real-time simulations. In the first scenario
34
M. Fras, J. Mohorko, Ž. Čučej:
Simulation of Tactical Networks Using System-of-the-Loop	Informacije MIDEM 41(2011)1, str. 27-36

►V
Fig. 17: Tactical network in 3DNV, where Unit 1
(Battalion) is represented as a tactical vehicle, Unit 2 (Brigade) with predefined trajectory on virtual terrain is presented as a combat tank.
we simulate the transmission of real video streams over a simulated wireless link. This is a typical broadcast application. In the second scenario we did simulation, where army units with C2IS applications were connected to the near-real time simulator.
A near-real time simulation of tactical networks is a novelty in the area of tactical network simulations. Such simulations help to predict how tactical networks will act on real terrain in real tactical situations. We can see, what happens if tactical units move on virtual terrain and lose radio contact. For such cases we can observe real application responses on real devices in the sense of traffic delay, losing connections, utilization, etc. Such kinds of results offer substantial help to the tactical mission planners and operators when evaluating tactical networks in real circumstances. This also allows operators and planners to optimally plan tactical missions in such a way, that as much as possible consider simulation results. It is also used for testing the effectiveness of different network topologies and protocol type's, such as peer-to-peer or broadcast. It can also be used for optimizing the amount of traffic between units defined by IRM contracts. Such kinds of simulations are also very important and suitable for the evaluation of new radio equipment before real purchase. It is also possible to evaluate communication parameters such as the necessary bandwidth of radio devices, power levels, antenna gains, etc. We can also carry-out tests with new C2IS software without the need for real tactical radio communication infrastructure. We also show, using two different application examples (video streaming and C2IS), that the presented simulation methodology does not depend upon the application type.
In future research, we would try to fully support this near-real time simulator for the Slovenian Army's needs. One very big problem appeared for the case when tactical units communicate with each other in a broadcasting manner, because the current version of SITL does not support wireless bridge to bridge communication functionality, which
is needed in this case. Another important goal is also the reading of certain information (units' positions for example) from units' C2IEDM database and importing that information to the simulator in the real time. For all the presented reasons, we can expect a wider use of such simulators and applications in the near future, which will help in the optimization of networks and in the development of devices and protocols in all fields of communications.
Acknowledgment
This work is part of the target research programme "Science for Peace and Security": M2-0140 - Modeling of Command and Control information systems, financed by the Slovenian Ministry of Defence.
References
/1/ Multilateral Interoperability Programme, http://www.mip-site. org/
/2/ V. Jodalen, A. Eggen, B. Solberg, O. Gronnerud, Military messaging in IP networks using HF links, IEEE Communications Magazine 42 (11), (2004) 98-104. /3/ W.C.Y Lee, H.L Smith, A computer simulation model for the evaluation of mobile radio systems in the military tactical environment, IEEE Transactions on Vehicular Technology 32 (2) 1983 177-190.
/4/ Opnet: http://www.opnet.com/products/modeler/home.html /5/ V.T.S Shi, "Evaluating the performability of tactical communications networks, IEEE Transactions on Vehicular Technology 53 (1) (2004) 253-260. /6/ Netwars: http://www.disa.mil/netwars/documentation.htm /7/ S.L. Ferenci, C. Alspaugh, "Efforts to Enhance Interoperability for Netwars", Proceedings of MILCOM 2004 - IEEE Military Communications Conference, 2004. /8/ W.S. Murphy Jr., M.A. Flournoy, Simulating crises communications, in: Proceedings of WSC2002 - Winter Simulation Conference, San Diego California, 2002. /9/ Incot: http://www.stottlerhenke.com/incot/ /10/ R.A. Richards, An Intelligent Tool for Network Configuration and Optimization, in: Proceedings of IEEE Aerospace Conference, Big Sky, Montana, 2003. /11/ R.A. Richards, T. Coskun, "Intelligent Network Configuration Optimization Toolkit (INCOT)", in: Proceedings of MILCOM 2004 - IEEE Military Communications Conference, Monterey, CA, 2004.
/12/ M. Fras, J. Mohorko, Z. Cucej, A new approach to the modeling of network traffic in simulations, Inf. MIDEM, mar. 2009, letn. 39, St. 1, str. 41-45. /13/ M. Fras, J. Mohorko, Z. Cucej, "Packet size process modeling of measured self-similar network traffic with defragmentation method", in: Proceedings of IWSSIP2008 Conference, Bratislava, Slovakia, 2008. /14/ J. Mohorko, M Fras, Z. Cucej, "Modeling methods in OPNET simulations of tactical command and control information systems", in: Proceedings of IWSSIP2008 Conference, Maribor, Slovenia, 2007.
/15/ J. Mohorko, M. Fras, Z. Cucej, "Modeling of IRIS Replication Mechanism in a Tactical Communication network, using OPNET', Comput. Networks,2008, Available online 30 December 2008, http://dx.doi.org/10.1016/j.comnet.2008.12.018. /16/ J. Mohorko, M. Fras, Z. Cucej: "Modeling of IRIS replication mechanism in tactical communication network with OPNET", in: Proceedings of OPNETWORK 2007 - the eleventh annual OPNET technology Conference, August 27th-31st, Washington, D.C., 2007.
35
M. Fras, J. Mohorko, Ž. Čučej:
Informacije MIDEM 41(2011)1, str. 27-36	Simulation of Tactical Networks Using System-of-the-Loop
/17/ J. Mohorko, S. Klampfer in Ž. Čučej,, Ekspertni sistem za analizo rezultatov simulacij taktičnih radijskih omrežij,. Inf. MIDEM, mar. 2009, letn. 39, št. 1, str. 46-52.
/18/ S. Klampfer, J. Mohorko, P. Planinšič in Ž. Čučej, Določanje radijske vidljivosti uporabnikov AIR storitev s pomočjo simulacijskega orodja OPNET modeler in modula 3DNV, Inf. MIDEM, sep. 2009, let. 39, št. 3, str. 135-143.
/19/ L. B. H. Ernest and L. C. W. Clement, BattleSpace Communications Network Planner and Simulator (BCNPS), OPNETWORK 2004 - Aug 30th - Sept 3rd - Washington, D.C.
/20/ L. J. Phang, A. Y. P. Chua, T. H. Beck and E. B. H. Lee, Battle Space Communications Network Planner and Simulator (BCNPS), Proceedings to 10th International Command and Control Research and Technology Symposium: The Future of Command and Control, June 13-16, McLean, VA. Command and Control Research Program (CCRP), Washington, D.C, 2005.
/21/ M. Fras in J. Mohorko, Simulacija komunikacijskih sistemov v realnem času z realno komunikacijsko opremo v simulacijski zanki. Inf. MIDEM, jun. 2009, letn. 39, št. 2(130), str. 71-77.
/22/ Sytematic, http://www.systematic.dk
/23/ Sytematic, „IRIS Replication Mechanism", White Paper, Revision 1.16, December 2006.
/23/ Sytematic, „SitaWare", White Paper, Revision 1.16, December 2006.
/25/ B. Vujičic, "Modeling and Characterization of Traffic in Public Safety Wireless Networks", Master of Applied science, Simon Fraser University, Vancouver, Canada, 2006.
/26/ M. Z. Jiang, "Analysis of wireless data network traffic", Master of Applied Science, Simon Fraser University, Vancouver, Canada, 2000.
/27/ P. Vieira, P. Queluz and A. Rodrigues, A Dynamic Propagation Prediction Platform over Irregular Terrain and Buildings for Wireless Communications, Lisbon Polytechnic Institute (ISEL), Portugal.
/28/ M. Jiang, S. Hardy in Lj. Trajkovic, Simulating CDPD networks using OPNET, OPNETWORK 2000, Washington D.C., August 2000.
/29/ S. R. Robinson and P.S. Idell, "Free-space propagation model for coherence-separable broadband optical fields", Optical Society of America, Journal, vol. 70, Apr. 1980, p. 432-437.
/30/ K. A. Chamberlin and R.J. Luebbers, "An Evaluation of Longley-Rice and GTD Propagation Models", IEEE Transactions on Antennas and Propagation, vol. AP-30, Nov. 1982, p. 1093-1098.
/31/ M. M. Weiner, "Use of the Longley-Rice and Johnson-Gierhart Tropospheric Radio Propagation Programs:0.02-20 GHz", IEEE Journal on Selected Areas in Communications, VOL. SAC-4, No. 2, March 1986.
/32/ D. Eppink and W. Kuebler, "TIREM/SEM Handbook, Department of defense", Electromagnetic compatibility analysis center, Annapolis, Maryland, 1995.
/33/ OPNET presentation (session 1933), Developmental and interoperability testing with OPNET system-in-the-loop, OPNETWORK 2007 - the eleventh annual OPNET technology Conference, August 27th-31st, Washington, D.C., 2007.
/34/ OPNET presentation (session 1942), Introduction to using 3D network visualize (3DNV), OPNETWORK 2007 - the eleventh annual OPNET technology Conference, August 27th-31st, Washington, D.C., 2007.
/35/ WinPCap documentation: http://www.winpcap.org
Matjaž Fras,
Margento R&D, Gosposvetska cesta 84, Maribor, Slovenia
Jože Mohorko, Žarko Čučej University of Maribor, Faculty of Electrical Engineering and Computer Science, Maribor, Slovenia
matjaz.fras@margento.com
Prispelo: 10.03.2010	Sprejeto: 03.03.2011
36
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
COMPACT UWB PLANAR ANTENNA FOR BROADBAND
APPLICATIONS
Rezaul Azim1, Mohammad Tariqul Islam2, Norbahiah Misran3 and Ahmed Toaha Mobashsher4
134Department of Electrical, Electronic and Systems Engineering, Universiti
Kebangsaan Malaysia, 43600 UKM Bangi, Selangor D., E., Malaysia. 2,3Institute of Space Science (ANGKASA), Universiti Kebangsaan Malaysia, 43600 UKM Bangi, Selangor D., E., Malaysia.
Key words: Broadband, Planar antenna, ultrawideband (UWB) antenna, partial ground plane.
Abstract: In this paper, a planar antenna for broadband applications has been proposed. The antenna consists of a rectangular patch, a partial ground plane and a slot on the ground plane. The proposed antenna is easy to be integrated with microwave circuitry for low manufacturing cost. The flat type antenna has a compact structure and the total size is 14.75 xi4.5mm2. The result shows that the impedance bandwidth (VSWR s 2) of the proposed antenna is 12.87 GHz (3.02 to 15.89 GHz), which is equivalent to 136.12%. Details of the proposed compact planar UWB antenna design is presented and discussed.
Kompaktna UWB planarna antena za širokopasovne aplikacije
Kjučne besede: Širokopasoven, planarna antena, ultra široko pasovna (UWB)antena, delna ozemljitvena ploskev
Izvleček: V članku predstavimo planarno anteno za širokopasovne aplikacije. Antena je sestavljena iz pravokotne zaplate, ozemljitvene ploskve in reže v ozemljitveni ploskvi. Antena z lahkoto integriramo v mikrovalovna vezja, s čimer dosežemo nizke proizvodne stroške. Ploskovna antena ima kompaktno strukturo in je velika 14.75 x14.5mm2. Rezultati nam pokažejo, da je impedančna pasovna širina (VSWR s 2 ) antene 12.87 GHz (3.02 do 15.89 GHz), kar je enako 136.12 %. V članku predstavimo podrobnosti izvedbe kompaktne UWB antene in rezultate.
1. Introduction
Ultra-wideband (UWB) communication systems draw great attention in the wireless world because of their advantages, like high speed data rate, extremely low spectral power density, precision, high precision ranging, low complexity and low cost since the Federal Communications Commission(FCC) allowed 3.1 to 10.6 GHz unlicensed band for UWB communication/1/. UWB also have wide applications in short range and high speed wireless systems, such as ground penetrating radars, medical imaging system, high data rate wireless local area networks (WLAN), communication systems for military and short pulse radars for automotive even or robotics. The antenna is one of the crucial components which determine the performance of UWB system. The UWB antennas proposed in the open literature mainly focus on the slot and monopole antenna /2-5/. Printed wide slot antennas have an attractive property of providing a wide operating bandwidth, especially for those having a modified tuning stub, such as the fork-like stub /6/-/8/, the rectangular stub /9/, and the circular stub /10/ inside the wide slot. Broadband planar monopole antennas have received considerable attention owing to their attractive merits, such as ultrawide frequency band,
good radiation properties, simple structure and ease of fabrication. The typical shapes of these antennas are half-disc /11/, circle, ellipse /12/, and rectangle /13/.
One of the popular UWB antenna types requires a perpendicular ground plane, which resulted in increased antenna size and difficult to integration with microwave-integrated circuits. Compared with the three dimensional type of antenna, flat type UWB antenna printed onto a piece of printed circuit board (PCB) is a good option for many applications because it can be easily embedded into wireless devices or integrated with other microwave-integrated circuits. However, the antenna design for broadband applications faces many challenges.
A low profile and embeddable unidirectional antenna is required for certain UWB communication, imaging, localization, and radar applications. The lower and upper UWB spectrums are 3.1-4.8 GHz (43%) and 6.0-10.6 GHz (55%), respectively. The existing broadband directional antennas, such as the Vivaldi, log-periodic, cavity-backed, waveguide, horn, and dish antennas, cover the entire 3.1-10.6 GHz band (109%). However, they are electrically large, and have a high profile in the direction of wave propagation. Omni- and bi-directional antennas, such as
37
Informacije MIDEM 41(2011)1, str. 37-40
R. Azim, M. T. Islam, N. Misran,A. T. Mobashsher:
Compact UWB Planar Antenna for Broadband Applications
the planar monopoles /14/, /15/, disc cone /16/, and slot antennas /17/, have a low gain and back radiation pattern, therefore they are not suitable for sectorial or unidirectional communication. Also, it is a challenge to maintain a stable radiation pattern across the whole frequency band, since the radiation aperture is frequency dependent.
In this paper, a microstrip-fed antenna for the broadband applications that achieves a physically compact planar profile, sufficient impedance bandwidth and highly stable bi-directional radiation pattern is proposed. The planar antenna consists of a rectangular shaped radiating patch and partial ground plane with a rectangular slot on the upper edge to cause a broad bandwidth from 3 to 16.0 GHz frequency. The antenna structure is flat, and its design is simple and straightforward.
2.	Antenna Geometry and Design
Antenna is the key element in UWB systems. The motivation of UWB antenna design is to design a small and simple antenna that introduces low distortions with large bandwidth. Fig. 1 illustrated the configuration of the proposed antenna, which consist of a squarer patch, a partial ground plane and a single rectangular slot on the ground plane. The antenna, which has a compact dimension of 14.75*14.5mm2, is printed in the front of a FR4 PCB substrate of thickness 1.6 mm and relative permittivity 4.6. The dimension of partial ground plane which is printed in the back side of the substrate is chosen to be 30*7.5mm2 in this study. The dimension of the slot is 6.0*0.9mm2 and 3.5mm away from the left edge of the ground plane. The bottom of the patch is connected by a microstrip line, which is fed by a 50 W coaxial probe from the side of the antenna. The microstrip line was etched on the same side of the substrate as the radiator. The antenna has the following parameters: Lsub = 22mm, Wsub = 30mm, LP =14.75mm, WP = 14.5mm, LG = 7.5mm, lf = 7.25mm, Wf = 4mm, We = 3.5mm, ws = 6.0mm and ls = 0.9mm.
Three techniques: the use of (i) square radiating patch, (ii) a partial ground plane and (iii) a single slot on the ground plane applied to the proposed design, lead to a good impedance matching. The geometric parameters of this structure can be adjusted to tune the return loss and bandwidth over wide range of frequency.
3.	Results
The performance of the proposed antenna has been analyzed and optimized by using commercially available method of moments based full-wave electromagnetic simulator IE3D/18/. The simulated return loss of the proposed antenna is depicted in fig.2.
The plot of the return loss shows that the impedance bandwidth of the proposed antenna is 12.87 GHz (from 3.02 GHz to 15.89 GHz) which is equivalent
Fig. 1. Geometry of the proposed UWB antenna (a) front view (b) back view(c) side view.
Fig.2.
4 6 8 10 12 14 16 18 20 Frequency (GHz) Return loss of the proposed antenna
to 136.12 %. Its covers the entire UWB frequencies mentioned earlier.
Fig. 3 shows the antenna gain in a frequency range of 3-10 GHz. The maximum gain is 1.60 dBi with an average of 0.52dBi, which can meet the usual requirement of -4 dBi for broadband applications. The gain is affected by the size of the ground plane.
The radiation efficiency of the antenna in the frequency range of 2-10 GHz is shown in fig. 4. The antenna has a maximum of 65.34% radiation efficiency at 3 GHz. The use of a substrate with high dielectric constant and a direct microstrip feeder may be the cause for deterioration in the radiation efficiency.
Fig. 5 shows the radiation patterns of the proposed antenna at 4.4, 6.2 and 8.1 GHz. It is seen that proposed antenna has a main beam in the broadside direction (00, 1800) over all operating frequency. At 8.1 GHz although,
38
R. Azim, M. T. Islam, N. Misran,A. T. Mobashsher:
Compact UWB Planar Antenna for Broadband Applications
Informacije MIDEM 41(2011)1, str. 37-40
2
1.5 l
0.5
o
-0.5 -l -1.5 -2
3456789 10 Frequency (GHz)
Fig.3. Gain of the proposed antenna in 3-10 GHz
3 4 5 6 7 8 Frequency (GHz)
10
Fig.4. Radiation efficiency of the proposed antenna
the third harmonic radiation pattern (in cross-polarization) is observed, the antenna has a good stable radiation in the broadside direction without gain degradation unlike the existing UWB monopole antennas. At 8.1 GHz the difference of radiation level between copolarization (0 = 00) and cross-polarization (0 = 900) is approximately 6.69 dBi. The radiation pattern at 4.8 GHz shows that the difference in radiation level is relatively low compared to other frequency data. The differences of polarized radiation levels against the frequencies provide the advantage of minimizing fading effects by multicurrent paths in wireless communications /19/. In the E- plane, the 3 dB beam width is 780 at 4.8 GHz, 68.50 at 6.2 GHz and 87.90 at 8.1 GHz and the radiation patterns are almost symmetric. In the H- plane, the 3 dB beamwidth is 81.30 at 4.8 GHz, 78.70 at 6.2 GHz and 60.80 at 8.1 GHz.
Fig. 6 illustrates the current distributions of the proposed antenna at different frequencies. Through a numerical study of the vector current distributions on the antenna, three characteristics current modes are found to exist over the bandwidth from 3.0 to 16.0 GHz. Using fig. 2 as a reference, each current mode is dominant at each resonance, 8.1, 9.7 and 14.4 GHz respectively. It is seen that, the strongest currents are concentrated on the edges of the patch, which can be easily from fig.6. At 8.1 GHz the polarity of the current on the left portion of the patch is upward (along vertical direction), while at the right portion it is downward as shown in fig.6 (a). At 9.7 GHz the polarity
270
Crosspolarization Copolarization
190 270
180 180 f= 4.8 GHz
270|
270
90 270!
180 180 f= 6.2 GHz
o
270 \
180
f= 8.1 GHz
180
Fig.5.
Radiation pattern of the proposed antenna (a) E-plane and (b) H-plane
on the upper portion of the patch (along vertical direction) is opposite to that of lower portion and very little amount of current is found on the centre of the patch as shown in fig.6 (b), while at 14.4 GHz the polarity of current on patch is downward in the upper portion and almost upward in the lower portion as shown in fig.6 (c). However, the current is uniformly distributed elsewhere.
4. Conclusions
A low cost, compact microstrip-fed planar UWB antenna has been proposed and implemented. The antenna size is 14.75^14.5 mm2. The use of rectangular slot on the upper side of the partial ground plane improves not only the impedance matching in high frequency band but also the radiation characteristics at high frequencies. The antenna structure is flat, and its design is simple and straightforward, so it is easy to fabricate. The proposed antenna achieved a bandwidth of 136.12% (3.02 -15.89 GHz) at -10 dB. The relatively constant bidirectional radiation patterns and rather flat gain throughout the whole bandwidth makes the proposed antenna suitable for broadband applications.
39
Informacije MIDEM 41(2011)1, str. 37-40
R. Azim, M. T. Islam, N. Misran,A. T. Mobashsher:
Compact UWB Planar Antenna for Broadband Applications
(a)
(b)
(c)
Fig. 6.
Current distributions on the antenna at (a) 8.1 GHz, (b) 9.7 GHz and (c) 14.4 GHz.
Acknowledgment
The authors would like to thank the Institute of Space
Science (ANGKASA), Universiti Kebangsaan Malaysia for
sponsoring this work.
References
/1./ Federal Communications Commission Revision of Part 15 of the Commission's Rules Regarding Ultra-Wideband Transmission System from 3.1 to 10.6 GHz, in Federal Communications Commission: ET-Docket, pp. 98-153, 2002.
/2./ D. C. Chang, J. C. Liu, and M. Y. Liu, "A novel tulip-shaped monopole antenna for UWB applications," Microw. Opt. Technol. Lett., vol. 48, pp. 307-312, 2006.
/3./ X. H. Wu and Z. N. Chen, "Comparison of planar dipoles in UWB applications,"/EEE Trans. Antennas Propag., vol. 53, pp. 1973-1983, 2005.
/4./ X. H.Wu and A. A. Kishk, "Study of an ultrawideband omnidirectional rolled monopole antenna with trapezoidal cuts,"/EEE Trans. Antennas Propag., vol. 56, pp. 259-263, 2008.
/5./ X. H. Wu, Z. N. Chen, and N. Yang, "Optimization of planar diamond antenna for single-based and multiband UWB wireless communications,"Microw. Opt. Technol. Lett., vol. 42, pp. 451-455, 2004.
/6./ J. Y. Sze and K. L. Wong, "Bandwidth enhancement of a microstrip line-fed printed wide-slot antenna,"IEEE Trans. Antennas Propag., vol. 49, pp. 1020-1024, Jul. 2001.
/7./ R. Chair, A. A. Kishk, and K. F. Lee, "Ultrawide-band coplanar waveguide-fed rectangular slot antenna,"Antennas Wireless Propag. Lett., vol. 3, no. 1, pp. 227-229, 2004.
/8./ S. H. Hsu and K. Chang, "Ultra-thin CPW-fed rectangular slot antenna for UWB applications," in Proc. IEEE AP-S Int. Symp., pp. 2587-2590, Jul. 2006.
/9./ H. D. Chen, "Broadband CPW-fed square slot antenna with a widened tuning stub,"IEEE Trans. Antennas Propag., vol. 51, pp. 1982-1986, Aug. 2003.
/10./ Y. W. Jang, "A circular microstrip-fed single-layer single-slot antenna for multi-band mobile communications,"Microw. Opt. Technol. Lett., vol. 37, pp. 59-62, Apr. 2003.
/11./ T.Yang and W. A. Davis, "Planar half-disk antenna structures for ultrawideband communications," in Proc. IEEE AP-S Int. Symp., vol. 3, pp. 2508-2511, Jun. 2004.
/12./ L. Jianxin, C. C. Chiau, X. Chen, and C. G. Parini, "Study of a printed circular disc monopole antenna for UWB systems," IEEE Trans. Antennas Propag., vol. 53, no. 11, pp. 3500-3504, Nov.
2005.
/13./ M. J. Ammann and Z.-N. Chen, "Wideband monopole antennas for multi-band wireless systems,"IEEE Antennas Propag. Mag., vol. 45, no. 2, pp. 146-150, Apr. 2003.
/14./ Z. N. Chen, "Broadband rolled monopole,"IEEE Trans. Antennas Propag., vol. 51, no. 11, pp. 3175-3177, Nov. 2003.
/15./ Z. N. Chen, M. Y. Chia, and M. J. Ammann, "Optimization and comparison of broadband monopoles,"Proc. IEE Microw. Antennas Propag., vol. 150, no. 6, pp. 429-435, Dec. 2003.
/16./ X. Qing, Z. N. Chen, and M. Y. W. Chia, "UWB characteristics of disc cone antenna," in Proc. Int.Workshop on Antenna Technol. IWAT, pp. 97-100, Mar. 2005.
/17./ Y. F. Liu, K. L. Lau, and C. H. Chan, "Experimental studies of printed wide-slot antenna for wide-band applications,"IEEE Antennas WirelessPropag. Lett., vol. 3, pp. 273-275, 2004.
/18./ IE3D version 12. Zeland Software, Inc., Fremont, CA, USA,
2006.
/19./ W. C. Liu, W. R. Chen, and C. M. Wu, "Printed double S-shaped monopole antenna for wideband and multiband operation of wireless communications,"Inst. Elect. Eng. Proc.-Microw., Antennas Propag., vol. 151, no. 6, pp. 473-476, Dec. 2004.
Rezaul Azim1, Mohammad Tariqul Islam2, Norbahiah Misran3 and Ahmed Toaha Mobashsher4
134Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, 43600 UKM Bangi, Selangor D., E., Malaysia. rezaulazim@yahoo.com, i_toaha@yahoo.com, bahiah@vlsi.eng.ukm.my
23Institute of Space Science (ANGKASA), University Kebangsaan Malaysia, 43600 UKM Bangi,
Selangor D., E., Malaysia. titareq@yahoo.com
Prispelo: 02.02.2010
Sprejeto: 03.03.2011
40
UDK621.3:(53+54+621+66), ISSN0352-9045	Informacije MIDEM 41(2011)1, Ljubljana
SIMULATION OF DIFFERENT ROUTER BUFFER SIZES WHICH INFLUENCES ON VOIP JITTER DELAY WITHIN THE
ROUTED NETWORK
Saša Klampfer1, Jože Mohorko2, Žarko Čučej2, Amor Chowdhury1
1Margento R&D d.o.o., Maribor, Slovenia 2University of Maribor, Faculty of Electrical Engineering and Computer Science,
Maribor, Slovenia
Key words: Jitter, VoIP, delay, queuing discipline, buffer, QoS, voice quality
Abstract: This paper is continuation of /1/ where we tested different queuing methods and their influence on VoIP Jitter delay. Because we combine different queuing disciplines /1/ has also waiting queues be combined, in many cases even doubled. Such method has circumstances in case of VoIP round trip delay and also in case of packet delay variation where they rapidly increase. Such manner is not acceptable in VoIP case where we require small delays in all aspects. This is the reason why we in this paper presented aspects, how to reduce before mentioned delays. One approach is connected with reducing buffer length but anyway it mustn't be too short. The proper solution will also be presented in continuation.
Simulacija vpliva različnih velikosti pomnilnika usmerjevalnikov na zakasnitev VoIP prometa znotraj
usmerjanega omrežja
Kjučne besede: Jitter, VoIP, zakasnitev, mehanizmi uvrščanja, pomnilnik, kvaliteta storitev
Izvleček: Članek predstavlja nadaljevanje raiskav, ki smo jih objavili v /1/, kjer smo preizkušali različne metode uvrščanja ter njihov vpliv na VoIP zakasnitev ter vpliv na Jitter. Ker smo v /1/ kombinirali različne mehanizme uvrščanja, so bile s tem kobinirane tudi čakalne vrste, v nekaterih primerih pa so bile celo podvojene. Pristop združevanja mehanizmov uvrščanja in s tem tud čakalnih vrst ima lahko predvsem vpliv na čas obhoda VoIP paketa in na variacijo zakasnitev, kjer se le te lahko opazno povečajo. Takšni scenariji v omrežjih s časovno občutljivimi aplikacijami niso dobrodošli, še posebej ne v primeru VoIP prometa, kjer težimo k čim manjšim zakasnitvam v vseh pogledih. To je pa hkrati tudi glavni razlog, zakaj smo se v tem delu odločili prikazati pristop, kako zmanjšati tovrstne zakasnitve pri kombiniranju mehanizmov uvrščanja. Eden izmed takšnih pristopov je zmanjšanje velikosti pomnilnika uporabljenega pri čakalnih vrstah. Pri zmanjševanju pomnilnika je potrebno paziti tudi na minimalno dolžino, saj se lahko zaradi premajhnega pomnilnika zavrže večje število paketov, kar pa je v nasprotju z našimi zahtevami in željami. Primerno rešitev predstavljamo v nadaljevanju tega prispevka.
1. Introduction
DEMAND upon VoIP quality speech has been expressed from VoIP vendors long time ago. Since then have been presented many solutions, some of them concerned improved voice encoder schemes, other are connected with queuing schemes and third one are connected with buffer length. The last mentioned also represents essential element of this research where we try to prove how buffer length influence on VoIP delay within the network. Definition says that delay is caused when packets of data (voice) take more time than expected to reach their destination. This causes some disruption in the voice quality. However, if it is dealt with properly, its effects can be minimized. When packets are sent over a network towards a destination machine/phone, some of them might be delayed. Reliability features in the voice quality mechanism sees to it that a conversation is not deadlocked waiting for a packet that went to have a walk somewhere in the green. In fact, there are many factors affecting the journey of packets from source to destination, and one of them is the underlying network. The delayed
packet may come late or may not come at all, in last case it is lost. QoS (Quality of Service) considerations for voice are relatively tolerant towards packet loss, as compared to text. If you lose a word or a zero in your balance, your text might mean something completely different! If you lost a "hu" or a "ha" in a speech, it does not make a really big impact, except some hitch in voice quality. Besides, voice smoothing mechanism regulates it, so that you don't feel the bump. When a packet is delayed, you will hear the voice later than you should. If the delay is not big and is constant, your conversation can be acceptable. Unfortunately, the delay is not always constant, and varies depending on some technical factors. This variation in delay is called jitter, which causes damage to voice quality. That could such damage be minimal we make simulations where results proves how buffer length influences to VoIP jitter.
Used queuing scheme in simulation is described in the second section, meanwhile the third section presents VoIP jitter and his causes. Fourth section presents used G. 729 voice encoder scheme, fifth section presents the OPNET
41
S. Klampfer, J. Mohorko, Ž. Čučej, A. Chowdhury : Informacije MIDEM 41(2011)1, str. 41-45	Simulation of Different Router Buffer Sizes which Influences on VoIP ...
Modeler simulation tool, which is used for proving our assumptions and decisions. In sixth section is presented simulated wired network structure, meanwhile obtained simulation results are presented in seventh section. Finally section concludes the paper.
2. Used queuing discipline introduction
Weighted fair queuing (WFQ): In situations where we want to provide constant response time and keep delays within range, without assigning an excessive bandwidth, we require optimal solution, so called weighted fair queuing. WFQ is an algorithm/mechanism which introduces bit-wise fairness and allows each queue to be served fairly (Figure 1). Fairness is provided by a mechanism which counts bytes. For the simplest example, we can observe two queues of the same length. The first contains 100 packets and the second only 50. In this case WFQ will work in the following manner; firstly it will take two packets from the first queue then one packet from the second queue and keep repeating this until fairness is achieved.
i -
Fig. 1: Weighted fair queuing (WFQ) discipline
Such an algorithm creates service fairness for each participating queue. Low level priority traffic cannot then disturb travel through the network, which is a good compromise for each participating traffic flow within the network. WFQ also has other benefits such is configuring cost minimization, because it is capable of automatically accommodating dynamic network changes. Because of its good qualities, it is used on the majority of serial interfaces configured for E1 operation speeds (2048 Mbps). Weight is also, in this case, defined using the IP priority amount defined in the ToS field of the IP packet. For IP priorities, settings within the range from 0 (best effort) to 5 (IP quality speech) are in use, whilst meanwhile settings 6 and 7 are reserved. The algorithm then uses these data to calculate, how many additional services need to be provided for predicting each individual queue. It can use each available bandwidth that could a interfere with low-priority traffic flows, in an order that does not present high-priority traffic flow. In the basis is this principle, an opposite comparison with time-division multiplexing (TDM) which reserves all available bandwidths and leaves it unused if the traffic flow is not presented. WFQ is suitable for operating with IP priority settings, as is resource reservation protocol (RSVP), and is also capable of managing round-trip delay problem. Such queuing clearly improves an algorithms' SNA, logical link control (LCC) and transmission control protocol (TCP) and is, at the same time, capable of accelerating slow features and remov-
ing congestion within the network. Results become more predictable over the whole routing path, meanwhile delays can be multiplied reduced/decreased in comparison with other queuing disciplines (CQ, PQ, FIFO) /2, 3/.
3. VoIP Jitter and his causes introduction
Jitter is a variation in packet transit delay caused by queuing, contention and serialization effects on the path through the network. In general, higher levels of jitter are more likely to occur on either slow or heavily congested links. It is expected that the increasing use of "QoS" control mechanisms such as class based queuing, bandwidth reservation and of higher speed links such as 100 Mbit Ethernet, E3/ T3 and SDH will reduce the incidence of jitter related problems at some stage in the future, however jitter will remain a problem for some time to come. In continuation we will introduce the main causes of jitter /4/. In particular, three types of jitter are well-known where belongs 'Constant Jitter (CJ)' marked as group 'A', and which is in correlation with packet to packed delay variation. The second type of jitter marked as group 'B' is 'Transient Jitter (TJ)' which is in connection with substantial incremental delay which could be incurred by a single packet. The last one, marked as group 'C' is short term delay variation which is usually commonly associated with congestions and route changes. Into group 'A' belongs the following causes; load sharing among multiple access links or IP service providers, load sharing within an IP service, and internal load sharing within routers. Into group 'B' belongs such causes which influences on 'TJ' jitter, and those are: sending system packet scheduling, LAN congestions, router firewall, routing table updates, route flapping and timing drift. Into last group belong access link congestion and router firewall conditionally. What is more important in our investigation is Jitter Buffer, respectively buffer length influence on such jitter.
A jitter buffer is designed to remove the effects of jitter from the decoded voice stream, buffering each arriving packet for a short interval before playing it out. This substitutes additional delay and packet loss (discarded late packets) for jitter. A fixed jitter buffer maintains a constant size whereas an adaptive jitter buffer has the capability of adjusting its size dynamically in order to optimize the delay/ discard tradeoff. Both fixed and adaptive jitter buffers are capable of automatically adjusting to changes in delay. For example if a step change in delay of 20 milliseconds occurs then there may be some short term packet discards resulting from the change however the jitter buffer would be quickly realigned. In many cases the jitter buffer can be considered as a time window with one side (the early side) aligned with the recent minimum delay and the other side (the late side) representing the maximum permissible delay before a packet would be discarded. Another approach could be used with modeling the jitter buffer, named jitter buffer emulation. In this case we directly determine how many packets would be discarded as a result of jitter. This
42
S. Klampfer, J. Mohorko, Z. Cucej, A. Chowdhury :
Simulation of Different Router Buffer Sizes which Influences on VoIP
Informacije MIDEM 41(2011)1, str. 41-45
has the advantage of being able to directly observe the time distribution of discard events and eliminates the step of trying to relate a jitter metric to a discard rate. If used as a jitter metric this would require a standardized jitter buffer to be used as proposed in /4, 7, 8, 9, and 10/.
4.	G. 729 voice encoder scheme
The G.729 speech coder is an 8 kbps Conjugate-Structure Algebraic-Code-Excited Linear Prediction (CS-ACELP) speech compression algorithm approved by ITU-T. G.729. It offers high quality, robust speech performance at the price of higher complexity. It requires 10 ms input frames and generates frames of 80 bits in length. Within the G.729 coder the processing signals are 10 ms frames with additional 5 ms look-ahead. The total delay introduced by algorithm is 15 ms. Since G.729 is based on the Code-Excited Linear Prediction (CELP) model, each produced 80 bit frame, contains linear prediction coefficients, excitation code book indices, and gain parameters that are used by the decoder in order to reproduce speech. The input/output of this algorithm is 16 bit / 8 kbps linear PCM audio stream that is converted from/to a compressed data stream /5/.
5.	Opnet modeler
OPNET Modeler's cutting-edge technology provides an environment for designing protocols and technologies as well as testing and demonstrating designs in realistic scenarios prior to production. OPNET Modeler is used by the world's largest network equipment manufacturers to enhance the design of network devices, technologies such as VoIP, TCP, OSPFv3, MPLS, IPv6, etc. Modeler represents a leading simulation tool used for modeling, and simulating communication networks, and their applications. At the same time it offers study analyze of telecommunication infrastructures, individual apparatus, protocols, and applications. This is a graphically-oriented simulation tool, which uses project, node and process editors for building communication models. The project editor offers graphic topological description, whilst the node editor is used for describing protocols. The process editor is an upgrade of C language, which uses a finite-state machine for algorithm and protocol descriptions. OPNET includes many standard communication models for constructing wired, radio, and optical and satellite communication structures. This tool also offers 2D and 3D animation for accompanying changes within the network's structure /6/.
6.	Simulation structure
Network topology used in our simulation scenarios is shown in Figure 2. It represents only a test board structure for proving our assumptions about buffer length influence on jitter delay. Our main goal in these simulations is oriented towards improving the network's performances, regarding to the VoIP jitter.
Fig. 2: Network simulation structure
The network structure consists of two sixteen port routers mutual connected where are on each router connected three VoIP users, commonly six, with generated 56 full meshed VoIP traffic flows. All clients are connected over 10BaseT link on routers, where are also routers mutual connected with the same connection type. VoIP application is defined using the 'Application' node shown on the top-right side in Figure 2. With 'Profile' node (beside applications node) are defined a client profiles, respectively what should User Equipment (UE) do, or better say, which application is such UE capable to use.
Table 1: Number of users
Application	Users	Class	Bandwidth
VoIP	6	1	10 Mbit/s
Simulation stricter is very simple because we only want to show how important part plays proper buffer length on voice quality in sense of jitter etc. For that case we prepare two different scenarios. In first is buffer length set to 256 MB (Mbytes). Such buffer represents the memory used to store packets awaiting processing or currently processed by the forwarding CPU. In a centralized scheme, processed packets remain in that memory until sent out on an appropriate interface. In the distributed scheme, processed packets are then forwarded to the appropriate slot memory. In second scenario is such buffer reduced on only 16 MB which contribute better results presented in continuation.
7. Simulation results
As we mentioned above, we use two different scenarios with the same network structure and different buffer lengths. We also try to figure out which length is the proper one, respectively which gives better delay results.
The minimal value which can be chosen in simulation tool is 8MB. For tested behavior of such value we again created new scenario which has been after successfully executed simulation compared with other two scenarios. The analysis shows that decreasing buffer length less than 16MB does not effect on delay parameters within the network, and at
43
S. Klampfer, J. Mohorko, Z. Cucej, A. Chowdhury : Informacije MIDEM 41(2011)1, str. 41-45	Simulation of Different Router Buffer Sizes which Influences on VoIP ...
o.ooos
0.0007 0.0006 0.000^ 0.0004 0.0003 0.0002 0.0001
I Dresden-EnlargedLength-DES-1 I Dresden-NormalLength-DES-1
time_average (in Voice.Jitter (sec))
						
K						
						
	/					
	f					
						
						
						
0m 0s
0m 30s
1m0s
1m 30s
2m 0s
Fig. 3: Voice Jitter of VoIP application transmitted through two different buffer sizes (16MB buffer length -red, and 256MB buffer length - blue) in time average statistic
the same time, results in case of use 8MB buffer are quite similar to results when 16MB buffer is used. Comparison between 8MB and 16MB buffer length and their effect to Voice jitter is shown in figure 3. As we expected, large buffer increase voice jitter in second half of simulated period. Within first half of period largest buffer gives better results compare smaller buffer, because we have in first half of period smaller traffic compare with second half of simulation period. Since buffer is full, voice jitter rapidly increases as is shown in Figure 3 and then such approach fails, because VoIP traffic requires minimal delay within the network. Such jitter for both cases is fully acceptable, because highest value didn't reach 0.8ms, but is clearly to se affect of buffer length.
The end-to-end delay for both scenarios is presented in Figure 4. The end-to-end delay is thus the sum of the delays experienced at each hop on the way to the destination. Each such delay in turn consists of two components, a fixed component which includes the transmission delay at a node and the propagation delay on the link to the next node, and a variable component which includes the processing and queuing delays at the node.
In our case is such delay minimal, but situation can be changed using different simultaneous applications within the same network where can congestions appear and so on. Our simulated network has enough available bandwidth to transmit all VoIP traffic between communicating nodes, and this is the main reason why is end-to-end, respectively packet delay so small. It takes maximal value around 60,53ms for large buffer and around 60,22ms for small buffer.
Fig. 4: Voice Packet End-to-End delay for two different
buffer sizes (16MB buffer length - red, and 256MB buffer length - blue) in time average statistic
Packet Delay Variation (PDV) is defined by RFC 3393 as the difference in end-to-end delay between selected packets in a flow with any lost packets being ignored. The means of selection is not specified in RFC 3393, but e.g. could be the packets which gave the biggest variation in delay in a selected time period. The delay is specified from the start of the packet being transmitted at the source to the end of the packet being received at the destination. A component of the delay which does not vary from packet to packet can be ignored, hence if the packet lengths are the same and packets always take the same time to be re-assembled at the destination then the packet arrival time at the destination
Fig. 5: Voice packet delay variation for two different buffer sizes (16MB buffer length - red, and 256MB buffer length - blue) in time average statistic
44
S. Klampfer, J. Mohorko, Z. Cucej, A. Chowdhury :
Simulation of Different Router Buffer Sizes which Influences on VoIP ..	Informacije MIDEM 41(2011)1, str. 41-45
could be used instead of the time the end of the packet is received. From obtained results presented on Figure 5 we can assume that is before mention difference for PDV on minimal level, because maximal value don't reach more than 2,3 nano-seconds.
From above Figure we can assume that has been enough bandwidth present within the network for VoIP application transmission and because of that is data loss on minimal level.
I Dresden-EnlargedLength-DES-1 I Dresden-NormalLength-DES-l
Ethernet.Delay (sec)
....	........i.............			
				
....				
				
				
				
				
				
				
	/			
				
0m Os Om 20s 0m 40s
1 m 0s 1 m 20s 1m 40s 2m 0s
Fig. 6: Ethernet delay for two different buffer sizes (16MB buffer length - red, and 256MB buffer length -blue) in time average statistic
Also in case of Ethernet delay are differences between large and small buffer noticeable but they are on 71 us level. Such delay is in practice imperceptible.
8. Conclusion
During this paper we show the reader how one of few possibilities affect on jitter in VoIP case, and how such solution affect on other parameters within the network, such as end-to-end delay and packet delay variation. From simulation results is clearly to see buffer length influence on VoIP traffic delay. As we mentioned in second section, such jitter can be additionally reduced with use of jitter buffer emulation, fixed jitter buffer and adaptive jitter buffers. This is also the issue for further research analysis on this area.
References
/1./ Saša Klampfer, Jože Mohorko, Žarko Čučej, "Influence of hybrid queuing disciplines on VoIP traffic delay", InfoCOM international conference
/2./ Saša Klampfer, Jože Mohorko, Žarko Čučej, "IP packet queuing disciplines as basic part of QOS assurance within the network", Informacije MIDEM, junij 2009, letn. 39, št. 2(130) /3./ Internetworking Technology Handbook - Quality of Service
(QoS), Cisco Systems /4./ Cole, R. Rosenbluth J. Voice over IP Performance Monitoring, AT&T Preprint September 2000
/5./ G. 729 Data Sheet /6./ OPNET Modeler Techical Documentation /7./ TIPHON 22TD047 Problems with the behavior of Jitter Buffers and their influence on the end-to-end speech quality, source KPN Research, March 2001 /8./ RFC1889 Real Time Control Protocol
/9./ ITU-T Y.1541 Network Performance Objectives for IP Based Services
/10./ ITU-T SG12 D74 IP Phones and Gateways: Factors impacting speech quality, France Telecom, May 2002
Saša Klampfer has graduated in 2007, at the Faculty of Electrical Engineering and Computer Science in Maribor with diploma degree thesis:»Network simulations in OPNET Modeler«. In 2009 he finish master degree study programe with masters thesis entitled: »Expert system for automatic analysis of tactical radio network properties« at the same Faculty. His research activity is focused on the simulation areas and on design of telecommunications (UMTS) and computer networks (Fast ethernet, Wi-Fi) and on the influence how individual applications affects on specific network in terms of time, utilization, packet loss, etc.
sasa.klampfer@margento.com
Jože Mohorko received his B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from the University of Maribor, Slovenia, in 1990, 1994 and 2002, respectively. He is a docent and researcher at the Faculty of Electrical Engineering and Computer Science in Maribor, University of Maribor. His research interests include image processing, modeling, simulating and evaluating telecommunication infrastructures.
Žarko Čučej is a full professor for automatic control and robotics, and telecommunications at the Faculty of Electrical Engineering and Computer Science of the University of Maribor. His recent research interests include signal processing and industrial data networks.
Amor Chowdhury has graduated in 1994, at the Faculty of Electrical Engineering and Computer Science in Maribor, from the discrete regulation area with diploma degree thesis entitled: »Discrete regulation systems design on personal computer«. In 1997 he receives masters degree at the same faculty with masters degree thesis entitled: »The theory of robust synthesis«. Four years later (2001) he has complited Phd. study programe with Phd. Thesis entitled: »Regulation systems robust synthesis including performance criteria«. He is a great innovator and researcher what confirms numbers of given and registered patents, for example 11643 Terminal Device for Monitoring, Maintenance and Service Data patent.
Prispelo: 03.02.2010
Sprejeto: 03.03.2011
45
UDK621.3:(53+54+621+66), ISSN0352-9045	Informacije MIDEM 41(2011)1, Ljubljana
INFLUENCE OF MATERIAL ATTACHMENT FOR
EM ABSORPTION
Mohammad Rashed Iqbal Faruque1, Mohammad Tariqul Islam 2, Norbahiah Misran1, 2
1Dept. of Electrical, Electronic and Systems Engineering, Faculty of Engineering and Built Environment, Universiti Kebangsaan Malaysia, Bangi, Selangor, Malaysia. institute of Space Science (ANGKASA), Universiti Kebangsaan Malaysia, Bangi,
Selangor, Malaysia.
Key words: antenna, human head model, lossy-Drude model, materials, SAR.
Abstract: In this paper, reducing electromagnetic absorption (EM) with materials attachment is investigated. The finite-difference time-domain method with lossy-Drude model is adopted in this study. The methodology of SAR reduction is addressed and the effects of attaching location, distance, and size of ferrite sheet material on the SAR reduction are investigated. Materials have achieved a 47.68% reduction of the initial SAR value for the case of 1 gm SAR. These results suggest a guideline to choose various types of materials with the maximum SAR reducing effect for a phone model.
Vpliv feritnega dodatka na EM absorpcijo
Kjučne besede: antena, človeški model glave, model lossy-Drude, materiali, SAR
Izvleček: v članku raziskujemo vpliv dodatnih pritrjenih materialov na EM absorpcijo. Pri simulaciji smo uporabili dva modela. S pomočjo metodologije SAR zasledujemo vpliv položaja, razdalje in velikosti ploskih feritnih materialov na zmanjševanje SAR. Dodani materiali zmanjšajo za 47.68 % začetno SAR vrednost v primeru 1g SAR. S pomočjo teh rezultatov pridemo do smernic pri izbiri materialov za doseganje največjega SAR zmanjšanja za model telefona.
1. Introduction
Sources of radio frequency/microwave (RF/MW) radiation, particularly cellular phones are ever present. RF/ MW sources are part of daily life, but they also reason for concern regarding the possible biological effects of microwaves. It is important that the biological effects of RF/ MW fields are minimal, at least at the level of their clinical significance, so that health risk can be assessed. Because the potential shock of RF/MW fields on human health has not yet been well characterized, the basic knowledge from laboratory studies based on cellular and animal test systems are invaluable. The interaction of handset antennas with the human body is a great consideration in cellular communications. The user's body, especially the head and hand, influence the antenna voltage standing wave ratio (VSWR), gain, and radiation patterns. Furthermore, thermal effects, when tissues are exposed to unlimited electromagnetic energy, can be a serious health hazard. Therefore standards organizations have set exposure limits in terms of SAR /1, 2/. SAR is a measure of the rate at which radio frequency (RF) energy is absorbed by the body when exposed to a radio-frequency electro-magnetic field. SAR is used to measure exposure to fields between 100 kHz and 10 GHz /3-5/. It is commonly used to measure power absorbed from mobile phones and during MRI scans. The value will depend on the geometry of the part of the body that is exposed to the RF energy, and on the exact location and geometry of the RF source.
Cellular phone protection and the enforcement of pertinent exposure standards are issues in the current media, and regulatory agencies are motivated to assure that compliance testing is acceptable. IEEE Standard 1528 /1/ and IEC 62209-1 specify protocols and process for the measurement of the peak spatial-average SAR induced inside a simplified model of the head of users of hand held radio transceivers (cellular phones). For example, the SAR limit specified in IEEE C95.1: 1999 is 1.6 W/kg in a SAR 1 gm averaging mass while that specified in IEEE C95.1: 2005 has been updated to 2 W/kg in a 10 gm averaging mass /2/. This new SAR limit specified in IEEE C95.1: 2005 is comparable to the limit specified in the International Commission on Non-Ionizing Radiation Protection (ICNIRP) guidelines.
The exposure limits are defined commonly in terms of the spatial peak SAR averaged either over any one gram or ten grams of tissue. Since 1997, the U.S. Federal Communication Commission (FCC) requires the routine SAR evaluation of a phone model prior to device authorization or use. So there is a need to reduce the spatial peak SAR in the design stage of a phone model because the possibility of a spatial peak SAR exceeding the recommended exposure limit cannot be completely ruled out /2/, /3-5/. The interaction of the cellular handset with the human head has been investigated by many published papers considering; first, the effect of the human head on the handset antenna performance including the feed-point impedance, gain, and
46
M. R. I. Faruque, M. T. Islam, N. Misran:
Influence of Material Attachment for EM absorption
Informacije MIDEM 41(2011)1, str. 46-52
efficiency /6-10/, and second, the impact of the antenna EM radiation on the user's head due to the absorbed power, which is measured by predicting the induced SAR in the head tissue /9-13/.
The most used method to solve the electromagnetic problem in this area is the finite-difference time-domain (FDTD) technique /12-13/. Although, in principle, the solution for general geometries does not require any additional effort with respect to the standard method, the technique requires the definition of a discretized space by assigning to each cell its own electromagnetic properties, which is not an easy process /14-16/. Specifically, the problems to be solved in SAR reduction need a correct representation of the cellular phone, anatomical representation of the head, alignment of the phone and the head, and suitable design of materials or metamaterials.
Human exposure to electromagnetic (EM) radiation, as well as the pertinent health effects, constitutes a matter of raised public concern, and this issue has undergoing continuous scientific investigation. Various studies on this subject exist /14-17/, most of which mainly investigate into the consequences of mobile-phone usage. Yet, devices and communication terminals operating in other frequency bands have also gained substantial interest in the last 15 years. In /8/, a ferrite sheet was adopted as protection between the antenna and the human head. A reduction of over 13% for the spatial peak SAR over 1 gm averaging was achieved. A study on the effects of attaching a ferrite sheet for SAR reduction was presented in /15/, and it was concluded that the position of shielding plays an important role in the reduction effectiveness.
In /17/, for the SAR in the human head, an effective approach is the use of a planar antenna integrated onto the back side (away from the head) of a phone model, but it brings additional design difficulties especially in achieving the required frequency bandwidth and radiation efficiency. Another approach is the use of a directional or reflecting antenna /15-16/. Such an antenna structure sacrifices the availability of signals received from all directions to the phone model. The mechanism of SAR reduction by ferrite sheet attachment was due to the suppression of surface currents on the front side of phone model /18/. However, the relationship between the maximum SAR reducing effect and the parameters such as attaching location, size and material properties of ferrite sheet remains unknown.
In /11/,/18/ a perfect electric conductor (PEC) reflector was placed between a human head and the driver of a folded loop antenna. The result showed that the radiation efficiency can be enhanced and the peak SAR value can be reduced. In /14/, a study on the effects of attaching conductive materials to cellular phone for SAR reduction has been presented. It is shown that the position of the shielding material is an important factor for SAR reduction effectiveness. There is a necessity to make an effort for reducing the spatial peak SAR in the design stage of ferrite sheet because the possibility of a spatial peak SAR
exceeding the recommended exposure limit cannot be completely ruled out.
This paper is structured as follows. Section II describes the numerical analysis of the handset together with the SAM phantom head. The FDTD method is used with positive meshing techniques for quick and correct analysis. The modeling and analyzing technique will be described in Section III. Simulation and comparing results of materials will be summarized in Section IV and Section V concludes the paper.
2. Simulation model and numerical techniques
A. Model Description
The simulation model which includes the handset with PIFA type of antenna and the SAM phantom head provided by CST Microwave Studio® (CST MWS) is shown in Fig. 1. A complete handset model composed of the circuit board, LCD display, keypad, battery, and housing was used for simulation. The relative permittivity and conductivity of individual components were set to comply with industrial standards. In addition, definitions in /3-4/, /17/ were adopted for material parameters involved in the SAM phantom head. In order to accurately characterize the performance over a broad frequency range, dispersive models for all the dielectrics were adopted during the simulation /3/. Fig. 2 shows the dispersive permittivity of the liquid in the SAM phantom head for simulation. In Fig. 2, Eps' and Eps" represents dielectric dispersion fit Debye 1st order and 2nd order respectively. The electrical properties of materials used for simulation are listed in Table 1. A PIFA type antenna constructed in a helical sense operating at 900 MHz for GSM application was used in the simulation model. In order to obtain a high-quality geometry approximation for such a helical structure, a predictable meshing scheme used in the FDTD method usually requires large number of hexahedrons which in turn makes it extremely challenging to get convergent results within reasonable simulation time.
Fig. 1: Complete model used for simulation
including handset and SAM phantom head.
47
Informacije MIDEM 41(2011)1, str. 46-52
M. R. I. Faruque, M. T. Islam, N. Misran:
Influence of Material Attachment for EM absorption
Electric Dispersion :2nd Order Model (Fit)
50 40 30 20 10
Eps" Eps'
0.5 1 1.5 2 2.5 3 3.1 Frequency/GHz
Fig. 2: Dispersive permittivity of the liquid in the SAM phantom head used for simulation.
Table 1: Electrical properties of materials used for simulation
Phone Materials	e,	o (S/m)
Circuit Board	4.4	0.05.
Housing Plastic	2.5	0.005
LCD Display	3.0	0.02
Rubber	2.5	0.005
SAM Phantom Head		
Shell	3.7	0.0016
Liquid @ 900MHz	40	1.42
B. Numerical Technique
CST MWS, based on the finite integral time-domain technique (FITD), was used as the main simulation instrument. A non-uniform meshing scheme was adopted so that the major computation endeavor was dedicated to regions along the inhomogeneous boundaries for fast and perfect analysis. Fig. 3 shows the mesh for two cut planes of the complete model indicating the area with denser meshing along the inhomogeneous boundaries. The minimum and maximum mesh sizes were 0.3 mm and 1.0 mm, respectively. A total of 2,097,152 mesh cells were generated for the complete model, and the simulation time was 1163 seconds (including mesh generation) for each run on an Intel Core TM 2 Duo E 8400 3.0 GHz CPU with 4 GB RAM system.
Fig. 3: Mesh view for two cut planes of the complete model showing the non-uniform meshing scheme adopted for simulation.
The analysis workflow started from the design of the antenna with complete handset model in free space. The antenna was designed such that the S11 response was
less than -10 dB over the frequency band of interest. The SAM phantom head was then included for SAR calculation using the standard definition as /5/
SAR = —E2 2p
where E is the induced electric field (V/m), p is the density of the tissue (kg/m3), and o is the conductivity of the tissue (S/m). The resultant SAR values averaged over 1 gm and 10 gm of tissue in the head were denoted as SAR 1 gm and SAR 10 gm, respectively. These values were used as a benchmark to appraise the effectiveness in peak SAR reduction.
3. Sar reduction with lossy drude model
A. Lossy-Drude Model
The SA reduction effectiveness and antenna performance with different positions, sizes, and material properties of materials and metamaterials will be analyzed. The head models used in this study were obtained from a MRI-based head model through the whole brain Atlas website. Six types of tissues, i.e., bone, brain, muscle, eye ball, fat, and skin were involved in this model /17-19/. Table II shows their dielectric properties. Fig. 4 shows a horizontal cross-section through the eyes of this head model. The electrical properties of tissues were taken from /13/. Numerical simulation of SAR value was performed by the FDTD method. The parameters for FDTD computation were as follows. In our Lossy-Drude simulation model, the domain was 128 x 128 x 128 cells in the FDTD method. The cell sizes were set as Ax =Ay =Az = 1.0 mm. The computational domain was terminated with 8 cells perfectly matched layer (PML). A PIFA antenna was modeled for this paper by the thin-wire approximation. Simulations of materials and metamaterials are performed by the FDTD method with the lossy-Drude model /19/. The method is utilized to understand the wave propagation characteristics of materials and metamaterial.
Table 2: Dielectric tissue properties at 900 MHz
Material	Density, P (Kg-m-3)	Conductivity, a (S-m1)	Relative permittivity Er
Fat, bone	1130	0.12	4.83
Muscle, skin	1020	1.5	50.5
Brain	1050	1.11	41.7
Eye ball	1000	2.03	68.6
B. Analysis Method
Fig. 5 shows a portable telephone model at 900 MHz for the present study. It was considered to be a quarter wavelength PIFA antenna mounted on a rectangular conducting box. The conducting box was 10 cm tall, 4 cm wide, and 3
48
M. R. I. Faruque, M. T. Islam, N. Misran:
Influence of Material Attachment for EM absorption
Informacije MIDEM 41(2011)1, str. 46-52
Fig. 4: Human head model for FDTD computation.
cm thick. The PIFA antenna was located at the top surface of the conducting box. A ferrite sheet with a height of 90 mm, a width of 40 mm, and a thickness of 3.5 mm was attached to the conducting box as shown in Fig. 5.
Fig. 5: odels of the head and portable telephone with an attached ferrite sheet.
The SAM head model was considered for this research where it consists about 2,097,152 cubical cells with a resolution of 1 mm. The FDTD method was employed in the numerical analysis. Its discretized formulations were derived from the following Maxwell's time-domain equations:
Sff St
Wr
H.
(1)
V-oK
SE 1 , v c „
(Vx«)-—*
(2)
Eoe-
eoe-
where a * = coja.0(x" and a =qje,0e". A space domain enclosing the human head and the phone model is also shown
§
in Fig. 5. The time step was set to —,—, where c is the
-J 3c
speed of light, to guarantee the numerical stability. The time-stepping was performed for about eight sinusoidal cycles
in order to reach a steady state. To absorb outgoing scattered waves, the second order Mur absorbing boundaries acting on electric fields were used. An antenna excitation was introduced by specifying a sinusoidal voltage across the one-cell gap between the helix and the top surface of the conducting box.
The antenna output power is defined as
P =p +p +p
out abs ferr rad
dv+^J>|4
1 f ii
- oLe 2Jra 1
+ — Re (j*is x H* n. ds)
+ oW)dv
(3)
ume of Vh P1err is the power dissipated in the ferrite sheet with a volume of V, and Prad is the power radiated to the far-field, which can be calculated by integrating the normal component of the Pointing vector E x H* over a surface S completely surrounding the head/phone model configuration.
4. Impact on sar of ferrite sheet attachment
In this section, a ferrite sheet is placed between the antenna and a human head thus reducing the SAR value. In order to study SAR reduction of an antenna operated at the GSM 900 band, different positions, sizes, and ferrite sheet materials for SAR reduction effectiveness are also analyzed by using the FDTD method in conjunction with a detailed human head model.
Fig. 6 shows the simulation model which includes the handset with monopole type PIFA antenna and the SAM phantom head provided by CST MWS.
Fig. 6: The head and antenna model for SAR calculation.
where P b is the power absorbed in the head with a vol
49
Informacije MIDEM 41(2011)1, str. 46-52
M. R. I. Faruque, M. T. Islam, N. Misran:
Influence of Material Attachment for EM absorption
The dispersive models for all the dielectrics were adopted during the simulation in order to accurately characterize the ferrite sheet. The antenna was arranged in parallel to the head axis, the distance is varied from 5 mm to 20 mm, and finally 20 mm was chosen for comparison with the ferrite sheet. Besides that, the output power of the mobile phone model needs to be set before SAR is simulated. In this paper, the output power of the cellular phone is 500 mW at the operating frequency of 900 MHz In the real case, the output power of the mobile phone will not exceed 250 mW for normal use, while the maximum output power can reach to 1 W or 2 W when the base station is far away from the mobile station (cellular phone). Without ferrite sheet, the SAR simulation is compared with the results in /6, 17 / for validation, as shown in Table III also with ferrite sheet, the SAR simulation is compared with the result of /8/ for validation, as shown in Table IV. The calculated peak SAR 1 gm value is 2.002 W/kg, and SAR 10 gm value is 1.293 W/kg when the phone model is placed 20 mm away from the human head model without a ferrite sheet. This SAR value is better compared with the result reported in /13/, which is 2.43 W/kg for SAR 1 gm. The ferrite sheet material is utilized in between the phone and head models, and it is found that the simulated value of SAR 1 gm and SAR 10 gm are 1.043 W/kg and 0.676 W/kg respectively. The reduction about of 47.68% was observed in this study when a ferrite sheet is attached between the phone and human head models for SAR 1 gm. This SAR reduction is better than the result reported in /8/, which is 13% for SAR 1 gm. This is achieved using different radiating powers and impedance factors and it is because the electromagnetic source is being moved away from the head. Figs. 7-11 show the SAR value compared with the distance between phone and head models, width of ferrite sheet between 20-40 mm, thickness of ferrite sheet between 2-3.5 mm, and height between 40-90 mm respectively.
Table 3: Comparisons of peak sar at 900 mhz without ferrite sheet
is varied then the SAR value decreases. This is because the dielectric constant, conductivity, density and magnetic tangent losses are also varied. In Fig. 8, it can be observed that the SAR value reduces with the increase of the width of the ferrite sheet. As shown in Fig. 9, the SAR value decreases until a thickness of 3 mm, and then a different tendency i.e., it started to increase after 3 mm. The height is varied up to 90 mm in Fig. 10. From this figure it can be shown that if the height of the ferrite sheet increases, then the SAR value also decreases up to a height of 80 mm, and it started to increase after 80 mm. Fig. 11 shows the SAR value with ferrite sheet attachment for 1 gm and 10 gm average SAR. It can be observed that with ferrite sheet attachment the SAR value has been decreased for the case of 1 gm and 10 gm average SAR. The results implies that only suppressing the maximum current on the front side of the conducting box contributes significantly to the reduction of spatial peak SAR. This is because the decreased quantity of the power absorbed in the head is considerably larger than that dissipated in the ferrite sheet and it is because the electromagnetic source is being moved away from the head.
Distance Between Phone Model and Human Head Model Without Ferrite Sheet
<	s
ce	5
'S	4
v	3
^	2
*	1
>	1
0
I ■ ■ I
■ SAR(10gm) □ SAR(lgm)
5 10 15 Distance, d(mm)
20
Fig. 7: SAR value compared with the distance between phone model and human head model without ferrite sheet.
Tissue	SAR value (W/kg)
SAR value for [6] SAR value for [17] SAR value this work for 1 gm	2.17 2.28 2.002
Table 4: Comparisons of peak sar at 900 mhz with ferrite sheet
Tissue	SAR value (W/kg)
SAR value for [8] SAR value this work for 1 gm	1.392 1.043
The reduction efficiency of the SAR depends on its width and height. In order to definitely confirm this, 1 gm and 10 gm average SAR versus distance, width, thickness, and height are plotted in the Figs. 7-11. In Fig. 7, it is shown that if the distance between phone and human head models
2
«H
0	1
1	»-5 ► 0
Width of Ferrite Sheet
Mi
20 30 40 Width, w(mm)
■ SAR(lOgm) □ SAR(lgm)
Fig. 8: SAR value compared with the width of the ferrite sheet.
50
M. R. I. Faruque, M. T. Islam, N. Misran:
Influence of Material Attachment for EM absorption
Informacije MIDEM 41(2011)1, str. 46-52
Thickness of Ferrite Sheet
« 2
<
«a 1.5
u 9
a >
0.5
■ SAR(10gm) □ SAR(lgm)
2 2.5 3 3.5 Thickness,t (mm)
Fig. 9: SAR value compared with the thickness of the ferrite sheet.
Height of Ferrite Sheet
■ SAR(10gm) □ SAR(lgm)
40 50 60 70 80 90
Height, h(mm)
Fig. 10: SAR value compared with the height of the ferrite sheet.
Distance Between Phone Model and Human Head Model With at Ferrite Sheet		
05 "S 1.5 I 1 J 0.5	Uu 5 10 15 20 Distance, d(mm)	■ SAR(lOgm) □ SAR(lgm)
		
Fig. 11: SAR value compared with the distance between phone model and human head model with ferrite sheet.
5. Conclusion
The EM interaction between an antenna and the human head with ferrite sheet material has been discussed in this paper. Utilizing material in the phone model a SAR value is achieved of about 0.676 W/kg for SAR 10 gm and 1.043 W/kg for SAR 1 gm. Based on the 3-D FDTD method with lossy-Drude model, it is found that for the both cases peak SAR 1 gm and SAR 10 gm of the head can be reduced
by placing materials between the antenna and the human head. Numerical results can provide useful information in designing communication equipment for safety compliance.
Acknowledgement
The authors would like to thank Institute of Space Science (ANGKASA), Universiti Kebangsaan Malaysia (UKM) and the MOSTI Secretariat, Ministry of Science, Technology and Innovation of Malaysia, e- Science fund: 01-01-02-SF0566, for sponsoring this work.
References
/1/ IEEE C95.1-2005. "IEEE Standards for safety levels with respect to Human Exposure to Radio Frequency Electromagnetic fields,3KHz to 300GHz," Institute of Electrical and Electronics Engineers, Inc. New York, NY 2005. /2/ International Non-Ionizing Radiation Committee of the International Radiation Protection Association, "Guidelines on Limits on exposure to radio frequency electromagnetic fields in the frequency range from 100KHz to 300GHz," Health Physics, vol.54 no. 1, pp. 115-123, 1988. /3/ A. Hirata, T. Adachi, and T. Shiozawa, "Folded loop antenna with a reflector for mobile handsets at 2.0 GHz," Microwave Opt. Technol, Lett., vol.40, no.4, pp. 272-275, Feb. 2004. /4/ K .H. Chan, K .M .Chow, L .C .Fung, and S. W. Leung, "Effects of using conductive materials for SAR reduction in mobile phones," Microwave Opt. Technol, Lett., vol.44, no. 2, pp. 140-144, Jan. 2005.
/5/ L.C Fung, S .W. Leung, and K. H. Chan, "An investigation of the SAR reduction methods in mobile phone application," IEEE International Symposium on EMC., vol.2, pp. 656-660, Aug. 2002.
/6/ J. Wang and O. Fujiwara, "FDTD computation of temperature rise in the human head for portable telephones," IEEE Trans. Microwave Theory Tech., vol. 47, no. 8, pp. 1528-1534, Aug.1999.
/7/ S. Curto, P. McEvoy, X. L. Bao, and M. J. Ammann, "Compact patch antenna for electromagnetic interaction with human tissue at 434 MHz," IEEE Trans. on Antennas and Propagation, vol. 57, no. 9, Sep. 2009. /8/ J. Wang and O. Fujiwara, "Reduction of electromagnetic absorption in the human head for portable telephones by a ferrite sheet attachment," IEICE Trans. Commun., vol. E80b, no. 12, pp. 1810-1815, Dec. 1997.
/9/ K Kiminami, T Iyama, T Onishi, and S Uebayashi, "Novel specific absorption rate (SAR) estimation method based on 2-D scanned electric fields," IEEE Trans. on Electromagnetic Compatibility., vol. 50, no. 4, Nov. 2008. /10/ R. G. Vaughan, and N. L. Scott, "Evaluation of Antenna Configurations for Reduced Power Absorption in the Head," IEEE Trans. On Vehicular Technology, vol. 48, no. 5, Sep. 1999 /11/ C. H. Li, N. Chavannes, and N. Kuster, "Effects of hand phantom on mobile phone antenna performance," IEEE Trans. On Antennas and Propagation, vol. 57, no. 9, Sep. 2009. /12/ O. Kiverkas, J. Ollikainen, T. Lehtiniemi, and P. Vainikainen, "Bandwidth, SAR, and efficiency of internal mobile phone antennas," IEEE Trans. on Electromagnetic Compatibility., vol. 46, no. 1, Feb. 2004.
/13/ J. N. Hawang and Fu-chiarng chen. "Reduction of the peak SAR in the Human Head with Metamaterials" IEEE Trans. on antenna and propagation vol. 54 (12) 3763-3770, Dec. 2006.
51
M. R. I. Faruque, M. T. Islam, N. Misran: Informacije MIDEM 41(2011)1, str. 46-52	Influence of Material Attachment for EM absorption
/14/ L. C. Fung, S. W. Leung, and K. H. Chan, "Experimental study of SAR reduction on commercial products and shielding materials in mobile phone applications," Microwave and Optical Technology Letters, vol. 36, no. 6, pp. 419-422, March. 2003.
/15/ J. B. Pendry, A. J. Holen, D. J. Robbins, and W. J. Stewart, "Magnetism from conductors and enhanced nonlinear phenomena," IEEE Trans. Microwave Theory Tech., vol. 47, no. 11, pp. 2075-2084, Nov. 1999.
/16/ G.F. Pedersen and J.B. Andersen, "Integrated antennas for handheld telephones with low absorption", Proc. 44th IEEE Veh. Tech. Conf., Stockholm, Sweden, June. 1994, pp. 1537-1541.
/17/ C .M .Kuo. and C. W. Kuo, "SAR distribution and temperature increase in the human head for mobile communication," in IEEE-APS Int. Symp. Dig., Columbus, OH, 2003, pp. 1025-1028.
/18/ R. Y. S. Tay, Q. Balzano and N. Kuster, "Dipole configuration with strongly improved radiation efficiency for hand-held transceivers", IEEE Trans. Antennas Propagat., vo1. 46, no. 6, pp. 798-806, June. 1998.
/19/ B. B. Beard, W. Kainz, T. Onishi, T. lyama, S. Watanabe, O. Fujiwara, J. Wang, G. Bit-Babik, A. Faraone, J. Wiart, A. Christ, N.Kuster, A. Lee, H. Kroeze, M. Siegbahn, J. Keshvari, H. Abrishamkar, W. Simon, D. Manteuffel, and N. Nikoloski, " Comparisons of computed mobile phone induced SAR in the SAM phantom to that anatomically corrects model of the human head," IEEE Transaction on Electromagnetic Compatibility, vol. 48, no.2, pp 397-407, 2006.
Mohammad Rashed Iqbal Faruque1, Mohammad Tariqul Islam2, Norbahiah Misran1, 2
1Dept. of Electrical, Electronic and Systems Engineering, Faculty of Engineering and Built Environment, Universiti Kebangsaan Malaysia, 43600 UKM, Bangi, Selangor, Malaysia. 2Institute of Space Science (ANGKASA), Universiti Kebangsaan Malaysia, 43600 UKM, Bangi, Selangor, Malaysia.
rashedgen@yahoo.com, titareq@yahoo.com, bahiah@vlsi.eng.ukm.my
Prispelo: 05.02.2010
Sprejeto: 03.03.2011
52
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
MPEG-2 TS MULTIPLEXER IN FPGA TECHNOLOGY
Denis Pavliha, Andrej Trost University of Ljubljana, Faculty of Electrical Engineering, Ljubljana, Slovenia
Key words: Moving Picture Experts Group 2 Transport Stream (MPEG-2 TS), data multiplexer, Field Programmable Gate Array (FPGA), video, Ether-
Abstract: This paper discusses design and testing of a Moving Picture Experts Group 2 (MPEG-2) Transport Stream (TS) multiplexer in Field Programmable Gate Array (FPGA) technology that would transmit multiplexed packets via Ethernet. Multiplexer is designed in accordance with standard ISO/ IEC 13818-1, thus it is fully compatible with standard players. The digital design is very flexible since adding additional payload sources is effortless. Use of a microprocessor has been dropped since it often provokes non-deterministic situations, hence the design is very robust yet fully programmable.
Podatkovni multiplekser MPEG-2 TS v vezju FPGA
Kjučne besede: Moving Picture Experts Group 2 (MPEG-2) transportni pretok, podatkovni multiplekser, Field Programmable Gate Array (FPGA), video, Ethernet.
Izvleček: V članku je predstavljen razvoj in preizkušanje podatkovnega multiplekserja za transportni pretok Moving Picture Experts Group 2 (MPEG-2 TS) v tehnologiji Field Programmable Gate Array (FPGA), ki oddaja multipleksirane podatkovne pakete prek omrežja Ethernet. Multiplekser je izdelan v skladu s standardom ISO/IEC 13818-1, zaradi česar je popolnoma kompatibilen s standardnimi predvajalniki. Digitalno vezje je zelo fleksibilno, saj je vključevanje dodatnih podatkovnih virov enostavno. Uporaba mikroprocesorja je bila opuščena, saj ta pogosto izzove nedeterministične situacije. Vezje je torej zelo robustno, vendar še vedno popolnoma programabilno.
1. Introduction
As result of rapid evolution of consumer electronics having been faced recently we can notice an immense increase of data transfers worldwide. Predictions have been made about global Internet Protocol (IP) traffic quintupling from 2008 to 2013 /1/. Extensive bandwidth requirements are consequence of technological convergence which is an operators' concept of bundling together various structure-independent services the user can then access /2/, which can be seen from the engineer's point of view as merging of technologies and processes from multiple industries. It is only in the last decade when convergence has taken places in our everyday, joining mobile and stationery communications with broadband internet, terminal applications, digital television and other technologies.
When discussing digital television the data-transferring aspect of such an application should be considered. Nearly real-time transmission of moving picture (i.e. streaming) is very pretentious about required bandwidth, especially when transmitting high-definition (HD) content. Required transmission bitrates for Standard-Definition Television (SDTV) and for High-Definition Television (HDTV) are normally up to 7 Mbps and 30 Mbps, respectively /3/. Because of these bandwidth demands one should reflect on optimizing the data path not only by the means of improving payload compression, but mainly by using a proper information coding system providing an optimal transmission of transferred content. Today it is already very common to have network connections up to 100 Mbps over copper /4/ or 1000 Mbps over fiber; nevertheless an optimal coding system is required because transmission of video is a time-critical application.
If we take a look at a common digital television (DTV) program we can notice it consists of several elements. First, there is the video signal that describes the moving picture, together with one or more audio signals and probably equipped with some other data, such as Electronic Program Guide (EPG). Therefore we need to establish the best possible way of coding data before transmitting it, especially because we want to transmit multiple streams via a single communications channel. Such coding system is described in standard ISO/IEC 13818-1 /5/, known as Moving Picture Experts Group 2 (MPEG-2) Transport Stream (TS). It defines delivery of multiple elementary streams using services of multiplexing, timing, buffer management and control data transmission /6/.
Since recent hardware development tends toward solutions that are not only highly compact but also complex enough to perform sophisticated functions, we developed a solution that embeds an MPEG-2 TS Multiplexer carried out within a Field Programmable Gate Array (FPGA) circuit using digital logic elements only. Therefore the use of an embedded microprocessor has been dropped, which was possible mainly because a multiplexer is actually a fundamental unit of FPGA designs. Therefore a complex multiplexer like MPEG-2 TS can be carried out using basic smaller multiplexers with some additional complex control logic. Nevertheless such a system needs to be flexible enough to embed all the mechanisms that are required by standard ISO/IEC 13818-1 which fully determines MPEG-2 TS /5/.
53
Informacije MIDEM 41(2011)1, str. 53-58
D. Pavliha, A. Trost:
MPEG-2 TS Multiplexer in FPGA Technology.
2. Methods
An ordinary digital television (DTV) program consists of a video signal, an audio signal and auxiliary data (e.g. Electronic Program Guide - EPG). Those fundamentals can be interpreted as elementary streams of that program. Because we want them transferred over a common communications channel we need to packetize the elementary streams and conduct them through the process of multiplexing. An example data multiplexer is presented in Fig.1.
VIDEO STREAM
AUDIO STREAM
DATA STREAM
(EPG^
MUX
MULTIPLEXED
STREAM
CONTROL
Fig. 1: Example data multiplexer.
The three elementary streams we can see in Fig.1 are coupled into a single multiplexed data stream that embeds both video and audio, together with some additional data (e.g. EPG). Such a stream represents a single DTV program. Nevertheless, if hardware is powerful enough we can perform multiplexing of more than just one DTV program to join them into a single stream that can be transferred via a communications channel. An example of multiplexing three programs into a single stream is shown in Fig.2.
VIDEO STREAM
Oh
AUDIO STREAM.
DATA STREAM.
VIDEO STREAM.
g AUDIO STREAM.
Q-
DATA STREAM.
™ VIDEO STREAM.
g AUDIO STREAM
g Oh
DATA STREAM k
MUX
MULTIPLEXED
STREAM
CONTROL
Fig. 2: Example multiprogram data multiplexer.
In order to achieve a configuration capable of multiplexing several digital television (DTV) programs into a single data stream, one should consider a proper hardware configuration that would allow construction of a compact yet powerful device. The solution we developed is based on a Field Programmable Gate Array (FPGA) integrated circuit, together with some additional communication periphery.
2.1 Digital design
Schematics of Field Programmable Gate Array (FPGA) circuit contents are shown in Fig.3. The Moving Picture Experts Group 2 Transport Stream (MPEG-2 TS) multiplexer shown in Fig.3 is basically a complex digital switch, made of several small multiplexers. Due to the FPGA technology being carried out mainly with look-up tables (LUT) and flip-flops (FF), a multiplexer is actually a "natural" unit of an FPGA digital design.
I MPEG-2 TS MULTIPLEXER
NAL STROB
CONTROL
Fig. 3: Contents of FPGA circuit.
The main multiplexer in the MPEG-2 TS digital design (MUX in Fig.3) switches between various sources and it is based on 100 MHz clock that is captured directly from an external oscillator, hence jitter is negligible.
Program Specific Information (PSI) Table generation unit produces tables that are needed in MPEG-2 TS to specify what elements are contained within the Transport Stream. These tables are Program Association Table (PAT), Program Map Table (PMT) and Selection Information Table (SIT), and carry information about elementary streams that are then packetized and multiplexed together with other payload data into single Transport Stream.
Program Clock Reference (PCR) section handles two counters that are sampled separately but joined together into a single data packet. The packet contains samples of 27 MHz and 90 kHz clocks and is needed for the decoder to synchronize and properly present the decompressed content at correct time. Since the 27 MHz counter actually represents System Time Clock (STC) it has to have a clean
54
D. Pavliha, A. Trost:
MPEG-2 TS Multiplexer in FPGA Technology.
Informacije MIDEM 41(2011)1, str. 53-58
source, hence it is driven directly from a 27 MHz oscillator so that jitter is insignificant. Clock with frequency 90 kHz is, however, produced using a Digital Clock Manager (DCM) unit and therefore additional jitter is present.
Program Block, marked as "Program 1" on Fig.3, contains logic to handle, temporary store and multiplex a single video signal, represented in the form of a Network Abstraction Layer (NAL) bit stream. Such a representation of video signal is typical of standard Motion Picture Experts Group 4 - Advanced Video Coding (MPEG-4/AVC), more known as H.264 /7/. A stream like this can be handled by our MPEG-2 TS multiplexer quite effortlessly. Program Block incorporates logic to sample NAL bit stream (input NAL_BYTE) regarding appropriate flags (inputs NAL_VALID, NAL_DONE and NAL_STROB) and stores it into a First-In-First-Out (FIFO) buffer, generated as data vector with a pointer that act together as a circular buffer. When first half of buffer is full the Program Block adds the proper Packet Identifier (PID) and sends the NAL bit stream to the main multiplexer as a Packetized Elementary Stream (PES), while still continuing to store the incoming NAL bit stream into the second half of FIFO. Whether the incoming NAL stream does not include Presentation Set Access Units (PS AU), the Program Block can add both Stream Parameter Set (SPS) and Picture Parameter Set (PPS).
Since main benefit of multiplexing video or audio signals is the possibility of packing more such signals into a single transport stream, the Program Block (PES in Fig.3) can be multiplied into several blocks, each handling its own NAL bit stream. Adding parallel blocks is not an issue in FPGA circuits, however the number of available logic blocks and speed of the outgoing Ethernet connection represent the limitation.
Additionally, so called NULL packets can be added to the transport stream. NULL packets are packets that are identified with a Packet Identifier (PID) of 0x1FFF and contain only 0xFF values as their payload. Their purpose is to maintain a constant bit rate of the output transport stream by inserting them when no other packet is scheduled to be multiplexed. However, an upper limitation of inserting these packets has to be implemented in the multiplexer control logic. If not, the Ethernet connection can be flooded and the receiver could not handle proper packet reception anymore.
Output of the multiplexer is a 188-bytes-long data vector (ETH_DATA in Fig.3) sent directly to the LocalLink interface /8/ of the Xilinx Tri-Mode Ethernet Media Access Controller (TEMAC) core, together with trigger (ETH_TRIG) and busy (MUX_BUSY) signals. The output represents a single MPEG-2 TS packet; therefore an Ethernet frame can contain only one MPEG-2 TS packet with a single higherlevel packet (PSI, PES or NULL). This is actually a quite strict limitation, which was imposed in order to minimize the time of designing the multiplexer core. Nevertheless, performance is not affected significantly because use of Gigabit Ethernet is applied.
Because MPEG-2 TS packets are normally sent through User Datagram Protocol (UDP) over Internet Protocol (IP) and there is no feedback about success of transmission,
/5/ defines a special section that is contained in the header of TS named Continuity Counter which is a 4-bit value that increases every new transmission of a packet with the same PID number. Since there is the restriction of a single packet within one Ethernet frame, we can implement the Continuity Counter outside the MPEG-2 TS multiplexer. In our case the Continuity Counter resides in the LocalLink interface module. Consequently we need to send out of the core a flag vector to signalize the PID of the packet being currently transmitted (CC_COUNT in Fig.3) so that the Continuity Counter can increase properly regarding the PID of the packet being sent.
Digital design described in this chapter was realized with FPGA circuit XC5VFX70T-1FFG1136 /9/ that resides on evaluation platform ML507 /10/.
2.2	Hardware configuration
ML507 Evaluation Platform /10/ is a general-purpose development board, based on XC5VFX70T-1FFG1136 that is an FPGA circuit from Virtex-5 FXT Family /9/. The FPGA itself incorporates 12 Digital Clock Managers (DCMs) that can be used to generate various clock signals. 5,328 kilobits of Block Random Access Memory (BRAM) is available and a maximum of 640 single-ended (or 320 differential-pair) input-output (I/O) pins can be utilized. The designer can also bring into use four Gigabit Ethernet Media Access Controller (GEMAC) blocks and 16 High-Speed Rocket I/O GTX transceivers.
ML507 board was mainly selected because of the need for rapid prototyping having been faced. The board embeds both clocking components (27 MHz and 100 MHz oscillators) and connectivity periphery; integrated circuit Marvel 88E1111 is connected to GEMAC using Serial Gigabit Media-Independent Interface (SGMII) and acts as the Physical layer of Ethernet IEEE 802.3 connection /11/ together with Halo RJ-45 connector with magnetics. Hardware configuration that has been used is shown in Fig.4.
As seen in Fig.4 all the Network Abstraction Layer (NAL) signals (NAL_BYTE, NAL_VALID, NAL_DONE and NAL_STROB) are brought into circuit from outside (as input pins) while clock signals (CLK_100M and CLK_27M) are captured from on-board oscillators.
When implemented the MPEG-2 TS design takes 23% of Flip-Flops (FF) and 40% of all available slices in XC5VFX70T. Amongst those, 24% are used as Look-Up Tables (LUT) only, 44% as Flip-Flops (FF) only and the rest (32%) utilizing both LUT and FF. Beside logic elements, 3 units of 18k Block Random Access Memory (RAM) are used. Implementation results are shown in Fig.5.
2.3	Operational process
The whole digital design is synchronized to run at 100 MHz main clock (CLK_100M in Fig.3 and Fig.4). Frequency of multiplexing can be modified through an internal signal, however it is intended to leave the setting at its default value in order to achieve timings that are prescribed by /5/.
55
Informacije MIDEM 41(2011)1, str. 53-58
D. Pavliha, A. Trost:
MPEG-2 TS Multiplexer in FPGA Technology.
Fig. 4: Hardware configuration.
The Network Abstraction Layer (NAL in Fig.3) handling logic located in Program Block (Program 1 in Fig.3) is designed to produce a READY internal flag that signalizes a whole Packetized Elementary Stream (PES) packet is waiting in First-In-First-Out (FIFO) buffer to be sent.
Main multiplexer (MUX in Fig.3) is designed as a priority switch. If the READY internal flag is detected, PES packet is sent to Ethernet LocalLink interface; else an appropriate table (PAT, PMT, SIT) or counter (PCR) is generated accordingly to timing specifications of /5/ and transmitted to LocalLink interface in the form of a 188-byte vector. If none of the payload-transmitting conditions are met, a NULL packet may be sent instead. Nevertheless, since transmission of NULL packets should be limited in order not to flood the Ethernet connection, not sending anything at all is frequently more appropriate.
The output data vector is then sent to the LocalLink interface of the Xilinx Tri-Mode Ethernet Media Access Controller (TEMAC) core together with flags, where the Continuity Counter (CC) is added and data is encapsulated into the User Datagram Protocol over Internet Protocol (UDP/IP) and sent as an Ethernet frame.
3. Results
Circuit design has been developed using Xilinx ISE Foundation v10.1 K31 (Xilinx, San Jose, USA, 2008) in Very High Speed Integrated Circuit Hardware Description Language (VHSIC HDL - VHDL). Reception of generated multiplexed
Device Utilization Summary			
Slice Logic Utilization	Used	Available	Utilization
Number of Slice Registers	10.444	44,800	23%
Number used as Flip Flops	10.444		
Number of Slice LUTs	7.720	44.800	17%
Number used as logic	7.70S	44.800	17%
Number using 06 output only	7.407		
Number using 05 output only	213		
Number using 05 and 06	88		
Number used as exclusive route-thru	12		
Number of roule-lhrus	230	89.600	1%
Number using 06 output onty	225		
Number using 05 output onty	5		
Slice Logic Distribution			
Number of occupied Slices	4.524	11.200	40%
Number of LUT Flip Flop pairs used	13.816		
Number with an unused Flip Flop	3.372	13.816	24%
Number with an unused LUT	6.096	13.816	44%
Number of fully used LUT-FF pairs	4.348	13.816	31%
Nu m be r of uniqu e c o ntrol sets	1,107		
IO Utilization			
Number of bonded IQBs	62	640	9%
Number of bonded IPADs	6		
Specific Feature Utilization			
Number of BlockRAMfFIFO	2	148	1%
Number using BlockRAM only	2		
Total primitives used			
Number of 1Bk BlockRAM used	3		
Total Memory used (KB)	54	5.328	1%
Number of BUFQ/BUFGCTRLs	7	32	21%
Number used as BUFGs	7		
Number of BUFDSs	1	B	12%
Number of BUFHs	1	32	3%
Number of DCM_ADVs	1	12	8%
Number ofGTX.DUALs	1	8	12%
Number of TEMACs	1	2	50%
Fig. 5: Implementation results.
test stream was performed on a workstation based on the AMD Athlon64 3000+ Processor (2.0 GHz) with 1.5 GB of DDR SDRAM, equipped with Gigabit Ethernet Network Interface Controller (NIC) Realtek RTL8111B.
To verify the correct reception of User Datagram Protocol (UDP) over Internet Protocol (IP) Wiresharksoftware /12/ was used as it performs network protocol analysis. Results from Wireshark are shown in Fig.6 where it is noticeable that UDP/IP packets are sent via Ethernet to Media Access Controller (MAC) of the workstation and are properly received. Each received packet consists of 231 bytes of data which is the sum of 188 bytes representing MPEG-2 TS payload data and 43 bytes of MAC/IP/UDP headers. Packets are marked as part of the multicast group with IP address 239.192.1.100 on port 5500.
56
D. Pavliha, A. Trost:
MPEG-2 TS Multiplexer in FPGA Technology.
Informacije MIDEM 41(2011)1, str. 53-58
(tie lot Vie* bo '.K*utt tmttyit ^uihIks Heap
1» mm mm h * s ^	q □ m a ^ a
EJltr.	r<j10,61 JQ9 jrnl tq2J9a«J10J)in<i MpjwilcqX - ijfrtwioiv, £l«r dp%*,
■fM'M'I-l»«
61 o.oomi
« 0.009104 6i 0.009368 «4 0.009*9« 61 0.009012
66	D.009B9S
67	0.010096 08 O.OlPlOi fi«J O.OIWIS
70	0,010144
71	0.QI0154
72	0.01(1416 ii 0.010M2
74	o.aicno
75	0.010945
22;44:< 22:44:< ZZ:44 :l 22r44:< 22I44;( 22:44:1 22:*4:< 22;44;(
22:«:<
22:44
22:44r<
H-.M.I
27:44:1
22r«:<
c	MtCM	Protocol Soma
abicd Dfi:Oa:«);lAi?i!d7 MPCC PtS 10.6,1.200
II lllll'III^M II II 1 II" IMIII^M <11 li 1 ■' H ^TTI 1
hpcc pes lo.e.1.200
WHS 10,0,1.200 HPCG PCS 10.6,1.200 UDP 10.6,1.200 KMCG PCS 10.0,1.200 HPCC PCS 10.6.1.200 UUP	10.6.1.200
UW	10.6.1.200
MPCG PCS 10.6.1.200 MPEG PES 10.6,1.200 «PEC PCS 10.6.1.200 MPtt, m 10.6, L-200 MPEG PES 10.6,1.200 UDP	ID.6.1.700
MPEG PES 10.6.1. 200
B:jb:td G:£B:*b:cd 6:3B.ab!Cd 8:SB:jb:td fr;Blf;ab;Cd
6:®9:ab:cd
6:M:ab:cd 6;5B;ab;cd 6:88iabrcd ti:s»:ab:cd B:S»:jb:cd 6:8B:ab:cd
00;0j:td:lfi:7e;d' 00:0j:cd:10;7<:d7 00;0a;cd:10;7e:d7 00:0j;cd:16:7e:d7 00;0Ji;<d:l<i:/*:d7 00;aj.Ld.l&;7tid7 oo:oarcd:ie:7e:d7 00:0a;«J:10;7»:d7
O0:Oa:cd:i6:7e:d? oo;oa:cd:lo:7e;d7 00:0a:cd:l«i7»:d7 oo:0a:cd:i6:/e:d? Q0:0j:cd:lfl:7p:d7 00:0arcd:l6:7nd7
OeriKtiU-n J19.1VM.11»
219,102.1.100 239.192.1,100 239.192.1,100 239,102.1.100 2 ».192.1.100 239.192.1.100 239.192.1.100 219.192.1.IOO ?39-19?-) • 100 239.192.1.100 219.192,1,100 239,192,1. 100 239.192.1.100 239.197.1.100 239.192.1,100
-	Pi ¿re* 60 (2il bytes on »ire, 231 ttyxei captured)
.	ttiwrrwr n, srcr 22r4i:66;86rabrcd (22;44 leeiflsrancfl), ostr •JunrlchT_l6:7e:tf7 (00:0a:cd:l6:7e:d7)
■	internet Protocol, src: 10.6.1.200 (10.6.1.200). on: 239.192.1.100 (239.192.1.100)
<	Ui.Gr CMLjyijn PruLutul, SrC Purl: ftp-jddr-irvrl (»DO), oil Purl; ftp jdilr-irvrl (»1»)
.	iso/irc i9<ia i pio-OrIOI cc-7
0000	00 ija
0010	00 t5
0020	01 W
0040	01 *o
ooso	rs rr
0050	ff ff
QOCiO	ff ff
0070	fS if
ooso	ri if
oow	ft rf
OO.iO	ff M
oobo	ff fr
OOcO	ff ff
noiio	ff fi
OObO	ff ff
CO 16 ?e 07 22 44 00 00 AO 00 05 11 C li 7c 00 C4
ab	Cd OS	00 45	01
3$ 15 Oa	06 01	cS *f	CO
___ - -- -	00 OO 4,r	4i 01	17 00 00
oo oo ab oo oo go	oo oo oi	ff ff	ff ff	ff
tr ti ft rr t5 tr	ff ft rr	tr t5	ft rr	rr
f5 tr ft rf ft n	t> ft rf	rr tr	ft r5	rr
ff ff fi ff ff ff	ff ff fj	ff ff	ff ff	ff
rr rt rr rr rs tr	rt rt rr	rr r5	rt rr	rr
15 11 ri tr it 11	15 ri ir	it n	ri (5	it
it fr rs rr bo 75	lis ?o tr	11 tr	ri bo ir
rO 00 dr 70 00 1?	ff rf ff	ff ff	fS ff	ff
ff t5 rf fr ff rf	ff rs rr	ti ri	rf fr	ri
ff ff ff f5 ff ff	ff ff ff	f5 ff	ff ff	ff
ff ff ff ff ff f5	ff ff ff	ff ff	f5 ff	ff ff fi ff ff ff
-."0 f
. . . E.
Fig. 6: Network Protocol Analysis results from Wireshark.
Received MPEG-2 TS stream is then isolated using Wire-shark to include only payload without MAC/IP/UDP headers and after that analyzed using MPEG-2 Transport Stream Analyzer Enhanced software by Manzanita Systems, Ltd /13/. Structure of the analyzed stream that has been produced using our MPEG-2 Multiplexer is shown in Fig.7.
PAT Version 0 pro oxoooo	Nir_pro oxooif			
	Program 1 PID OxOlCO	PMT Version 0	[>escriptor OxB8 reglslration_descriptor	
			0x1011 MPEG-1 / AVC / H.264 Video	avc_video_de5CNptor
			0x1001 PCR	
Fig. 7: Structure of analyzed MPEG-2 Transport Stream that includes sample H.264 video payload.
Ratio of individual elements is also analyzed using MPEG-2 Transport Stream Analyzer Enhanced software and is shown in Fig.8 where it can be seen that main part of the stream is taken by video payload. All the other elements occupy less than 2% each. Since table timing limitations prescribed in /5/ are met, such ratio is expected and correct.
To confirm that produced stream is compliant with standard /5/ we performed another analysis. The second tool used is Stream Analyzer by Elecard /14/. Results of analysis are illustrated in Fig.9.
Stream structure in Fig.9 is the same as in Fig.7; it consists of a single program containing one H.264 video stream. Packet analysis shown in the lower part of Fig.9 also confirms that Presentation Set Access Units (PS AU) of Sequence Parameter Set (SPS) and Picture Parameter Set (PPS) are properly generated, since their decoding is successful.
As mentioned in (2.1.) Program Block (PES in Fig.3) can be multiplied into several blocks in order to multiplex various NAL bit streams into a single MPEG-2 TS. A com-
Fig. 8: Ratio of individual elements in the analyzed MPEG-2 Transport Stream.
Fig. 9: Analysis of MPEG-2 TS using Stream Analyzer.
parison is shown in Fig .10 where utilization of FPGA circuit XC5VFX70T-1FFG1136 can be seen when only one program block is used (a) or another one is added (b).
As seen in Fig.10, when adding a second program stream, the number of used slices with only Look-Up Table (LUT) basically does not increase; however, increase of Flip-Flop (FF) and combined (LUT with FF) slices is obvious.
Since MPEG-2 TS multiplexer is a time-critical application, timing performance is significant. Timing report that has been generated by the tools /15/ claims all timing con-
57
Informacije MIDEM 41(2011)1, str. 53-58
D. Pavliha, A. Trost:
MPEG-2 TS Multiplexer in FPGA Technology.
25000 20000 15000 10000 5000 0
a)
b)
t
LUT with FF FF
I LUT
One program Two programs
Fig. 10: LUTand FFutilization comparison.
straints have been met. There have been 4179 paths and 1003 endpoints analyzed without any errors. Minimum period is 7.609 ns, which represents a maximum frequency of 131.42 MHz.
4. Discussion
This paper discusses design of a Moving Picture Experts Group 2 (MPEG-2) Transport Stream (TS) multiplexer in Field Programmable Gate Array (FPGA) integrated circuit. FPGA allows creating digital designs that are fully programmable while lacking the use of a microprocessor.
The latter is frequently a source of problems, since multiple error-prone situations can occur; first, software can contain bugs that are harder to identify in comparison with a digital design, described in VHDL code. Besides, non-deterministic situations can be provoked as consequence of several microprocessor-related mechanisms (stack, interrupt controllers, exception handlers). All those facts speak in favor of developing a MPEG-2 TS multiplexer using FPGA rather than a microprocessor.
The MPEG-2 TS multiplexer we designed performs in accordance with standard /5/, hence it is fully compatible with hard and/or soft players available on both consumer electronics and professional equipment market.
Upgrade to supporting multiple H.264 streams is possible and effortless. If other content than Network Abstraction Layer (NAL) bit stream shall be multiplexed, only minor modifications in the sampling logic before storage in First-In-First-Out (FIFO) have to be made. The limitations represent the chosen FPGA and the outgoing communication interface, in our case Gigabit Ethernet.
As benefit of this FPGA-based design, use in Application-Specific Integrated Circuit (ASIC) technology could be applied. To make that possible, some improvements should be implemented. Since all stream data (program tables, stream parameters) is stored in FPGA an external interface to an Electrically Erasable Programmable Read-Only Memory (EEPROM) should be considered. The data could, then, be externally programmed, which could lead to a far more flexible system and after all, reduce costs in large quantities of the application.
Acknowledgments
The authors of this paper thank Laboratory of Biocyber-netics (University of Ljubljana, Slovenia) for Xilinx ML507 Evaluation Board and Manzanita Systems, Ltd. for software evaluation.
References
/1/ Cisco, Cisco Visual Networking Index: Forecast and Methodology, 2008-2013, 2009.
/2/ D. Colbeck, "Communications Convergence," in 6th IEE Conference on Telecommunications, Edinburgh, UK, 1998, pp. 258-262.
/3/ Y. Zhang, H. Wei, and Y. Qiao, "A multi-channel HD video streaming in digital community network: Video rate adaptation and playback adjustment," IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, vol. 53, no. 4, pp. 1449-1455, NOV 2007, 2007.
/4/ E. Heine, J. Hogenbirk, P. Jansweijer et al., "Using VDSL2 over copper in the vertical string," NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELER-ATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, vol. 602, no. 1, pp. 155-158, APR 11 2009, 2009.
/5/ ISO/IEC, "13818-1, Information technology - Generic coding of moving pictures and associated audio information: Systems," ISO Copyright Office, 2000.
/6/ J. Arnold, M. Frater, and M. Pickering, Digital Television, New Jersey, USA: John Wiley & Sons, Inc., 2007.
/7/ ISO/IEC, "14496-10, Information Technology - Coding of AudioVisual Objects, Part 10: Advanced Video Coding," ISO Copyright Office, 2004.
/8/ Xilinx. "LocalLink Interface," http://www.xilinx.com/products/ ipcenter/LocalLink_UserInterface.htm.
/9/ Xilinx, "Virtex-5 FPGA Users Guide (UG190)," Xilinx, 2009. http://www.xilinx.com/support/documentation/user_guides/ ug190.pdf
/10/ Xilinx. "Virtex-5 FXT FPGA ML507 Evaluation Platform," http:// www.xilinx.com/products/devkits/HW-V5-ML507-UNI-G.htm.
/11/ IEEE. "802.3 Ethernet Working Group," http://www.ieee802. org/3/.
/12/ Wireshark Foundation. "Wireshark: The World's Foremost Network Protocol Analyzer," http://www.wireshark.org/.
/13/ Manzanita Systems. "MP2TSAE - MPEG-2 Transport Stream Analyzer Enhanced," http://www.manzanitasystems.com/ mp2tsa.html.
/14/ Elecard. "Stream Analyzer," http://www.elecard.com/products/ products-pc/professional/stream-analyzer/.
/15/ Xilinx. "Design Tools," http://www.xilinx.com/tools/designtools. htm.
Denis Pavliha, B.S. University of Ljubljana, Faculty of Electrical Engineering Tržaška c. 25, 1000 Ljubljana, Slovenija Phone: +386 (0)1 4768 771; Fax:+386 (0)1 4264 658 Email: denis.pavliha@fe.uni-lj.si
Andrej Trost, PhD.
University of Ljubljana, Faculty of Electrical Engineering Tržaška c. 25, 1000 Ljubljana, Slovenija Phone: +386 (0)1 4768 350; Fax:+386 (0)1 4264 630
Email: andrej.trost@fe.uni-lj.si
Prispelo: 04.03.2010
Sprejeto: 03.03.2011
58
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
A PILOT SCENARIO OF SECURE LOCATION-BASED SERVICES IMPLEMENTATION IN A UNIFIED WIFI NETWORK
B. Radulovic1, J. Stergar2
1 Cisco Systems, Bravnicarjeva 13, 1000 Ljubljana, Slovenia 2 University of Maribor, Faculty of Electrical Engineering and Computer Science,
Maribor, Slovenia
Key words: RFID, Location-Based Services, IEEE 802.11 infrastructure, Wi-Fi.
Abstract: In this paper a pilot scenario of secure location-based services implementation in a unified Wi-Fi network based on Cisco networking devices and location aware appliances will be presented. Third party active RFID tags from AeroScout have been used for the location aware tracking of users. We will present an indoor scenario of RF location tracking system implementation based entirely on a unified wireless network IEEE 802.11 infrastructure. In an environment sparse with obstacles a precision accuracy of criteria 1m/50% was achieved.
Pilotni scenarij implementacije varovanih lokalizacijskih storitev v združenem WiFi omrežju
Kjučne besede: RFID, lokacijske storitve, infrastruktura IEEE 802.11, Wi-Fi
Izvleček: V tem članku bomo predstavili pilotski scenarij implementacije varovanih lokalizacijskih storitev v združenem Wi-Fi omrežju zasnovanem na Cisco omrežnih napravah in lokalizacijskih orodjih. Za sledenje položaja uporabnikov so bile uporabljene aktivne značke z radijsko identifikacijo (RFID) podjetja AeroScout. Predstavili bomo scenarij notranje postavitve sistema za sledenje z radijsko identifikacijo, ki temelji izključno na brezžični infrastrukturi IEEE 802.11. V okolju z razmeroma malo ovirami je bila dosežena zanesljivost lokalizacije po kriteriju 1m/50%.
1. Introduction
The term location-based services (LBS) are a recent concept that denotes applications integrating geographic location with the general notion of services /1/. 3GPP strictly distinguishes between location-based services and location services. The latter exclusively deals with the localization of target persons and objects and with making the resulting location data externally available. A location service does not imply the processing of location data in the sense of filtering or selecting location-dependent information or performing other high-level actions as in LBS; it is only responsible for the generation and delivery of location data /2/. Despite the strict definition we will use the term LBS as it appears in most of the literature including location-services based on IEEE 802.11 wireless technology.
The rapid increase in the adoption rate of Wi-Fi coupled with the availability of high quality infrastructure at reasonable cost are key factors behind the outbreak of commercial and academic activity regarding Wi-Fi location-based services. Research and development progress in Wi-Fi location prediction techniques based entirely on IEEE 802.11 infrastructure have facilitated the emergence of indoor RF location tracking systems /3/. With integrated location tracking, enterprise wireless LANs become much more valuable as a corporate business asset.
Maintaining accurate information about the location of individuals or valuable equipment is a complex and ongoing
requirement for any large enterprise. To streamline asset tracking and improve workflows for equipment procurement and logistics, new technologies such as radio frequency identification (RFID) are the promising solution on the market /4/.
Offering end-to-end object visibility, the RFID technology seems to revolutionize the supply-chain industry, significantly reducing costs and helping to enable differentiation. With support from such major industry figures as IBM, Wal-Mart, and Procter & Gamble, the momentum is clearly behind this technology. Most deployments are in the pilot phase now, with companies learning about and preparing to use this technology and planning to face the funding issues and business process changes that it will bring.
RFID technology offers the following significant advantages over traditional barcode data collection, although RFID will probably never replace barcodes completely:
-	As opposed to barcodes RFID tags identify each item separately
-	While barcodes have to be properly oriented Line-of-sight for RFID tags is not necessary.
-	Resistant to harsh environments—Barcode life is limited by how long the printed symbols remain readable.
-	Can be reprogrammed and reused—New data cannot be written to barcodes.
59
Informacije MIDEM 41(2011)1, str. 59-64
B. Radulovic, J. Stergar: A Pilot Scenario of Secure Location-Based
Services Implementation in a Unified WiFi Network.
-	Can be read in groups-Barcodes must be read individually, whereas an RFID reader can scan multiple items simultaneously.
-	Secures data-Tag memory can be programmed, optionally permanently locked, and can also be erased to protect privacy.
RFID already has numerous commercial applications, such as automobile theft prevention, collecting drive-through tolls, managing traffic, gaining entrance to buildings, automating parking, dispensing goods and books tracking in libraries. As RFID technology solutions mature, companies everywhere will also experience unprecedented supply-chain visibility and information exchange. Currently, EPC-global, Inc., based on a joint venture between the Uniform Code Council and EAN International, is responsible for developing a single industry standard worldwide to further enable adoption of RFID based on the Electronic Product Code (EPC). The EPC is the favored specification of both Wal-Mart and the U.S. Department of Defense (DoD). This positions EPC as the leader for large supply-chain implementations /5/.
2. RFID Tag Technology
RFID is a means of identifying a person or an object using radio transmissions. This is accomplished by using two primary components: the transponder - an RFID tag located on the object to be identified, which contains a microchip and miniature antenna; and the reader - also known as a detector or interrogator, which communicates with the tag and passes its information on to a controlling system or middleware host /5/.
The majority of RFID tags produced today are passive RFID tags, comprised basically of a microcircuit and an antenna. They are referred to as passive tags because the only time in which they are actively communicating is when they are within the RF field of a passive RFID tag reader.
Another type of common RFID tag is known as the active RFID tag, which usually includes a battery that directly powers RF communication. This onboard power source allows an active RFID tag to transmit information about itself at great range, either by constantly beaconing this information to a RFID tag reader or by transmitting only when it is prompted. Active tags are usually larger in size and can contain substantially more information (because of higher amounts of memory) than do pure passive tag designs /3/.
The combination of both technologies is combined into semi-passive tags which differ from passive tags in that they use an onboard battery to provide power to communication and ancillary support circuits such as temperature and shock monitoring. Although they employ an onboard power source, semi-passive RFID tags do not use it to directly generate RF electromagnetic energy as active RFID's do. Rather, these tags typically make use of backscatter
modulation and reflect electromagnetic energy from the RFID reader to generate a tag response similar to that of standard passive tags.
2.1.	Active RFID Tags
Active tags are typically used in real-time tracking of high-value assets in closed-loop systems (that is, systems in which the tags are not intended to physically leave the control premises of the tag owner or originator). The relatively higher cost of assets tracked with active RFID tags (as compared to those typically tracked with passive RFID) usually justifies the higher cost of the active tag itself and presents strong motivation for tag re-use. Medical equipment, electronic test gear, computer equipment, reusable containers, and assembly line material-in-process are all excellent examples of applications for active tag technology. Active RFID tags can provide tracking in terms of presence (positive/negative indication of whether an asset is there/missing in a particular area) or real-time location. Active RFID tags are physically larger and typically more costly than passive RFID tags. Most Real Time Location Systems (RTLS) are based on the use of active RFID tag technology.
Active RFID tags can be sub-categorized into those that operate as transponders and those that operate as beacons. Of special interest are the active RFID tags that operate in the unlicensed ISM bands and abide by IEEE 802.11 protocols. These special active RFID tags are known as 802.11 (Wi-Fi) active RFID tags - this type was used for our pilot study.
Beaconing active RFID tags are used in many RTLS systems and are of primary use when the precise location of an asset needs to be tracked anywhere and anytime without the need for pre-positioned interrogators or tag exciters to trigger tag transmission. With a beaconing active RFID tag, a short message payload known as a "beacon" is emitted at pre-programmed intervals with the unique identifier of the RFID tag. This interval is programmed into the tag by the tag owner/user and can be set depending on the degree of criticality associated with tag location updates.
Any 802.11 Wi-Fi active RFID tag that is capable of successfully authenticating and associating with the underlying WLAN infrastructure (and issues probe requests regularly on all channels) should be recognizable by the Cisco LBS solution as a WLAN client (in WCS as a rectangular blue icon, Figure 2).
2.2.	Implemented 802.11 Active RFID Tags
802.11 active RFID tags are designed to operate in the unlicensed ISM bands of 2.4 to 2.4835 GHz or 5.8 to 5.825 GHz. Currently manufactured 802.11 Wi-Fi active RFID tags available at publication are limited to 2.4 GHz.
These tags exhibit the characteristics of active RFID tags, but also comply with applicable IEEE 802.11 standards and protocols. Wi-Fi RFID tags can readily communicate directly
60
B. Radulovic, J. Stergar: A Pilot Scenario of Secure Location-Based
Services Implementation in a Unified WiFi Network
Informacije MIDEM 41(2011)1, str. 59-64
with standard Wi-Fi infrastructure without any special hardware or firmware modifications and can co-exist alongside Wi-Fi clients such as laptops, VoWLAN phones, and so on. When powered on, assets equipped with 802.11 Wi-Fi client radios can be tracked natively without the need to have an asset tag attached. Other assets lacking an internal 802.11 Wi-Fi client radio can be tracked via a physically attached 802.11 active RFID tag. A physically attached 802.11 active RFID tag also makes it possible to use the location-aware Cisco UWN to track assets with integrated Wi-Fi client radios when those radios are powered off.
AeroScout T2 Tags were used for the presented scenario of secure LBS. The AeroScout T2 Tag is one of the, if not the leading Wi-Fi tag. The T2 Tag has proven usability, dependability, scalability and flexibility for a wide variety of industries and applications. The T2 messages can be received and processed by standard Cisco Systems wireless access points, keeping infrastructure costs low with a straightforward installation. The T2 is characterized by its long battery life, convenient small size, built-in choke point capabilities and telemetry functionality. T2 Tags enable separate transmission intervals when they are stationary or in motion, which additionally reduces unnecessary network traffic /8/.
3. Location Tracking Approaches
Location tracking and positioning systems can be classified by the measurement techniques they employ to determine mobile device location - localization. These approaches differ in terms of the specific technique used to sense and measure the position of the mobile device in the target environment under observation. Typically, RTLS can be grouped into four basic categories of systems that sense and measure position on the basis of the following:
-	Cell of origin (nearest cell)
-	Distance (lateration)
-	Angle (angulation)
-	Location patterning (pattern recognition)
An RTLS designer can choose to implement one or more of these techniques. This may be clearly seen in some approaches attempting to optimize performance in two or more environments with very different propagation characteristics. An example of this is an RTLS system attempting to yield optimal performance for both indoor and outdoor applications by using two different techniques. It is not unusual to hear arguments supporting the case that a fifth category should exist to include those RTLS systems that sense and measure position using a combination of at least two of the four techniques mentioned above. Regardless of the underlying positioning technology, the "real-time" nature of an RTLS is only as real-time as the most current timestamps, signal strengths, or angle-of-incidence measurements. The timing of probe responses, beaconing rates, and location server polling intervals can influence discrepancies seen
between actual and reported device position from reporting interval to reporting interval /3/.
4.	Accuracy and Precision of the Location Based Services Solution
With proper deployment according to the best practices /3/ the accuracy and precision of the tested LBS solution in indoor deployments is represented as follows:
-	Accuracy of less than or equal to 10 meters, with 90 % precision
-	Accuracy of less than or equal to 5 meters, with 50 % precision
In other words, given proper design and deployment of the system, the error distance between the reported device location and the actual location should, in 90 % of all reporting instances, be 10 meters or less. In the remaining 10 % of all reporting instances, the error distance may be expected to exceed 10 meters. Note that these specifications apply only to solutions using RF Fingerprinting; namely, the use of a WCS licensed for location usage (with or without a location appliance).
For applications that require better performance than an accuracy of 10 meters with 90 % precision, the Cisco LBS solution can deliver accuracy of 5 meters or less but with 50 % precision. Stated another way, in 50 % of all reporting instances, it can be reasonably expected that the error distance between the reported and the actual location exceeds 5 meters. The location inspection tool can display various levels of accuracy and precision from 2 m to 100 m along with which areas of the inspected environment can meet these accuracy levels.
5.	The unified wireless network setup and configuration
The network infrastructure was build from scratch. No appropriate RFID capable or compatible equipment was previously available. The network environment was setup at the annual Cisco EXPO conference (2007). The proof of concept for wireless appliances was targeted for a small to medium enterprise (50-100 employees).
The WAN connection was firewalled with a software based IOS firewall on a Cisco 1800 Series Integrated Services Router. The integrated services routing architecture of the Cisco 1800 Series offers features that provide the complete functionality and flexibility to deliver secure Internet and intranet access. It is ideal for small to medium-sized businesses and small enterprise branch offices enable businesses to reduce costs by deploying a single, resilient system for fast, secure, delivery of multiple mission-critical business services. As aggregation switch a Cisco Series 3560 switch was implemented. The Cisco Catalyst 3560 Series are next-generation energy-efficient Layer 3 Fast
61
Informacije MIDEM 41(2011)1, str. 59-64
B. Radulovic, J. Stergar: A Pilot Scenario of Secure Location-Based
Services Implementation in a Unified WiFi Network.
Ethernet switches. For the access switching nodes basic models L2 Cisco Catalyst Express 500 Series of switches were used. Cisco Catalyst Express 500 Series switches meet the needs of growing businesses with up to 250 employees. This family of Layer 2-managed Fast Ethernet and Gigabit Ethernet switches offers non-blocking, wirespeed performance and provides a secure network foundation optimized for data, wireless, and IP Communications (Figure 1,Table 1).
Table 1: Used equipment
Lightweight access points Cisco 1000 Series were implemented. The Aironet 1000 Series lightweight access points are specifically designed for operation with Cisco Wireless LAN Controllers and the Wireless Control System management tool. They provide dual band support for both 802.11a, 802.11b and 802.11g, simultaneous air monitoring for dynamic, real time RF management. In addition, the Lightweight Access Points handle time-sensitive functions, such as L2 encryption, that securely support voice, video, and data applications in wireless LANs.
The Cisco 4400 Series Wireless Controller for AP management was installed. The Wireless LAN Controllers is designed for medium-to-large enterprise facilities. The Cisco 4402 with two Gigabit Ethernet ports comes in configurations that support up to 12, 25, and 50 lightweight access points. It provides one expansion slot that can be used to add enhanced functionality, such as VPN termination and other future capabilities.
Fig. 1: The implemented location-aware unified wireless network architecture.
Next the Cisco Wireless Location Appliance was integrated. The 2710 Wireless Location Appliance simultaneously
tracks thousands of 802.11 wireless devices from directly within a WLAN infrastructure, increasing asset visibility and control of the RF environment. Additionally, the appliance provides location-based alerts for business policy enforcement and records rich historical location information that can be used for location trending, rapid problem resolution, and RF capacity management.
Finally the Wireless Control System was installed on a Windows 2003 server. The Cisco Wireless Control System (WCS) is a Cisco Unified Wireless Network Solution management tool that adds to the capabilities of the web user interface and command line interface (CLI), moving from individual controllers to a network of controllers. WCS includes the same configuration, performance monitoring, security, fault management, and accounting options used at the controller level and adds a graphical view of multiple controllers and managed access points.
Light-Weight Access points forward information to WLAN controller (WLC) regarding the detected signal strength of any WLAN clients (Wireless VLAN) and asset tags (Wireless WEP VLAN). At least three access points detect the asset tag's transmission. It is forwarded to the WLC to which the detecting access points are registered. In normal operation, access points focus their collection activities for this information on their primary channel of operation, going off-channel and scanning the other channels in their regulatory channel set periodically. The collected signal strength information is forwarded to the WLC to which the access point is currently registered, which aggregates the information such as battery status and tag or asset telemetry. The location appliance (LOC) uses SNMP to poll the controller (or controllers if there are many) for the latest signal strength information for each tracked category of device /6/.
All implemented hardware was appropriately configured using /9/, /10/, /11/, /12/, /13/, /14/.
6. Inspecting Location Quality and Precision
A new capability introduced with the latest Wireless Control System (Cisco WCS) and using the location appliance is Location Inspection.
Location inspection is the ability to directly validate the performance of the created path loss models via the calibration process. Unlike the location planner or location readiness tools, which are purely predictive in nature, when location quality is inspected, predicted locations to actual physical locations are directly compared and graphically expressed using the accuracy of the path loss model. With the use of the calibration model and the location inspection tool, it can be quantified whether achieving the 10 m/90 % performance metric in the environment and if so, whether it has been uniformly achieved throughout the area. Location inspection allows a topography preview of areas where the location performance may be below the performance
Cisco1812	Router Series 1800	1
WS-C3560G	L3 switch with 24 10/100/1000 ports and 2GE SFP ports	1
WS-CE500	L2 switch with 24 ports and 24 PoE	2
AP1010	Lightweight Access Point	6
L0C2710	Location Appliance	1
WLC4402	Wireless Location Controller (12 AP)	1
WCS	Wireless Control System	1
62
B. Radulovic, J. Stergar: A Pilot Scenario of Secure Location-Based
Services Implementation in a Unified WiFi Network
Informacije MIDEM 41(2011)1, str. 59-64
expectations as well as those where it is clearly exceeding them (Figure 2).
Table 2: Accuracy measurements of objects reported by the LBS System compared to a reference grid.
Fig. 2: On-Demand WLAN Client Localization using WCS (clients are depicted with blue whereas RFID tags with yellow).
Location inspection uses the signal strength information recorded during data collection and the path loss model to compute estimated location. It does this for each data collection point that was recorded. These estimated locations are then compared against the actual location coordinates (also recorded during data collection). The results of the comparison are displayed in a graphical format indicating the level of precision available throughout the environment for various selected accuracy levels.
The performance metric often used having the most familiarity and significance is accuracy. Accuracy typically refers to the value of the received information. Location accuracy refers particularly to the quantifiable error distance between the estimated location and the actual location of the mobile device.
In most real-world applications, however, a statement of location accuracy has little value without the ability of the solution to repeatedly and reliably perform at this level. Precision is a direct measure reflecting on the reproducibility of the stated location accuracy. Any indication of location accuracy should therefore include an indication of the confidence interval or percentage of successful location detection as well, otherwise known as the location precision /7/.
Measurements have been performed to estimate the deviation of reported and actual position of targets compared to measurement accuracy as regarding the 10 m/90 % performance metric criteria in the environment under observation and whether it has been uniformly achieved throughout the area.
For the precision estimation of measurements a straightforward arithmetic mean with mean absolute error (MAE) estimation was used. Additionally all measurements in column 2 (Table 2) were rounded up, thus the actual error is even lesser.
X=-YX:
nV 1
e, = x-x,
(1)
Measurement Nr.	Distance (m)	Error (m)
1	2	-0,79
2	3	0,21
3	4,5	1,71
4	2	-0,79
5	2	-0,79
6	0,5	-2,29
7	4	1,21
8	2,5	-0,29
9	3	0,21
10	3,5	0,71
11	2,5	-0,29
12	4	1,21
13	3	0,21
14	1,5	-1,29
15	2,5	-0,29
16	3	0,21
17	4	1,21
MAE (m)	2,79	
It is evident that all predicted measurements in the environment under inspection were clearly within the guaranteed 10m/90% criteria. In our case with an area including very little obstacles even the 1m/50% criteria could be met. Also measurements have been performed repeatedly to estimate the confidence interval (Figure 3).
where xi is the actual measurement and ei the absolute error.
Distance [m]
Fig. 3: The confidence interval estimation.
In addition measurements not fulfilling the triangle AP criteria were checked. As expected the measured position of the targets and their actual position were nondeterministic using implemented distance based or TDoA (Time Difference of Arrival) lateration techniques. Nevertheless rude estimation with RSS (Received Signal Strength) with appropriate path loss model is still possible /3/.
7. Conclusion
A Pilot Scenario of Secure Location-Based Services Implementation in a Unified WiFi Network was presented. State of-the-art hardware with the unified wireless Cisco network architecture with IEEE 802.11 infrastructure was used. The benefits of such an implementation are in using the existent
63
Informacije MIDEM 41(2011)1, str. 59-64
B. Radulovic, J. Stergar: A Pilot Scenario of Secure Location-Based
Services Implementation in a Unified WiFi Network.
wireless environment extending it with additional hardware for implementation of new services for localization. Localization of targets well beyond the guaranteed 10m/90% criteria was achieved.
Pilot scenarios as the one presented or simple deployments can perform well with standard IP networks without complete upgrades. Localization results even much below the criteria 10m/90% can be achieved in environments sparse with obstacles. An accuracy of 1 m/50% was demonstrated. However, network features can be used to optimize RFID deployments. Functionality such as network availability and scalability, simplified network provisioning, network security, and network quality of service are enhancements that advanced deployments will require. Choosing the correct network infrastructure in the beginning of the design will help to ensure the investment protection of RFID networks.
/6./ Cisco Systems, Wi-Fi Location-Based Services 4.1 Design Guide, 2008
/7./ C Yeh, H Lim; RSSI Measurements, IEEE 802.16 Broadband Wireless Access Working Group, 2004.
/8./ AeroScout T2 tags - http://www.aeroscout.com/content/ T2, accessed January 2008.
/9./ Cisco Systems, Cisco 1800 Series Integrated Services Routers (Fixed) Software Configuration Guide, 2005.
/10./ Cisco Systems, Catalyst 3560 Switch Software Configuration Guide, 2004.
/11./ Cisco Systems, Catalyst Express 500 Series Switches Configuration Example, WWW.cisco.com, 2008.
/12./ Cisco Systems, Cisco Location Appliance Configuration Guide, 2007.
/13./ Cisco Systems, Cisco Wireless LAN Controller Configuration Guide, 2006.
/14./ Cisco Systems, Cisco Wireless Control System Configuration Guide, 2007.
Aknowledgements
The authors thankfully acknowledge the assistance of Cisco Slovenia supporting this study with state-of-the-art equipment.
References
/1./ J. Schiller and A. Voisard Eds., Location-Based Services, Morgan
Kaufmann, 2004. /2./ Küpper, Location-based Services, John Willey & Sons, 2005. /3./ Cisco Systems, Wi-Fi Location-Based Services - Design and
Deployment Considerations, 2006. /4./ Cisco Systems, Cisco Tracks Corporate Assets with RFID and Wireless LAN Solutions http://www.cisco.com/web/about/ ciscoitatwork/news/082420061 .html /5./ Cisco Systems, Cisco Systems and RFID Technology, White Paper, 2004.
Bojan Radulovic
NIL d.o.o., Tivolska cesta 48, 1000 Ljubljana, Slovenija
(Former) Cisco Systems Slovenija, Bravničarjeva ulica 13, SI-1000 Ljubljana, Slovenia
doc. dr. Janez Stergar University of Maribor, Faculty of Electrical Engineering
and Computer Science, Smetanova ulica 17, 2000 Maribor e-mail: janez.stergar@uni-mb.s
Prispelo: 21.04.2010	Sprejeto: 03.03.2011i
64
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
A NOVEL CMOS DEFUZZIFICATION CIRCUIT EMPLOYING CURRENT DIFFERENCING BUFFERED AMPLIFIER BASED CURRENT-MODE MULTIPLIERS
Mahmut TOKMAKQI
Erciyes University, Engineering Faculty, Biomedical Engineering Dept.,
Kayseri, Turkey
Key words: Current Differencing Buffered Amplifier (CDBA), Defuzzification circuit, current-mode multiplier
Abstract: In this paper, design and analysis of a novel current-mode defuzzification circuit is presented. The proposed defuzzification circuit is based on current-mode four-quadrant multipliers that have been constructed with simple current squarer and current differencing buffered amplifier (CDBA). This circuit has capable of high linearity, simple structure, and wide input current range. The defuzzification circuit has been simulated and verified by PSPICE with MIETEC 1.2 mm parameters. The circuit is suitable for using Centre Of Gravity (COG) method in current-mode fuzzy logic controllers. The purpose of this paper is to present an alternative approach for current-mode defuzzification circuit design.
Novo FLC CMOS vezje
Kjučne besede: CDBA vezje, mehčalno vezje, ojačevalniki toka
Izvleček: V prispevku predstavimo načrtovanje in analizo inovativnega vezja FLC (Fuzzy Logic Circuit). Mehčalno vezje (defuzzification circuit ) je linearno in ima enostavno strukturo in vhodni tok v širokem intervalu. Vezje smo simulirali s programom PSPICE s parametri MIETEC 1,2um. Namen prispevka je prikazati drugačen pristop k načrtovanju vezij FLC.
1. Introduction
The defuzzification circuit or defuzzifier is one of the most important units in the fuzzy logic controllers (FLC). There are two ways to implement a defuzzifier: the analogue approach and the digital approach. The analogue approach presents several advantages in front of digital ones, especially regarding speed of processing, power dissipation and functional density. Moreover, the analogue circuit based fuzzy blocks perform continuous-time processing and they have the particularly to be well compatible with sensors, actuators and all other analogue signals /1-3/. On the other hand, digital circuits are superior to analogue counterpart in accuracy, extendibility, and easy of design automation /4-5/.
The centre of gravity (COG) is the most popular defuzzification method in FLC. Various defuzzification circuits using COG method are described in literature /6-9/. A high-speed digital defuzzification circuit based on BiCMOS technology has been proposed in /7/ but the fabrication cost is high. The other defuzzification circuit design with current-mode analogue circuits was proposed in /8/. However, both frequency range and speed of these circuits are low. Another defuzzification circuit using resonant tunnelling diodes is proposed by Tang and Lin /9/. Their design reduces circuit complexity compared with conventional digital and analogue signal processing circuits.
Recently, a new five-terminal active current-mode element, called a current differencing buffered amplifier (CDBA), has received much attention in the electronics community /10-12/. It can be operated in both current-mode and voltage-mode in a wide frequency range and can also be implemented with CMOS technology. Differential nature of this element at the input makes it especially suitable for various analogue signal-processing applications demanding high speed, high bandwidth and simple implementation.
In this paper, a new defuzzification circuit employing CDBA based current-mode multipliers is presented. The proposed circuit is built using current-mode four-quadrant multiplier includes simple current squarer and CDBA, and current-mode reverse function circuit as divider unit.
The outline of this paper is as follows. Section II briefly defines a block diagram of proposed defuzzification circuit, then the current squarer and Current Differencing Buffered Amplifier (CDBA) that composed of current-mode four-quadrant multiplier are theoretically described in detailed. Also, the current-mode reverse function circuit is described as the division unit of defuzzification circuit. Section III evaluates a proposed four-quadrant multiplier, reverse function circuit and defuzzification circuit with PSPICE simulation experiments. In Section IV, the overall conclusions are given.
65
M. Tokmakgi: A Novel CMOS Defuzzification Circuit Employing Current
Informacije MIDEM 41(2011)1, str. 65-69	Differencing Buffered Amplifier based Current-mode Multipliers.
2. Circuit Description
The COG method in current-mode is expressed as
Zvid
I
i=l
out (COG)
5X
(i)
where n represents the number of fuzzy sets on the universe of discourse, im and Iq represent the membership function output and support value of the i th fuzzy set, respectively. Eq. (1) can be arranged with current values of input/output variables as follows.
I out
^Hi-lei -Iç2	^ linken
(2)
where Iz is equal to ^^
The input and the output characteristics of each term in equation (2) can be defined by using current-mode four-quadrant multiplier blocks. Each block in Eq. (2) is computed as follows:
I
Aw	(3)
where Ix, Iy, Iw, and Iout variables are corresponded with Ipi, Ici, I, and Ioi , respectively. The block diagram of defuzzi-fication circuit processing unit in Eq. (3) is implemented with two multipliers and one current-mode reverse function block as shown in Fig.1.
Fig. 1: The block diagram of defuzzification circuit processing unit
The building blocks of current-mode multiplier circuit are shown in Fig. 2. This multiplier circuit is consists of two cascode current mirrors, one modified current differencing amplifier (CDBA), and three current squarer units.
The modified circuit structure of the CDBA in /10/ and circuit symbol is shown in Fig. 3 (a) and (b), respectively. The characteristic equation of this element can be given as
v =v =0,
p	n	7
IZ=Ip-In,
V = V,
'p Tn	"p	"w "z	(4)
Here, current through z-terminal follows the difference of the current through p-terminal and n-terminal. Input terminals, p and n, are internally grounded. A possible CMOS realization of CDBA consisting of a differential current
Fig. 2: (a) The building blocks of current-mode multiplier circuit (b) its symbol
Fig. 3: (a) Simplified CMOS implementation of modified CDBA and (b) its symbol (VDD= -VSS= 2.5 Vand Vb1= -1.45 V)
controlled current source (DCCCS) followed by a voltage buffer is shown in Fig. 3 (a).
2.1. Current Squarer
The current squarer circuit into four-quadrant multiplier is shown in Fig. 4.The MOSFETs, M1, M2, and M3, are the identical transistors, working in saturation region. In condition that VGS>VT and VDS>VGS-VT, the expression of drain current for the simple MOS transistor operating in saturation region is
Ids - M.C0X(^)(VGS -Ids =K(VGS-VT)
VT):
(5)
(6)
Where K is trans-conductance parameter, and m, Cox, W, and L stand for carrier effective mobility, gate oxide capacitance per unit area, width, and length of the channel, respectively /13/.
In Fig. 4, VB and Iin are the dc bias voltage and input current, respectively. If all MOS transistors operate in saturation
66
M. Tokmakgi: A Novel CMOS Defuzzification Circuit Employing Current
Differencing Buffered Amplifier based Current-mode Multipliers	Informacije MIDEM 41(2011)1, str. 65-69
Fig. 4: The current squarer circuit and its symbol
region and trans-conductance parameters of all transistors are identical, i.e., K1=K2=K3=K, then bias voltage VB is given by
V = V + V
VB Vgsl T VBI
(7)
If KCL is applied to A and B nodes, output current Iout can be obtained as follows:
I<i2 — Id3 — lin + ^dl
lout = ^dl
(8) (9)
Using equations (4)- (5), Iout can be derived as follows
lout =2Idl +Ita
(10)
The voltage of node A, VA, is equal to Vgs2 and the drain current of M1 transistor can be obtained by using equation (1) and (2).
V = V =
A gs2
(Ijn+Idl)+V K '
Id1=K[(vB-Vgs2)-Vt]:
(11)
(12)
Using equation (7) into (8), the drain current of M1 transistor, Id1, can be obtained as follows:
I-» = -^ +
2 (13)
= _în
Ldl 4K(Vb - 2Vt )2 4
If equation (9) is placed into equation (6), the output current Iout is given by
2
lout
.v——-+—(Vb - 2vt y
2K(VB-2Vj 2Vb '' (14)
Where K transconductance parameter, bias voltage, VB, and threshold voltage, Vt, are constant values and are chosen by designers.
— (V -2VY
Here, 2	expression in equation (10) is similar to
drain-to-source current of MOSFET transistor in saturation region. Therefore, this current can be supplied from a current mirror structure. If this expression is equal to constant bias current as IB via current mirror, then output current, Iout, can be obtained as follows:
I =— I 2+I
ut AT
B
From (11), the circuit operates as squarer circuit with the dc output offset current of IB. The offset current is cancelled by adding the current source to the output terminal.
Fig. 5:
(a)	Current-mode reverse function circuit and
(b)	its block representation
Figure 5 shows current-mode reverse function (1/x or x-1) circuit as divider operator in proposed defuzzification unit. This circuit is basically current squarer/divider circuit. The reverse function circuit output current Iout is obviously given by
I "
t _ bias
raié
41
I.
for A
I z
bias
(16)
(17)
(15)
Here, Ibias is corresponded to squaring current and it has been fixed value as dividing coefficient, i.e. A = I ^ 2 /4 . Thus, the circuit can be converted to divider operator by fixing squaring current Ibias. In this circuit, the voltage-translinear loops are formed by transistors M1-M10; note that the bulk terminals of these transistors are connected to their sources, thus avoiding the body effect. M13 and M26 are diode-connected transistors included for decreasing the channel-length modulation effect in M1 and M2, respectively. Transistors M11-M12 form a current mirror and M14-M25 constitute high-swing cascode current copiers employed for injecting the required combinations of currents into the voltage-translinear loop. The circuit is designed for VDD = 2.5 V and VC = 1.3 V /14/.
3. Simulation Results
The behaviour of the implemented CDBA and simple current squarer based defuzzification circuit was confirmed with 1.2 pm MIETEC CMOS process parameters by PSPICE simulations. The all device dimensions of the squarer circuit in Fig. 4 are identical and W/L= 120 pm/2 pm. The transient analysis results of current-mode reverse function circuit are shown in Fig. 6. Here, Ibias current is corresponded to
67
M. Tokmakgi: A Novel CMOS Defuzzification Circuit Employing Current
Informacije MIDEM 41(2011)1, str. 65-69	Differencing Buffered Amplifier based Current-mode Multipliers.
Iz current in current squarer/divider circuit is presented by /14/. This current is fixed value (50 jA) in our proposed defuzzification circuit for using as divider operator.
Fig. 6: The transient analysis result of current-
mode reverse function circuit. Input signals (top), the calculated result of current-mode reverse function (middle), the circuit output (bottom) /14/.
The PSPICE-DC and transient analysis results of multiplier circuit (Fig.2 (a)) are shown in Fig. 7 (a) and (b), where Iy(i.e. Ici support value) is [-200 jA; +200 jA] in amplitude, Ix (i.e. IMi membership value) is varied DC signal forms between [-15 jA; +15 jA] in 5 jA steps. In Fig. 7 (b), the frequencies of input currents, Ix and Iy, are selected 3 and 5 MHz, respectively. The error change of between calculation result and circuit output is about %1. So, this result is shown both wide
a)
b)
Fig. 7: (a) DC waveform of CDBA and current
squarer based current-mode four-quadrant multiplier (b) Transient response of four-quadrant multiplier. Input current signal (top) and together calculated graph and circuit output (bottom) (frequencies of Ix and Iy are 3 and 5 MHz, respectively.)
Fig. 8: The simulation results of current squarer and CDBA based defuzzification circuit. Input current signals (top), the calculation result of defuzzification process (middle), and the output waveform of proposed defuzzification circuit (bottom).
input current range and high frequency features of proposed circuit because of using CDBA structure in current-mode four-quadrant multipliers. In the simulations of proposed defuzzification circuit, the circuit parameter values are determined as follows: VDD= -VSS= 2.5 V, -200 |jA < Iy (Iin) < +200 jA, -15 jA < Ix (IMi) < 15 |A, Vb1= -1.45 V, RL=1 KQ.
The mathematical and simulation results of defuzzification processing unit are shown with together in Fig. 8. Three input sinusoidal signals (Ix, Iy, and Iw) are applied defuzzification processing unit. The simulation result of defuzzification circuit is verified to calculation result as shown in Fig. 8.
4. Conclusions
A novel current-mode defuzzification circuit using Centre of Gravity (COG) method has been designed and analyzed. Its behaviour was confirmed by PSPICE simulation experiments with MIETEC 1.2 jm CMOS process. The implemented defuzzification circuit is based on current-mode four-quadrant multipliers and modified current squarer/ divider circuits as divider operator in defuzzification processing unit. The proposed current-mode defuzzification circuit has capable of high linearity, simple structure, and wide input current range. The features are verified with PSPICE simulation experiments. The defuzzification circuit is suitable for CMOS fuzzy logic controllers with Centre Of Gravity (COG) method.
References
/1/ S. Bouras, M. Kotronakis, K. Suyama, Y. Tsividis, 'Mixed AnalogDigital Fuzzy Logic Controller with Continuous-Amplitude Fuzzy Inferences and Defuzzification', IEEE Trans. On Fuzzy Systems, May 1998, 6, (2), pp. 205-215. /2/ A. Rodriguez-Vazques, R. Navas, M. Delgado-Restituto, F. Vidal-Verdu, 'A Modular Programmable CMOS Analog Fuzzy Controller Chip', IEEE Trans. on Circuits and Systems-II, March 1999, 46, (3), pp. 251-265.
/3/ J.L. Huertas, S. Sánchez-Solano, I. Baturone, A. Barriga, 'Integrated circuit implementation of fuzzy controllers', IEEE J. Solid-State Circuits, vol. 31, No.7, pp. 1051-1058, 1996.
68
M. Tokmakgi: A Novel CMOS Defuzzification Circuit Employing Current
Differencing Buffered Amplifier based Current-mode Multipliers	Informacije MIDEM 41(2011)1, str. 65-69
/4/ M.J. Patyra, J.L. Grantner, and K. Koster, "Digital Fuzzy Controller: Design and Implementation", IEEE Trans. On Fuzzy Systems, vol.4, no.4, pp. 439-459, 1996.
/5/ S. Sánchez-Solano, Á. Barriga, C.J. Jimenez, J.L. Huertas, "Design and application of digital fuzzy controllers", IEEE Proc. the Sixth International Conference on Fuzzy Systems, vol.2, pp. 869 -874, 1997.
/6/ B.D. Liu, C.Y. Huang, H.Y. Wu, 'Modular current-mode defuzzification circuit for fuzzy logic controllers', Electron. Lett., 1994, 30, (16), pp.1287-1288.
/7/ J.B. Kuo, H.J. Huang, S.S. Chen, C.S. Chiang, 'BiCMOS dynamic defuzzifying circuit for fuzzy logic controllers', Electron. Lett., 1993, 29, (1), pp.67-68.
/8/ M. Tartagni, P. Perona, 'Computing centroids in Current-mode Technique', Electronics Letters, 1993, Vol. 29, Iss. 1, pp. 1811-1813.
/9/ H. Tang, H.C. Lin, 'Defuzzifier circuits using resonant tunneling diodes', Proc. IEEE Int. Symposium on Circuit and Systems, Seattle, April 1995, pp. 981-984.
/10/ C. Acar, and S. Ozoguz, " A Versatile Building Block: Current Differencing Buffered Amplifier Suitable for Analog Signal Processing Filters," Microelectronics Journals, vol.30, pp .157-160, 1999.
/11/ A. Toker, S. Ozcan, O. Çiçekoglu, and C. Acar, "Current-mode allpass filters using CDBA and a new high Q bandpass filter configuration", IEEE Trans. on Circuits and Systems-II: Analog and Digital Signal Processing, vol.47, no.9, pp.949-954, 2000.
/12/ W. Tangsrirat, W. Surakampontorn, and N. Fujii, "Realisation of leaprog filters using current differencing buffered amplifiers," IEICE Trans. Fundemantals, vol. E86-A, no.2, pp.318-326, 2003.
/13/ C. Toumazou, F.J. Lidgey, and D.G. Haigh, Analogue IC Design: The Current-Mode Approach, London, U.K.:IEE Press, 1990.
/14/ A. J. Lopez-Martin, A. Carlosena, "Current-Mode Multiplier/ Divider Circuits Based on the MOS Translinear Principle", Analog Integrated Circuits and Signal Processing, vol.28, pp.265-278, 2001.
Mahmut TOKMAKQI Erciyes University, Engineering Faculty, Biomedical Engineering Dept., 38039, Kayseri, Turkey E-mail: tokmakci@erciyes.edu.tr
Prispelo: 02.03.2010
Sprejeto: 03.03.2011
B9
UDK621.3:(53+54+621+66), ISSN0352-9045
Informacije MIDEM 41(2011)1, Ljubljana
2.8 GHZ - 5.7 GHZ VERY FAST UWB CCO USING DISCRETE-PACKAGED SIGE RF TRANSISTORS
Jurij Tratnik and Matjaž Vidmar University of Ljubljana, Faculty of Electrical Engineering, Ljubljana, Slovenia
Key words: current-controlled oscillator, phase noise, modulation bandwidth, discrete-packaged SiGe transistors
Abstract: A simple and successful design for ultra-wideband current-controlled oscillator (UWB CCO) is presented. The circuit uses discrete-packaged transistors and lumped elements. The tuning range of the CCO exceeds one octave in the lower microwave frequency range with reasonable phase-noise performance. Further it achieves a very high tuning speed: its 3 dB FM bandwidth exceeds 400 MHz.
2,8 GHz - 5,7 GHz zelo hiter ultra širokopasoven tokovno krmiljen oscilator z diskretnimi SiGe RF tranzistorji
Kjučne besede: tokovno krmiljen oscillator, fazni šum, modulacijska pasovna širina, diskretni SiGe tranzistorji
Izvleček: V prispevku je predstavljena preprosta in učinkovita izvedba ultra širokopasovnega tokovno krmiljenega oscilatorja (ang. UWB CCO) izdelanega z diskretnimi elektronskimi elementi. Frekvenčni razpon oscilatorja, ob sprejemljivih vrednostih faznega šuma, presega eno oktavo v spodnjem mikrovalovnem frekvenčnem področju. Njegova zasnova omogoča izredno hitro modulacijo; 3 dB frekvenčna modulacijska pasovna širina presega 400 MHz. Osnovna aplikacija predstavljenega oscilatorja je bila simulacija uklenitve kompleksne elektro-optične fazno sklenjene zanke (ang. OPLL), v kateri je oscilator nadomeščal laser. Oscilator je sicer mogoče uporabiti tudi v hitrih mikrovalovnih vezjih (sklopi s fazno sklenjeno zanko) in drugih aplikacijah širokega frekvenčnega spektra.
1
Introduction
UWB voltage or current-controlled oscillators /1-3/ found place in many applications of transmitting data over a wide spectrum with high data rates and in some other special applications. In this paper, we propose a current-controlled oscillator (CCO) using discrete-packaged SiGe:C transistors, capable of very fast tuning over a wide frequency range. Our particular application of the described CCO was the simulation of a complicated electro-optical system in a very fast electro-optical phase-locked loop (OPLLs) /4/, where the CCO simulated an yet-to-be-developed laser.
2 Circuit design
The core of proposed CCO consists of a cross-coupled NPN transistor pair T1 and T2 (see Fig. 1), forming a negative-impedance circuit (NIC) and providing positive feedback to produce oscillation. The NIC is loaded by an external lumped inductor to determine the frequency of the oscillation. DC bias current is fed through the center tap of the inductor on the positive side and through the 56 Q resistor to the common-emitter node on the negative side. In this CCO circuit no varactor diodes are employed.
The external inductor includes two pieces of thin copper foil soldered to an unetched part of a FR4 printed-circuit board as shown on Fig. 2. This inductor also performs as a transistor holder. The two packaged transistors are first soldered together and then held at a specified height above the FR4 board by the inductor. The inductance value is selected
by the height of both transistors above the FR4 board. A recommended height for stable and continuous oscillation was found about 2.5 mm above the ground plane.
Lowering the transistors reduces the inductance and increases the operating frequency. Unfortunately this also narrows the tuning range of the CCO and may produce unstable operation, mainly due to the parasitic inductances of the bonding wires inside the transistor packages.
Fig. 1 Ultra-wideband current-controlled oscillator (UWB CCO) circuit design
653
J. Tratnik, M. Vidmar: 2.8 GHz - 5.7 GHz very fast UWB CCO
using discrete-packaged SiGe RF transistorsn	Informacije MIDEM 41(2011)1, str. 70-72
The CCO is tuned by changing the bias current Itune through 680 q and 56 q resistors. A 56 q resistor is also used for good impedance matching on the FM input. The CCO output is inductively coupled. This coupling is intentionally made very loose to avoid affecting the CCO tuning performance. The output power can be restored by an additional buffer amplifier if required. A practical solution for the output coupling is a 47 q resistor installed above the transistors where the resistor leads act as a coupling loop.
Fig. 2 Transistor mounting in U-shaped Cu holder on FR-4 laminate; the inductance value is selected by the height of both transistors above the FR4 board
3 Measurement results
Fig. 3 Frequency and output power against tuning current I.
tune
■ - frequency • - power
The CCO phase noise was measured with a HP8565 Spectrum Analyser and is shown on Fig.4. The phase noise increases towards the upper frequency limit where the operating current is very low and the CCO shows a tendency to turn off and/or jump into another oscillation mode due to transistor-package parasitics.
Practical experiments were made with several different silicon, SiGe and SiGe:C transistors from the BFP series manufactured by Infineon in common-emitter packages SOT-343 and TSFP-4. All CCOs were built on 1-mm thick FR-4 laminate and shielded in a metal box. Microwave-absorber foam was placed above the circuit inside the box to suppress parasitic resonances. Lead-acid batteries were used as noise-free power sources for phase-noise measurements. Transistor types BFP405, 420, 520, 620 and 740 were tested. The best results were achieved with the SiGe:C transistor BFP740 as shown on the following figures.
The CCO tuning curve and output power are shown on Fig. 3. The frequency of the CCO changes from 5.72 GHz to 2.85 GHz when tuning current changes from 1.4 mA to 48 mA. The output frequency is inversely proportional to the operating current resulting in a hyperbolic tuning curve. The tuning slope therefore changes from 100 MHz/mA at the upper frequency limit down to 47 MHz/mA at the lower frequency limit.
The output power stays around -22 dBm in the frequency range from 2.85 GHz to 4.0 GHz and decreases down to -40 dBm at the upper frequency limit.
-50
-60
I -70 m
"D
.2 -SO
o
-100
-120 -— I-— I-— i i 11 ii|-— I
1 10 100 1000 10000 offset frequency. kHz
Fig. 4 Measured phase noise at different oscillation frequencies
■ - oscillation frequency @ 5.7 GHz ▲ - oscillation frequency @ 5.0 GHz
--oscillation frequency @ 4.0 GHz
• - oscillation frequency @ 3.0 GHz
The tuning speed of the presented CCO was measured as the frequency-modulation bandwidth that is commonly referred to in the industry /5/. An Agilent E4438C Signal
654
Informacije MIDEM 41(2011)1, str. 70-72
J. Tratnik, M. Vidmar: 2.8 GHz - 5.7 GHz very fast UWB CCO
using discrete-packaged SiGe RF transistorsn
Generator was connected to the FM input while the CCO output was monitored on a HP8565 Spectrum Analyser. The measured 3 dB modulation bandwidth of the proposed CCO exceeded 400 MHz. In other words, the presented CCO is more than 10-times faster than commercially available varactor-tuned VCOs.
4 Conclusion
A novel, discrete-component design of a CCO achieves a wide tuning range and fast modulation capability using standard, low-cost electronic components. Its phase noise is sufficiently low to allow several different wide-tuning-range applications. The CCO tuning speed is much faster than that of varactor-tuned oscillators, allowing very fast electronic and electro-optical PLLs.
Acknowledgments
The described CCO was developed as a part of the EU project under contract number 035317 (IPHOBAC), financed by the European Community.
References
/1/ C. C Wei, H. C. Chiu and W. S. Feng, ''An Ultra-Wideband CMOS VCO with 3~5 GHz Tuning Range'', IEEE Int. Workshop on RF Integration Tech., pp. 87-90, 2005.
/2/ Y. Wu, M. Ismail and H. Olsson, ''CMOS VHF/RF CCO based on active inductors'', Electron. Lett., Vol. 37, No. 8, pp. 472-473, 2001.
/3/ S. B. Roy and D. Patranabis, "Voltage-controlled oscillator using an emitter-coupled differential pair'', Electron. Lett., Vol. 13, No. 19, pp. 590-591, 1977.
/4/ L. Naglic, L. Pavlovic, B. Batagelj, M. Vidmar, ''Improved phase detector for electro-optical phase-locked loops'', Electron. Lett., vol. 44, no. 12, pp. 758-760, Jun. 2008.
/5/ Hittite Microwave corp. (Chelmsford, MA), "Determining the FM Bandwidth of a Wideband Varactor Tuned VCO'', Application notes ii-2, pp. 18-27.
Jurij Tratnik and prof. dr. Matjaž Vidmar,
University of Ljubljana, Faculty of Electrical Engineering, Tržaška cesta 25, 1000 Ljubljana, Slovenia.
E-mail: junj.tratnik@fe.uni-lj.si;
Tel: 01/4768 423
Prispelo: 05.05.2010	Sprejeto: 03.03.2011
72
Informacije MIDEM 41(2011)1, Ljubljana
MIDEM	
1	1
DRUSTVO-SOCIETY
I i* s
SC
l Slovenia F Chapter
M I D E M
Strokovno društvo za mikroelektroniko, elektronske sestavne dele in materiale MIDEM pri MIKROIKS Stegne 11, 1521 Ljubljana SLOVENIJA
TEL.: +386 (0)1 5133 768 FAX: +386 (0)1 5133 lll
Email I WWW iztok.sorli@guest.arnes.si http:||paris.fe.uni-lj.si|midem|
MIDEM SOCIETY REGISTRATION FORM
1.	First Name ................................................................Last Name........................................
Adress...................................................................................................................................
City.......................................................................................................................................
Country.....................................................................Postal Code.....................................
2.	Date of Birth.............................................................
3. Education (please, circle whichever appropriate) PhD	MSc	BSc	High School
3.	Profession (please, circle whichever appropriate) Electronics	Physics	Chemistry
4.	Company............................................................................
Student
Metallurgy
Material Sc.
Adress City ....
Country.....................................................................Postal Code
Tel.: ............................................................................FAX: ...........
Email...............................................................................................
5. Your Primary Job Function Fabrication	Engineering
Management	Purchasing
Facilities Consulting
QA/QC Other
6.	Please, send mail to a) Company adress b) Home Adress
7.	I wil regularly pay MIDEM membership fee, 25,00 EUR/year MIDEM member recive Journal "Informacije MIDEM" for free !!!
Signature .......................................................................Date
73
Informacije MIDEM 41(2011)1, Ljubljana
MIDEM at MIKROIKS Stegne 11
1521 Ljubljana Slovenija
73
Informacije MIDEM 41(2011)1, Ljubljana
Informacije MIDEM
Strokovna revija za mikroelektroniko, elektronske sestavine dele in materiale_
NAVODILA AVTORJEM
Informacije MIDEM je znanstveno-strokovno-društvena publikacija Strokovnega društva za mikroelektroniko, elektronske sestavne dele in materiale - MIDEM. Revija objavlja prispevke s področja mikroelektronike, elektronskih sestavnih delov in materialov. Ob oddaji člankov morajo avtorji predlagati uredništvu razvrstitev dela v skladu s tipologijo za vode-nje bibliografij v okviru sistema COBISS.
Znanstveni in strokovni prispevki bodo recenzirani.
Znanstveno-strokovni prispevki morajo biti pripravljeni na naslednji način:
1.	Naslov dela, imena in priimki avtorjev brez titul, imena institucij in firm
2.	Ključne besede in povzetek (največ 250 besed).
3.	Naslov dela v angleščini.
4.	Ključne besede v angleščini (Key words) in podaljšani povzetek (Extended Abstract) v anglešcčini, če je članek napisan v slovenščini
5.	Uvod, glavni del, zaključek, zahvale, dodatki in literatura v skladu z IMRAD shemo (Introduction, Methods, Results And Discsussion).
6.	Polna imena in priimki avtorjev s titulami, naslovi institucij in firm, v katerih so zaposleni ter tel./Fax/Email podatki.
7.	Prispevki naj bodo oblikovani enostransko na A4 stra-neh v enem stolpcu z dvojnim razmikom, velikost črk namanj 12pt. Priporočena dolžina članka je 12-15 strani brez slik.
Ostali prispevki, kot so poljudni cčlanki, aplikacijski članki, novice iz stroke, vesti iz delovnih organizacij, inštitutov in fakultet, obvestila o akcijah društva MIDEM in njegovih članov ter drugi prispevki so dobrodošli.
Ostala splošna navodila
1.	V članku je potrebno uporabljati SI sistem enot oz. v oklepaju navesti alternativne enote.
2.	Risbe je potrebno izdelati ali iztiskati na belem papirju. Širina risb naj bo do 7.5 oz.15 cm. Vsaka risba, tabela ali fotografija naj ima številko in podnapis, ki označuje njeno vsebino. Risb, tabel in fotografij ni potrebno lepi-ti med tekst, ampak jih je potrebno ločeno priložiti članku. V tekstu je treba označiti mesto, kjer jih je potrebno vstaviti.
3.	Delo je lahko napisano in bo objavljeno v slovenščini ali v angleščini.
4.	Uredniški odbor ne bo sprejel strokovnih prispevkov, ki ne bodo poslani v dveh izvodih skupaj z elektronsko verzijo prispevka na disketi ali zgoščenki v formatih ASCII ali Word for Windows. Grafične datoteke naj bodo priložene ločeno in so lahko v formatu TIFF, EPS, JPEG, VMF ali GIF.
5.	Avtorji so v celoti odgovorni za vsebino objavljenega sestavka.
Rokopisov ne vračamo. Rokopise pošljite na spodnji naslov.
Uredništvo Informacije MIDEM
MIDEM pri MIKROIKS
Stegne 11, 1521 Ljubljana, Slovenia
Email: Iztok.Sorli@guest.arnes.si
tel. (01) 5133 768, fax. (01) 5133 771
Informacije MIDEM
Journal of Microelectronics, Electronic Components and Materials_
INSTRUCTIONS FOR AUTHORS
Informacije MIDEM is a scientific-professional-social publication of Professional Society for Microelectronics, Electronic Components and Materials - MIDEM. In the Journal, scientific and professional contributions are published covering the field of microelectronics, electronic components and materials. Authors should suggest to the Editorial board the classification of their contribution such as : original scientific paper, review scientific paper, professional paper... Scientific and professional papers are subject to review.
Each scientific contribution should include the following:
1.	Title of the paper, authors' names, name of the institution/ company.
2.	Key Words (5-10 words) and Abstract (200-250 words), stating how the work advances state of the art in the field.
3.	Introduction, main text, conclusion, acknowledgements, appendix and references following the IMRAD scheme (Introduction, Methods, Results And Discsussion).
4.	Full authors' names, titles and complete company/institution address, including Tel./Fax/Email.
5.	Manuscripts should be typed double-spaced on one side of A4 page format in font size 12pt. Recommended length of manuscript (figures not included) is 12-15 pages
6.	Slovene authors writing in English language must submit title, key words and abstract also in Slovene language.
7.	Authors writing in Slovene language must submit title, key words and extended abstract (500-700 words) also in English language.
Other types of contributions such as popular papers, application papers, scientific news, news from companies, institutes and universities, reports on actions of MIDEM Society and its members as well as other relevant contributions, of appropriate length , are also welcome.
General informations
1.	Authors should use SI units and provide alternative units in parentheses wherever necessary.
2.	Illustrations should be in black on white paper. Their width should be up to 7.5 or 15 cm. Each illustration, table or photograph should be numbered and with legend added. Illustrations, tables and photographs must not be included in the text but added separately. However, their position in the text should be clearly marked.
3.	Contributions may be written and will be published in Slovene or English language.
4.	Authors must send two hard copies of the complete contributon, together with all files on diskette or CD, in ASCII or Word for Windows format. Graphic files must be added separately and may be in TIFF, EPS, JPEG, VMF or GIF format.
5.	Authors are fully responsible for the content of the paper.
Contributions are to be sent to the address below.
Uredništvo Informacije MIDEM
MIDEM pri MIKROIKS
Stegne 11, 1521 Ljubljana, Slovenia
Email: Iztok.Sorli@guest.arnes.si
tel.+386 1 5133 768, fax.+386 1 5133 771
73
ORGANI DRUŠTVA MIDEM - BOARDS OF MIDEM
Predsednik društva MIDEM MIDEM President
Prof. dr. Slavko Amon, univ. dipl. inž. el., Fakulteta za elektrotehniko, Ljubljana, Slovenija
IZVRŠILNI ODBOR MIDEM - MIDEM EXECUTIVE BOARD
Podpredsednika Vice-presidents
Prof. dr. Marija Kosec, univ. dipl. inž. kem., Institut "Jožef Stefan", Ljubljana, Slovenija Dr. Iztok Šorli, univ. dipl. inž. fiz., MIKROIKS, d. o. o., Ljubljana, Slovenija
Tajnik Secretary
Igor Pompe, univ. dipl. inž. el., Ljubljana, Slovenija
Člani izvršilnega odbora MIDEM Executive Board Members
Prof. dr. Janez Trontelj, univ. dipl. inž. el., Ljubljana, blagajnik
Darko Belavič, univ. dipl. inž. el., HIPOT-RR, d. o. o., Šentjernej
Prof. dr. Bruno Cvikl, univ. dipl. inž. fiz., Fakulteta za gradbeništvo, Maribor
Mag. Leopold Knez, univ. dipl. inž. el., Iskra TELA, d. d. , Ljubljana
Dr. Miloš Komac, univ. dipl. inž. kem., Fakulteta za kemijo in kemijsko tehnologijo
Jožef Perne, univ. dipl. inž. el. , Zavod TC SEMTO
Prof. dr. Marko Topič, univ. dipl. inž. el.; Fakulteta za elektrotehniko, Ljubljana
Prof.dr.Miran Mozetič, univ. dipl. inž. fiz., Institut Jožef Stefan, Ljubljana
Dr. Werner Reczek, Infineon, Avstrija
Prof. dr. Giorgio Pignatel, University of Perugia, Italija
Prof. dr. Leszek J. Golonka, Technical University, Wroclaw, Poljska
Nadzorni odbor Supervisory Board
Prof. dr. Franc Smole, univ. dipl. inž. el., Fakulteta za elektrotehniko, Ljubljana Mag. Andrej Pirih, univ. dipl. inž. el., Iskra - Zaščite, d. o. o. , Ljubljana Dr. Slavko Bernik, univ. dipl. inž. kem., Institut "Jožef Stefan", Ljubljana
Častno razsodišče Court of Honour
Franc Jan, univ. dipl. inž. fiz., Kranj
Prof. dr. Radko Osredkar, univ. dipl. inž. el., Fakulteta za elektrotehniko, Ljubljana Prof. dr. Jože Furlan, univ. dipl. inž. el., Ljubljana
Sponzorji MIDEM
MIDEM Sponsors
JAVNAAGENCIJAZA RAZISKOVALNO DEJAVNOST RS, Ljubljana INSTITUT "JOŽEF STEFAN", Odsek za elektronsko keramiko, Ljubljana FAKULTETAZAELEKTROTEHNIKO-LMFE, Ljubljana FAKULTETAZAELEKTROTEHNIKO-LMSE, Ljubljana FAKULTETA ZA ELEKTROTEHNIKO - LPVO, Ljubljana MIKROIKS,d.o.o., Ljubljana TC SEMTO, Ljubljana ISKRA ZAŠČITE d.o.o., Ljubljana RLS, d.o.o., Ljubljana
Informacije MIDEM, 41(2011)1, Ljubljana, MAREC 2011, ISSN 0352-9045, UDK 621.3:(53+54+621+66)(05)(497.1)=00 Strokovna revija za mikroelektroniko, elektronske sestavne dele in materiale Journal of Microelectronics, Electronic Components and Materials
Publikacija informacije MIDEM izhaja po ustanovitvi Strokovnega društva za mikroelektroniko, elektronske sestavne dele in materiale - MIDEM kot nova oblika publikacije Informacije SSOSD, ki jo je izdajal Zvezni strokovni odbor za elektronske sestavne dele in materiale SSOSD pri Jugoslovanski zvezi za ETAN od avgusta 1969 do 6. oktobra 1977 in publikacije Informacije SSESD, ki jo je izdajala Strokovna sekcija za elektronske sestavne dele, mikroelektroniko in materiale - SSESD pri Jugoslovanski zvezi za ETAN od 6. oktobra 1977 do 29. januarja 1986.
Časopis Informacije MIDEM je vpisan v register časopisov pri Ministrstvu za informiranje pod registrsko številko 809.